JIT: Add bits for Windows ARM64 support

src/ARMJIT_A64/ARMJIT_Compiler.cpp

@@ -21,10 +21,12 @@
 #include "../ARMJIT_Internal.h"
 #include "../ARMInterpreter.h"
 
-#ifdef __SWITCH__
+#if defined(__SWITCH__)
 #include <switch.h>
 
 extern char __start__;
+#elif defined(_WIN32)
+#include <windows.h>
 #else
 #include <sys/mman.h>
 #include <unistd.h>
@@ -256,10 +258,21 @@ Compiler::Compiler()
     SetCodeBase((u8*)JitRWStart, (u8*)JitRXStart);
     JitMemMainSize = JitMemSize;
 #else
-    u64 pageSize = sysconf(_SC_PAGE_SIZE);
+    #ifdef _WIN32
+        SYSTEM_INFO sysInfo;
+        GetSystemInfo(&sysInfo);
+
+        u64 pageSize = (u64)sysInfo.dwPageSize;
+    #else
+        u64 pageSize = sysconf(_SC_PAGE_SIZE);
+    #endif
     u8* pageAligned = (u8*)(((u64)JitMem & ~(pageSize - 1)) + pageSize);
     u64 alignedSize = (((u64)JitMem + sizeof(JitMem)) & ~(pageSize - 1)) - (u64)pageAligned;
-    #ifdef __APPLE__
+
+    #if defined(_WIN32)
+        DWORD dummy;
+        VirtualProtect(pageAligned, alignedSize, PAGE_EXECUTE_READWRITE, &dummy);
+    #elif defined(__APPLE__)
         pageAligned = (u8*)mmap(NULL, 1024*1024*16, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANONYMOUS | MAP_JIT,-1, 0);
         JitEnableWrite();
     #else

src/ARMJIT_Memory.cpp

@@ -81,29 +81,29 @@ bool FaultHandler(FaultDescription& faultDesc);
 }
 
 // Yes I know this looks messy, but better here than somewhere else in the code
-#if defined(_WIN32)
-    #define CONTEXT_PC Rip
-#else
-    #if defined(__x86_64__)
-        #if defined(__linux__)
-            #define CONTEXT_PC uc_mcontext.gregs[REG_RIP]
-        #elif defined(__APPLE__)
-            #define CONTEXT_PC uc_mcontext->__ss.__rip
-        #elif defined(__FreeBSD__)
-            #define CONTEXT_PC uc_mcontext.mc_rip
-        #elif defined(__NetBSD__)
-            #define CONTEXT_PC uc_mcontext.__gregs[_REG_RIP]
-        #endif
-    #elif defined(__aarch64__)
-        #if defined(__linux__)
-            #define CONTEXT_PC uc_mcontext.pc
-        #elif defined(__APPLE__)
-            #define CONTEXT_PC uc_mcontext->__ss.__pc
-        #elif defined(__FreeBSD__)
-            #define CONTEXT_PC uc_mcontext.mc_gpregs.gp_elr
-        #elif defined(__NetBSD__)
-            #define CONTEXT_PC uc_mcontext.__gregs[_REG_PC]
-        #endif
+#if defined(__x86_64__)
+    #if defined(_WIN32)
+        #define CONTEXT_PC Rip
+    #elif defined(__linux__)
+        #define CONTEXT_PC uc_mcontext.gregs[REG_RIP]
+    #elif defined(__APPLE__)
+        #define CONTEXT_PC uc_mcontext->__ss.__rip
+    #elif defined(__FreeBSD__)
+        #define CONTEXT_PC uc_mcontext.mc_rip
+    #elif defined(__NetBSD__)
+        #define CONTEXT_PC uc_mcontext.__gregs[_REG_RIP]
+    #endif
+#elif defined(__aarch64__)
+    #if defined(_WIN32)
+        #define CONTEXT_PC Pc
+    #elif defined(__linux__)
+        #define CONTEXT_PC uc_mcontext.pc
+    #elif defined(__APPLE__)
+        #define CONTEXT_PC uc_mcontext->__ss.__pc
+    #elif defined(__FreeBSD__)
+        #define CONTEXT_PC uc_mcontext.mc_gpregs.gp_elr
+    #elif defined(__NetBSD__)
+        #define CONTEXT_PC uc_mcontext.__gregs[_REG_PC]
     #endif
 #endif
 

src/dolphin/Arm64Emitter.cpp

@@ -16,6 +16,10 @@
 #include "../types.h"
 #include "MathUtil.h"
 
+#ifdef _WIN32
+    #include <windows.h>
+#endif
+
 #ifdef __APPLE__
     #include <libkern/OSCacheControl.h>
 #endif
@@ -392,6 +396,8 @@ void ARM64XEmitter::FlushIcacheSection(u8* start, u8* end)
 #if defined(__APPLE__)
   // Header file says this is equivalent to: sys_icache_invalidate(start, end - start);
   sys_cache_control(kCacheFunctionPrepareForExecution, start, end - start);
+#elif defined(_WIN32)
+  FlushInstructionCache(GetCurrentProcess(), start, end - start);
 #else
   // Don't rely on GCC's __clear_cache implementation, as it caches
   // icache/dcache cache line sizes, that can vary between cores on