cache line boundary align condition lut table

2024-12-09 10:03:47 -05:00 · 2024-12-09 10:03:47 -05:00 · 918df047b8
parent cbdd6a0faf
commit 918df047b8
1 changed files with 1 additions and 1 deletions
--- a/src/ARM.cpp
+++ b/src/ARM.cpp
@ -87,7 +87,7 @@ void ARM::GdbCheckC() {}



-const u32 ARM::ConditionTable[16] =
+alignas(64) const u32 ARM::ConditionTable[16] =
 {
    0xF0F0, // EQ
    0x0F0F, // NE