jit: add compile option
This commit is contained in:
parent
fc82ca1a97
commit
86f2be7260
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@ -14,6 +14,42 @@ if (NOT CMAKE_BUILD_TYPE)
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set(CMAKE_BUILD_TYPE Release)
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set(CMAKE_BUILD_TYPE Release)
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endif()
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endif()
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include(CheckSymbolExists)
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function(detect_architecture symbol arch)
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if (NOT DEFINED ARCHITECTURE)
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set(CMAKE_REQUIRED_QUIET 1)
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check_symbol_exists("${symbol}" "" ARCHITECTURE_${arch})
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unset(CMAKE_REQUIRED_QUIET)
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# The output variable needs to be unique across invocations otherwise
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# CMake's crazy scope rules will keep it defined
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if (ARCHITECTURE_${arch})
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set(ARCHITECTURE "${arch}" PARENT_SCOPE)
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set(ARCHITECTURE_${arch} 1 PARENT_SCOPE)
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add_definitions(-DARCHITECTURE_${arch}=1)
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endif()
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endif()
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endfunction()
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detect_architecture("__x86_64__" x86_64)
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detect_architecture("__i386__" x86)
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detect_architecture("__arm__" ARM)
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detect_architecture("__aarch64__" ARM64)
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if (ARCHITECTURE STREQUAL x86_64)
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option(ENABLE_JIT "Enable x64 JIT recompiler" ON)
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endif()
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if (ENABLE_JIT)
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add_definitions(-DJIT_ENABLED)
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endif()
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if (CMAKE_BUILD_TYPE STREQUAL Release)
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option(ENABLE_LTO "Enable link-time optimization" ON)
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else()
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option(ENABLE_LTO "Enable link-time optimization" OFF)
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endif()
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if (CMAKE_BUILD_TYPE STREQUAL Debug)
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if (CMAKE_BUILD_TYPE STREQUAL Debug)
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add_compile_options(-Og)
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add_compile_options(-Og)
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endif()
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endif()
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13
src/ARM.cpp
13
src/ARM.cpp
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@ -81,15 +81,8 @@ ARMv4::ARMv4() : ARM(1)
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//
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//
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}
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}
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namespace ARMJIT {extern int instructionPopularityARM[ARMInstrInfo::ak_Count];}
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void ARM::Reset()
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void ARM::Reset()
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{
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{
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FILE* blabla = fopen("fhhg", "w");
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for (int i = 0; i < ARMInstrInfo::ak_Count; i++)
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fprintf(blabla, "%d -> %dx\n", i, ARMJIT::instructionPopularityARM[i]);
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fclose(blabla);
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Cycles = 0;
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Cycles = 0;
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Halted = 0;
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Halted = 0;
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@ -591,6 +584,7 @@ void ARMv5::Execute()
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Halted = 0;
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Halted = 0;
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}
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}
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#ifdef JIT_ENABLED
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void ARMv5::ExecuteJIT()
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void ARMv5::ExecuteJIT()
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{
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{
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if (Halted)
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if (Halted)
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@ -642,6 +636,7 @@ void ARMv5::ExecuteJIT()
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if (Halted == 2)
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if (Halted == 2)
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Halted = 0;
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Halted = 0;
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}
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}
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#endif
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void ARMv4::Execute()
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void ARMv4::Execute()
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{
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{
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@ -720,6 +715,7 @@ void ARMv4::Execute()
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Halted = 0;
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Halted = 0;
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}
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}
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#ifdef JIT_ENABLED
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void ARMv4::ExecuteJIT()
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void ARMv4::ExecuteJIT()
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{
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{
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if (Halted)
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if (Halted)
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@ -771,4 +767,5 @@ void ARMv4::ExecuteJIT()
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if (Halted == 2)
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if (Halted == 2)
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Halted = 0;
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Halted = 0;
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}
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}
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#endif
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@ -52,7 +52,9 @@ public:
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}
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}
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virtual void Execute() = 0;
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virtual void Execute() = 0;
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#ifdef ENABLE_JIT
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virtual void ExecuteJIT() = 0;
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virtual void ExecuteJIT() = 0;
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#endif
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bool CheckCondition(u32 code)
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bool CheckCondition(u32 code)
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{
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{
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@ -160,7 +162,9 @@ public:
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void DataAbort();
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void DataAbort();
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void Execute();
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void Execute();
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#ifdef JIT_ENABLED
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void ExecuteJIT();
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void ExecuteJIT();
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#endif
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// all code accesses are forced nonseq 32bit
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// all code accesses are forced nonseq 32bit
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u32 CodeRead32(u32 addr, bool branch);
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u32 CodeRead32(u32 addr, bool branch);
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@ -283,7 +287,9 @@ public:
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void JumpTo(u32 addr, bool restorecpsr = false);
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void JumpTo(u32 addr, bool restorecpsr = false);
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void Execute();
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void Execute();
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#ifdef JIT_ENABLED
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void ExecuteJIT();
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void ExecuteJIT();
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#endif
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u16 CodeRead16(u32 addr)
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u16 CodeRead16(u32 addr)
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{
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{
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@ -4,7 +4,10 @@
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#include <assert.h>
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#include <assert.h>
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#include "../dolphin/CommonFuncs.h"
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#ifdef _WIN32
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#ifdef _WIN32
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#include <windows.h>
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#else
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#else
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#include <sys/mman.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <unistd.h>
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@ -32,8 +35,6 @@ const int RegisterCache<Compiler, X64Reg>::NativeRegsAvailable =
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#endif
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#endif
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;
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;
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int instructionPopularityARM[ARMInstrInfo::ak_Count];
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/*
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/*
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We'll repurpose this .bss memory
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We'll repurpose this .bss memory
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@ -42,29 +43,33 @@ u8 CodeMemory[1024 * 1024 * 32];
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Compiler::Compiler()
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Compiler::Compiler()
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{
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{
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#ifdef _WIN32
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{
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#else
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#ifdef _WIN32
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u64 pagesize = sysconf(_SC_PAGE_SIZE);
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SYSTEM_INFO sysInfo;
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#endif
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GetSystemInfo(&sysInfo);
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u8* pageAligned = (u8*)(((u64)CodeMemory & ~(pagesize - 1)) + pagesize);
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u64 pageSize = (u64)sysInfo.dwPageSize;
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u64 alignedSize = (((u64)CodeMemory + sizeof(CodeMemory)) & ~(pagesize - 1)) - (u64)pageAligned;
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#else
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u64 pageSize = sysconf(_SC_PAGE_SIZE);
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#endif
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#ifdef _WIN32
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u8* pageAligned = (u8*)(((u64)CodeMemory & ~(pageSize - 1)) + pageSize);
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#else
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u64 alignedSize = (((u64)CodeMemory + sizeof(CodeMemory)) & ~(pageSize - 1)) - (u64)pageAligned;
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mprotect(pageAligned, alignedSize, PROT_EXEC | PROT_READ | PROT_WRITE);
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#endif
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region = pageAligned;
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#ifdef _WIN32
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region_size = alignedSize;
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DWORD dummy;
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total_region_size = region_size;
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VirtualProtect(pageAligned, alignedSize, PAGE_EXECUTE_READWRITE, &dummy);
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#else
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mprotect(pageAligned, alignedSize, PROT_EXEC | PROT_READ | PROT_WRITE);
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#endif
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region = pageAligned;
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region_size = alignedSize;
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total_region_size = region_size;
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}
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ClearCodeSpace();
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ClearCodeSpace();
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SetCodePtr(pageAligned);
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memset(instructionPopularityARM, 0, sizeof(instructionPopularityARM));
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for (int i = 0; i < 3; i++)
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for (int i = 0; i < 3; i++)
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{
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{
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for (int j = 0; j < 2; j++)
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for (int j = 0; j < 2; j++)
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@ -118,7 +123,7 @@ Compiler::Compiler()
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SetJumpTarget(und);
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SetJumpTarget(und);
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MOV(32, R(ABI_PARAM3), MComplex(RCPU, ABI_PARAM2, SCALE_4, offsetof(ARM, R_UND)));
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MOV(32, R(ABI_PARAM3), MComplex(RCPU, ABI_PARAM2, SCALE_4, offsetof(ARM, R_UND)));
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RET();
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RET();
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}
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}
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{
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{
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// RSCRATCH mode
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// RSCRATCH mode
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// ABI_PARAM2 reg n
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// ABI_PARAM2 reg n
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@ -163,7 +168,10 @@ Compiler::Compiler()
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RET();
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RET();
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}
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}
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ResetStart = (void*)GetWritableCodePtr();
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// move the region forward to prevent overwriting the generated functions
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region_size -= GetWritableCodePtr() - region;
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total_region_size = region_size;
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region = GetWritableCodePtr();
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}
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}
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void Compiler::LoadCPSR()
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void Compiler::LoadCPSR()
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@ -338,7 +346,7 @@ const Compiler::CompileFunc T_Comp[ARMInstrInfo::tk_Count] = {
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void Compiler::Reset()
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void Compiler::Reset()
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{
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{
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SetCodePtr((u8*)ResetStart);
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ClearCodeSpace();
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}
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}
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CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrsCount)
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CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrsCount)
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@ -375,9 +383,6 @@ CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrs
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? T_Comp[CurInstr.Info.Kind]
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? T_Comp[CurInstr.Info.Kind]
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: A_Comp[CurInstr.Info.Kind];
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: A_Comp[CurInstr.Info.Kind];
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if (!Thumb)
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instructionPopularityARM[CurInstr.Info.Kind] += comp == NULL;
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if (comp == NULL || i == instrsCount - 1)
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if (comp == NULL || i == instrsCount - 1)
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{
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{
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MOV(32, MDisp(RCPU, offsetof(ARM, R[15])), Imm32(R15));
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MOV(32, MDisp(RCPU, offsetof(ARM, R[15])), Imm32(R15));
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@ -132,7 +132,6 @@ public:
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return Gen::R(RegCache.Mapping[reg]);
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return Gen::R(RegCache.Mapping[reg]);
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}
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}
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void* ResetStart;
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void* MemoryFuncs9[3][2];
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void* MemoryFuncs9[3][2];
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void* MemoryFuncs7[3][2][2];
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void* MemoryFuncs7[3][2][2];
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@ -49,20 +49,23 @@ add_library(core STATIC
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WifiAP.cpp
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WifiAP.cpp
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tiny-AES-c/aes.c
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tiny-AES-c/aes.c
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ARMJIT.cpp
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ARMJIT_x64/ARMJIT_Compiler.cpp
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ARMJIT_x64/ARMJIT_ALU.cpp
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ARMJIT_x64/ARMJIT_LoadStore.cpp
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ARMJIT_x64/ARMJIT_Branch.cpp
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dolphin/CommonFuncs.cpp
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dolphin/x64ABI.cpp
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dolphin/x64CPUDetect.cpp
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dolphin/x64Emitter.cpp
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dolphin/MemoryUtil.cpp
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)
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)
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if (ENABLE_JIT)
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target_sources(core PRIVATE
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ARMJIT.cpp
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ARMJIT_x64/ARMJIT_Compiler.cpp
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ARMJIT_x64/ARMJIT_ALU.cpp
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ARMJIT_x64/ARMJIT_LoadStore.cpp
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ARMJIT_x64/ARMJIT_Branch.cpp
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dolphin/CommonFuncs.cpp
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dolphin/x64ABI.cpp
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dolphin/x64CPUDetect.cpp
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dolphin/x64Emitter.cpp
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)
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endif()
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if (WIN32)
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if (WIN32)
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target_link_libraries(core ole32 comctl32 ws2_32 opengl32)
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target_link_libraries(core ole32 comctl32 ws2_32 opengl32)
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else()
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else()
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12
src/CP15.cpp
12
src/CP15.cpp
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@ -813,7 +813,9 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
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{
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{
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DataCycles = 1;
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DataCycles = 1;
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*(u8*)&ITCM[addr & 0x7FFF] = val;
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*(u8*)&ITCM[addr & 0x7FFF] = val;
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#ifdef JIT_ENABLED
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
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#endif
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return;
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return;
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}
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}
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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@ -835,7 +837,9 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
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{
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{
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DataCycles = 1;
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DataCycles = 1;
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*(u16*)&ITCM[addr & 0x7FFF] = val;
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*(u16*)&ITCM[addr & 0x7FFF] = val;
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#ifdef JIT_ENABLED
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
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#endif
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return;
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return;
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}
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}
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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@ -857,8 +861,10 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
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{
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{
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DataCycles = 1;
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DataCycles = 1;
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*(u32*)&ITCM[addr & 0x7FFF] = val;
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*(u32*)&ITCM[addr & 0x7FFF] = val;
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#ifdef JIT_ENABLED
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
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ARMJIT::cache.ARM9_ITCM[((addr + 2) & 0x7FFF) >> 1] = NULL;
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ARMJIT::cache.ARM9_ITCM[((addr + 2) & 0x7FFF) >> 1] = NULL;
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#endif
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return;
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return;
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}
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}
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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@ -880,8 +886,10 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
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{
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{
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DataCycles += 1;
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DataCycles += 1;
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*(u32*)&ITCM[addr & 0x7FFF] = val;
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*(u32*)&ITCM[addr & 0x7FFF] = val;
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2] = NULL;
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#ifdef JIT_ENABLED
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2 + 1] = NULL;
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ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
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ARMJIT::cache.ARM9_ITCM[((addr & 0x7FFF) >> 1) + 1] = NULL;
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#endif
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return;
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return;
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}
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}
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
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@ -37,8 +37,10 @@ char DSiBIOS7Path[1024];
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char DSiFirmwarePath[1024];
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char DSiFirmwarePath[1024];
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char DSiNANDPath[1024];
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char DSiNANDPath[1024];
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#ifdef JIT_ENABLED
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bool JIT_Enable = false;
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bool JIT_Enable = false;
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int JIT_MaxBlockSize = 12;
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int JIT_MaxBlockSize = 12;
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#endif
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ConfigEntry ConfigFile[] =
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ConfigEntry ConfigFile[] =
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{
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{
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@ -51,8 +53,10 @@ ConfigEntry ConfigFile[] =
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{"DSiFirmwarePath", 1, DSiFirmwarePath, 0, "", 1023},
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{"DSiFirmwarePath", 1, DSiFirmwarePath, 0, "", 1023},
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{"DSiNANDPath", 1, DSiNANDPath, 0, "", 1023},
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{"DSiNANDPath", 1, DSiNANDPath, 0, "", 1023},
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#ifdef JIT_ENABLED
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{"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
|
{"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
|
||||||
{"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 10, NULL, 0},
|
{"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 10, NULL, 0},
|
||||||
|
#endif
|
||||||
|
|
||||||
{"", -1, NULL, 0, NULL, 0}
|
{"", -1, NULL, 0, NULL, 0}
|
||||||
};
|
};
|
||||||
|
|
|
@ -51,8 +51,10 @@ extern char DSiBIOS7Path[1024];
|
||||||
extern char DSiFirmwarePath[1024];
|
extern char DSiFirmwarePath[1024];
|
||||||
extern char DSiNANDPath[1024];
|
extern char DSiNANDPath[1024];
|
||||||
|
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
extern bool JIT_Enable;
|
extern bool JIT_Enable;
|
||||||
extern int JIT_MaxBlockSize;
|
extern int JIT_MaxBlockSize;
|
||||||
|
#endif
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
26
src/NDS.cpp
26
src/NDS.cpp
|
@ -169,7 +169,9 @@ bool Init()
|
||||||
ARM9 = new ARMv5();
|
ARM9 = new ARMv5();
|
||||||
ARM7 = new ARMv4();
|
ARM7 = new ARMv4();
|
||||||
|
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::Init();
|
ARMJIT::Init();
|
||||||
|
#endif
|
||||||
|
|
||||||
DMAs[0] = new DMA(0, 0);
|
DMAs[0] = new DMA(0, 0);
|
||||||
DMAs[1] = new DMA(0, 1);
|
DMAs[1] = new DMA(0, 1);
|
||||||
|
@ -203,7 +205,9 @@ void DeInit()
|
||||||
delete ARM9;
|
delete ARM9;
|
||||||
delete ARM7;
|
delete ARM7;
|
||||||
|
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::DeInit();
|
ARMJIT::DeInit();
|
||||||
|
#endif
|
||||||
|
|
||||||
for (int i = 0; i < 8; i++)
|
for (int i = 0; i < 8; i++)
|
||||||
delete DMAs[i];
|
delete DMAs[i];
|
||||||
|
@ -566,7 +570,9 @@ void Reset()
|
||||||
KeyCnt = 0;
|
KeyCnt = 0;
|
||||||
RCnt = 0;
|
RCnt = 0;
|
||||||
|
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::InvalidateBlockCache();
|
ARMJIT::InvalidateBlockCache();
|
||||||
|
#endif
|
||||||
|
|
||||||
NDSCart::Reset();
|
NDSCart::Reset();
|
||||||
GBACart::Reset();
|
GBACart::Reset();
|
||||||
|
@ -794,10 +800,12 @@ bool DoSavestate(Savestate* file)
|
||||||
GPU::SetPowerCnt(PowerControl9);
|
GPU::SetPowerCnt(PowerControl9);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
if (!file->Saving)
|
if (!file->Saving)
|
||||||
{
|
{
|
||||||
ARMJIT::InvalidateBlockCache();
|
ARMJIT::InvalidateBlockCache();
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
@ -923,9 +931,11 @@ u32 RunFrame()
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
if (EnableJIT)
|
if (EnableJIT)
|
||||||
ARM9->ExecuteJIT();
|
ARM9->ExecuteJIT();
|
||||||
else
|
else
|
||||||
|
#endif
|
||||||
ARM9->Execute();
|
ARM9->Execute();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -949,9 +959,11 @@ u32 RunFrame()
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
if (EnableJIT)
|
if (EnableJIT)
|
||||||
ARM7->ExecuteJIT();
|
ARM7->ExecuteJIT();
|
||||||
else
|
else
|
||||||
|
#endif
|
||||||
ARM7->Execute();
|
ARM7->Execute();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -984,9 +996,11 @@ u32 RunFrame()
|
||||||
|
|
||||||
u32 RunFrame()
|
u32 RunFrame()
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
if (Config::JIT_Enable)
|
if (Config::JIT_Enable)
|
||||||
return RunFrame<true>();
|
return RunFrame<true>();
|
||||||
else
|
else
|
||||||
|
#endif
|
||||||
return RunFrame<false>();
|
return RunFrame<false>();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1998,7 +2012,9 @@ u32 ARM9Read32(u32 addr)
|
||||||
|
|
||||||
void ARM9Write8(u32 addr, u8 val)
|
void ARM9Write8(u32 addr, u8 val)
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::Invalidate16(0, addr);
|
ARMJIT::Invalidate16(0, addr);
|
||||||
|
#endif
|
||||||
|
|
||||||
switch (addr & 0xFF000000)
|
switch (addr & 0xFF000000)
|
||||||
{
|
{
|
||||||
|
@ -2050,7 +2066,9 @@ void ARM9Write8(u32 addr, u8 val)
|
||||||
|
|
||||||
void ARM9Write16(u32 addr, u16 val)
|
void ARM9Write16(u32 addr, u16 val)
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::Invalidate16(0, addr);
|
ARMJIT::Invalidate16(0, addr);
|
||||||
|
#endif
|
||||||
|
|
||||||
switch (addr & 0xFF000000)
|
switch (addr & 0xFF000000)
|
||||||
{
|
{
|
||||||
|
@ -2118,7 +2136,9 @@ void ARM9Write16(u32 addr, u16 val)
|
||||||
|
|
||||||
void ARM9Write32(u32 addr, u32 val)
|
void ARM9Write32(u32 addr, u32 val)
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::Invalidate32(0, addr);
|
ARMJIT::Invalidate32(0, addr);
|
||||||
|
#endif
|
||||||
|
|
||||||
switch (addr & 0xFF000000)
|
switch (addr & 0xFF000000)
|
||||||
{
|
{
|
||||||
|
@ -2414,7 +2434,9 @@ u32 ARM7Read32(u32 addr)
|
||||||
|
|
||||||
void ARM7Write8(u32 addr, u8 val)
|
void ARM7Write8(u32 addr, u8 val)
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::Invalidate16(1, addr);
|
ARMJIT::Invalidate16(1, addr);
|
||||||
|
#endif
|
||||||
|
|
||||||
switch (addr & 0xFF800000)
|
switch (addr & 0xFF800000)
|
||||||
{
|
{
|
||||||
|
@ -2475,7 +2497,9 @@ void ARM7Write8(u32 addr, u8 val)
|
||||||
|
|
||||||
void ARM7Write16(u32 addr, u16 val)
|
void ARM7Write16(u32 addr, u16 val)
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::Invalidate16(1, addr);
|
ARMJIT::Invalidate16(1, addr);
|
||||||
|
#endif
|
||||||
|
|
||||||
switch (addr & 0xFF800000)
|
switch (addr & 0xFF800000)
|
||||||
{
|
{
|
||||||
|
@ -2546,7 +2570,9 @@ void ARM7Write16(u32 addr, u16 val)
|
||||||
|
|
||||||
void ARM7Write32(u32 addr, u32 val)
|
void ARM7Write32(u32 addr, u32 val)
|
||||||
{
|
{
|
||||||
|
#ifdef JIT_ENABLED
|
||||||
ARMJIT::Invalidate32(1, addr);
|
ARMJIT::Invalidate32(1, addr);
|
||||||
|
#endif
|
||||||
|
|
||||||
switch (addr & 0xFF800000)
|
switch (addr & 0xFF800000)
|
||||||
{
|
{
|
||||||
|
|
|
@ -9,7 +9,6 @@
|
||||||
|
|
||||||
#include "Assert.h"
|
#include "Assert.h"
|
||||||
#include "../types.h"
|
#include "../types.h"
|
||||||
#include "MemoryUtil.h"
|
|
||||||
|
|
||||||
namespace Common
|
namespace Common
|
||||||
{
|
{
|
||||||
|
@ -41,8 +40,6 @@ public:
|
||||||
CodeBlock() = default;
|
CodeBlock() = default;
|
||||||
virtual ~CodeBlock()
|
virtual ~CodeBlock()
|
||||||
{
|
{
|
||||||
if (region)
|
|
||||||
FreeCodeSpace();
|
|
||||||
}
|
}
|
||||||
CodeBlock(const CodeBlock&) = delete;
|
CodeBlock(const CodeBlock&) = delete;
|
||||||
CodeBlock& operator=(const CodeBlock&) = delete;
|
CodeBlock& operator=(const CodeBlock&) = delete;
|
||||||
|
|
Loading…
Reference in New Issue