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fix some multiply timings

This commit is contained in:
Jaklyy 2024-07-19 17:56:43 -04:00
parent 13578a3cc9
commit 7cd50e7b56
1 changed files with 4 additions and 4 deletions
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8
src/ARMInterpreter_ALU.cpp
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@ -836,7 +836,7 @@ void A_UMULL(ARM* cpu)
u32 cycles; u32 cycles;
if (cpu->Num == 0) if (cpu->Num == 0)
cycles = (cpu->CurInstr & (1<<20)) ? 3 : 1; cycles = (cpu->CurInstr & (1<<20)) ? 4 : 2;
else else
{ {
if ((rs & 0xFFFFFF00) == 0x00000000) cycles = 2; if ((rs & 0xFFFFFF00) == 0x00000000) cycles = 2;
@ -869,7 +869,7 @@ void A_UMLAL(ARM* cpu)
u32 cycles; u32 cycles;
if (cpu->Num == 0) if (cpu->Num == 0)
cycles = (cpu->CurInstr & (1<<20)) ? 3 : 1; cycles = (cpu->CurInstr & (1<<20)) ? 4 : 2;
else else
{ {
if ((rs & 0xFFFFFF00) == 0x00000000) cycles = 2; if ((rs & 0xFFFFFF00) == 0x00000000) cycles = 2;
@ -899,7 +899,7 @@ void A_SMULL(ARM* cpu)
u32 cycles; u32 cycles;
if (cpu->Num == 0) if (cpu->Num == 0)
cycles = (cpu->CurInstr & (1<<20)) ? 3 : 1; cycles = (cpu->CurInstr & (1<<20)) ? 4 : 2;
else else
{ {
if ((rs & 0xFFFFFF00) == 0x00000000 || (rs & 0xFFFFFF00) == 0xFFFFFF00) cycles = 2; if ((rs & 0xFFFFFF00) == 0x00000000 || (rs & 0xFFFFFF00) == 0xFFFFFF00) cycles = 2;
@ -932,7 +932,7 @@ void A_SMLAL(ARM* cpu)
u32 cycles; u32 cycles;
if (cpu->Num == 0) if (cpu->Num == 0)
cycles = (cpu->CurInstr & (1<<20)) ? 3 : 1; cycles = (cpu->CurInstr & (1<<20)) ? 4 : 2;
else else
{ {
if ((rs & 0xFFFFFF00) == 0x00000000 || (rs & 0xFFFFFF00) == 0xFFFFFF00) cycles = 2; if ((rs & 0xFFFFFF00) == 0x00000000 || (rs & 0xFFFFFF00) == 0xFFFFFF00) cycles = 2;