should addr writes to the fifo take 1 cycle? probably?

This commit is contained in:
Jaklyy 2024-10-09 18:06:17 -04:00
parent 35c382acab
commit 746f6edb0a
1 changed files with 3 additions and 3 deletions

View File

@ -1297,7 +1297,7 @@ bool ARMv5::DataWrite8(u32 addr, u8 val)
}
else
{
DataCycles = 1;
DataCycles = 2;
WriteBufferWrite(addr, 3, 1);
WriteBufferWrite(val, 0, MemTimings[addr >> 12][1], addr);
}
@ -1356,7 +1356,7 @@ bool ARMv5::DataWrite16(u32 addr, u16 val)
}
else
{
DataCycles = 1;
DataCycles = 2;
WriteBufferWrite(addr, 3, 1);
WriteBufferWrite(val, 1, MemTimings[addr >> 12][1], addr);
}
@ -1415,7 +1415,7 @@ bool ARMv5::DataWrite32(u32 addr, u32 val)
}
else
{
DataCycles = 1;
DataCycles = 2;
WriteBufferWrite(addr, 3, 1);
WriteBufferWrite(val, 2, MemTimings[addr >> 12][2], addr);
}