From 66a58f74784037c3736f1fc0945e608248842d22 Mon Sep 17 00:00:00 2001 From: Arisotura Date: Sat, 11 Sep 2021 23:59:23 +0200 Subject: [PATCH] misc. DSP fixoring (still doesn't work) --- src/DSi_DSP.cpp | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/DSi_DSP.cpp b/src/DSi_DSP.cpp index 41fbc70d..328f01d8 100644 --- a/src/DSi_DSP.cpp +++ b/src/DSi_DSP.cpp @@ -206,7 +206,7 @@ void OnMBKCfg(char bank, u32 slot, u8 oldcfg, u8 newcfg, u8* nwrambacking) inline bool IsDSPCoreEnabled() { - return (DSi::SCFG_Clock9 & (1<<1)) && SCFG_RST && (DSP_PCFG & (1<<0)); + return (DSi::SCFG_Clock9 & (1<<1)) && SCFG_RST && (!(DSP_PCFG & (1<<0))); } bool DSPCatchUp() @@ -384,7 +384,7 @@ u16 PDataDMAReadMMIO() } u8 Read8(u32 addr) -{printf("DSP READ8 %08X\n", addr); +{ if (!(DSi::SCFG_EXT[0] & (1<<18))) return 0; @@ -413,7 +413,7 @@ u8 Read8(u32 addr) return 0; } u16 Read16(u32 addr) -{printf("DSP READ16 %08X\n", addr); +{ if (!(DSi::SCFG_EXT[0] & (1<<18))) return 0; @@ -466,7 +466,7 @@ u32 Read32(u32 addr) } void Write8(u32 addr, u8 val) -{printf("DSP WRITE8 %08X %02X\n", addr, val); +{ if (!(DSi::SCFG_EXT[0] & (1<<18))) return; if (!DSPCatchUp()) return; @@ -488,7 +488,7 @@ void Write8(u32 addr, u8 val) } } void Write16(u32 addr, u16 val) -{printf("DSP WRITE16 %08X %04X\n", addr, val); +{ if (!(DSi::SCFG_EXT[0] & (1<<18))) return; if (!DSPCatchUp()) return; @@ -560,6 +560,7 @@ void Run(u32 cycles) DSPTimestamp += cycles; + NDS::CancelEvent(NDS::Event_DSi_DSP); NDS::ScheduleEvent(NDS::Event_DSi_DSP, false, 16384/*from citra (TeakraSlice)*/, DSPCatchUpU32, 0); }