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NDSCart: KEY1-gap delays don't apply when the WR bit is set. fixes #377

This commit is contained in:
Arisotura 2019-03-26 18:34:01 +01:00
parent 5941d57236
commit 633fb0f555
1 changed files with 8 additions and 2 deletions
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8
src/NDSCart.cpp
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@ -1260,8 +1260,14 @@ void WriteROMCnt(u32 val)
// TODO: advance read position if bit28 is set
u32 xfercycle = (ROMCnt & (1<<27)) ? 8 : 5;
u32 cmddelay = 8 + (ROMCnt & 0x1FFF);
u32 cmddelay = 8;
// delays are only applied when the WR bit is cleared
if (!(ROMCnt & (1<<30)))
{
cmddelay += (ROMCnt & 0x1FFF);
if (datasize) cmddelay += ((ROMCnt >> 16) & 0x3F);
}
if (datasize == 0)
NDS::ScheduleEvent(NDS::Event_ROMTransfer, false, xfercycle*cmddelay, ROMEndTransfer, 0);