directly set VRAMDirty for VRAM BG/OAM writes
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97643586fa
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58dd1ec580
40
src/GPU.cpp
40
src/GPU.cpp
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@ -93,8 +93,7 @@ std::unique_ptr<GPU2D> GPU2D_B = {};
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we don't want to completely invalidate them every time they're unmapped and remapped
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For this reason we don't track the dirtyness per mapping region, but instead per VRAM bank
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with VRAMDirty. Writes to LCDC go directly into VRAMDirty, while writes via other mapping regions
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like BG or OBJ are first tracked in VRAMWritten_* and need to be flushed using SyncDirtyFlags.
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with VRAMDirty.
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This is more or less a description of VRAMTrackingSet::DeriveState
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Each time before the memory is read two things could have happened
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@ -120,13 +119,6 @@ VRAMTrackingSet<8*1024, 8*1024> VRAMDirty_BOBJExtPal;
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VRAMTrackingSet<512*1024, 128*1024> VRAMDirty_Texture;
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VRAMTrackingSet<128*1024, 16*1024> VRAMDirty_TexPal;
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NonStupidBitField<512*1024/VRAMDirtyGranularity> VRAMWritten_ABG;
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NonStupidBitField<256*1024/VRAMDirtyGranularity> VRAMWritten_AOBJ;
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NonStupidBitField<128*1024/VRAMDirtyGranularity> VRAMWritten_BBG;
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NonStupidBitField<128*1024/VRAMDirtyGranularity> VRAMWritten_BOBJ;
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NonStupidBitField<256*1024/VRAMDirtyGranularity> VRAMWritten_ARM7;
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NonStupidBitField<128*1024/VRAMDirtyGranularity> VRAMDirty[9];
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u8 VRAMFlat_ABG[512*1024];
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@ -1028,8 +1020,6 @@ void StartHBlank(u32 line)
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DispStat[0] |= (1<<1);
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DispStat[1] |= (1<<1);
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SyncDirtyFlags();
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if (VCount < 192)
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{
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// draw
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@ -1266,34 +1256,6 @@ template NonStupidBitField<128*1024/VRAMDirtyGranularity> VRAMTrackingSet<128*10
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template NonStupidBitField<256*1024/VRAMDirtyGranularity> VRAMTrackingSet<256*1024, 16*1024>::DeriveState(u32*);
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template NonStupidBitField<512*1024/VRAMDirtyGranularity> VRAMTrackingSet<512*1024, 16*1024>::DeriveState(u32*);
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template <u32 Size>
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void SyncDirtyFlags(u32* mappings, NonStupidBitField<Size>& writtenFlags)
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{
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const u32 VRAMWrittenBitsPer16KB = 16*1024/VRAMDirtyGranularity;
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for (typename NonStupidBitField<Size>::Iterator it = writtenFlags.Begin(); it != writtenFlags.End(); it++)
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{
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u32 mapping = mappings[*it / VRAMWrittenBitsPer16KB];
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while (mapping != 0)
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{
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u32 num = __builtin_ctz(mapping);
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VRAMDirty[num][*it & (VRAMMask[num] / VRAMDirtyGranularity)] = true;
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mapping &= ~(1 << num);
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}
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}
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writtenFlags.Clear();
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}
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void SyncDirtyFlags()
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{
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SyncDirtyFlags(VRAMMap_ABG, VRAMWritten_ABG);
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SyncDirtyFlags(VRAMMap_AOBJ, VRAMWritten_AOBJ);
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SyncDirtyFlags(VRAMMap_BBG, VRAMWritten_BBG);
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SyncDirtyFlags(VRAMMap_BOBJ, VRAMWritten_BOBJ);
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}
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template <u32 MappingGranularity, u32 Size>
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inline bool CopyLinearVRAM(u8* flat, u32* mappings, NonStupidBitField<Size>& dirty, u64 (*slowAccess)(u32 addr))
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{
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115
src/GPU.h
115
src/GPU.h
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@ -82,11 +82,6 @@ extern int Renderer;
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const u32 VRAMDirtyGranularity = 512;
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extern NonStupidBitField<512*1024/VRAMDirtyGranularity> VRAMWritten_ABG;
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extern NonStupidBitField<256*1024/VRAMDirtyGranularity> VRAMWritten_AOBJ;
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extern NonStupidBitField<128*1024/VRAMDirtyGranularity> VRAMWritten_BBG;
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extern NonStupidBitField<128*1024/VRAMDirtyGranularity> VRAMWritten_BOBJ;
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extern NonStupidBitField<128*1024/VRAMDirtyGranularity> VRAMDirty[9];
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template <u32 Size, u32 MappingGranularity>
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@ -350,15 +345,41 @@ void WriteVRAM_ABG(u32 addr, T val)
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{
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u32 mask = VRAMMap_ABG[(addr >> 14) & 0x1F];
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VRAMWritten_ABG[(addr & 0x7FFFF) / VRAMDirtyGranularity] = true;
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if (mask & (1<<0)) *(T*)&VRAM_A[addr & 0x1FFFF] = val;
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if (mask & (1<<1)) *(T*)&VRAM_B[addr & 0x1FFFF] = val;
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if (mask & (1<<2)) *(T*)&VRAM_C[addr & 0x1FFFF] = val;
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if (mask & (1<<3)) *(T*)&VRAM_D[addr & 0x1FFFF] = val;
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if (mask & (1<<4)) *(T*)&VRAM_E[addr & 0xFFFF] = val;
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if (mask & (1<<5)) *(T*)&VRAM_F[addr & 0x3FFF] = val;
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if (mask & (1<<6)) *(T*)&VRAM_G[addr & 0x3FFF] = val;
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if (mask & (1<<0))
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{
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VRAMDirty[0][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_A[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<1))
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{
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VRAMDirty[1][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_B[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<2))
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{
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VRAMDirty[2][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_C[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<3))
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{
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VRAMDirty[3][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_D[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<4))
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{
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VRAMDirty[4][(addr & 0xFFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_E[addr & 0xFFFF] = val;
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}
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if (mask & (1<<5))
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{
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VRAMDirty[5][(addr & 0x3FFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_F[addr & 0x3FFF] = val;
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}
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if (mask & (1<<6))
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{
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VRAMDirty[6][(addr & 0x3FFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_G[addr & 0x3FFF] = val;
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}
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}
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@ -385,13 +406,31 @@ void WriteVRAM_AOBJ(u32 addr, T val)
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{
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u32 mask = VRAMMap_AOBJ[(addr >> 14) & 0xF];
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VRAMWritten_AOBJ[(addr & 0x3FFFF) / VRAMDirtyGranularity] = true;
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if (mask & (1<<0)) *(T*)&VRAM_A[addr & 0x1FFFF] = val;
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if (mask & (1<<1)) *(T*)&VRAM_B[addr & 0x1FFFF] = val;
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if (mask & (1<<4)) *(T*)&VRAM_E[addr & 0xFFFF] = val;
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if (mask & (1<<5)) *(T*)&VRAM_F[addr & 0x3FFF] = val;
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if (mask & (1<<6)) *(T*)&VRAM_G[addr & 0x3FFF] = val;
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if (mask & (1<<0))
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{
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VRAMDirty[0][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_A[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<1))
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{
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VRAMDirty[1][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_B[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<4))
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{
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VRAMDirty[4][(addr & 0xFFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_E[addr & 0xFFFF] = val;
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}
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if (mask & (1<<5))
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{
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VRAMDirty[5][(addr & 0x3FFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_F[addr & 0x3FFF] = val;
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}
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if (mask & (1<<6))
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{
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VRAMDirty[6][(addr & 0x3FFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_G[addr & 0x3FFF] = val;
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}
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}
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@ -416,11 +455,21 @@ void WriteVRAM_BBG(u32 addr, T val)
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{
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u32 mask = VRAMMap_BBG[(addr >> 14) & 0x7];
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VRAMWritten_BBG[(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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if (mask & (1<<2)) *(T*)&VRAM_C[addr & 0x1FFFF] = val;
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if (mask & (1<<7)) *(T*)&VRAM_H[addr & 0x7FFF] = val;
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if (mask & (1<<8)) *(T*)&VRAM_I[addr & 0x3FFF] = val;
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if (mask & (1<<2))
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{
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VRAMDirty[2][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_C[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<7))
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{
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VRAMDirty[7][(addr & 0x7FFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_H[addr & 0x7FFF] = val;
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}
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if (mask & (1<<8))
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{
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VRAMDirty[8][(addr & 0x3FFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_I[addr & 0x3FFF] = val;
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}
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}
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@ -444,10 +493,16 @@ void WriteVRAM_BOBJ(u32 addr, T val)
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{
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u32 mask = VRAMMap_BOBJ[(addr >> 14) & 0x7];
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VRAMWritten_BOBJ[(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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if (mask & (1<<3)) *(T*)&VRAM_D[addr & 0x1FFFF] = val;
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if (mask & (1<<8)) *(T*)&VRAM_I[addr & 0x3FFF] = val;
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if (mask & (1<<3))
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{
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VRAMDirty[3][(addr & 0x1FFFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_D[addr & 0x1FFFF] = val;
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}
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if (mask & (1<<8))
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{
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VRAMDirty[8][(addr & 0x3FFF) / VRAMDirtyGranularity] = true;
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*(T*)&VRAM_I[addr & 0x3FFF] = val;
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}
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}
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template<typename T>
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