jit: decrease blockcache AddrMapping size for ARM9
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03b321f540
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4deecc7d65
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@ -609,14 +609,14 @@ void ARMv5::ExecuteJIT()
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while (NDS::ARM9Timestamp < NDS::ARM9Target)
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while (NDS::ARM9Timestamp < NDS::ARM9Target)
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{
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{
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u32 instrAddr = R[15] - ((CPSR&0x20)?2:4);
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u32 instrAddr = R[15] - ((CPSR&0x20)?2:4);
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if (!ARMJIT::IsMapped(0, instrAddr))
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if (!ARMJIT::IsMapped<0>(instrAddr))
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{
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{
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NDS::ARM9Timestamp = NDS::ARM9Target;
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NDS::ARM9Timestamp = NDS::ARM9Target;
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printf("ARMv5 PC in non executable region %08X\n", R[15]);
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printf("ARMv5 PC in non executable region %08X\n", R[15]);
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return;
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return;
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}
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}
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ARMJIT::CompiledBlock block = ARMJIT::LookUpBlock(0, instrAddr);
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ARMJIT::CompiledBlock block = ARMJIT::LookUpBlock<0>(instrAddr);
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Cycles += (block ? block : ARMJIT::CompileBlock(this))();
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Cycles += (block ? block : ARMJIT::CompileBlock(this))();
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if (Halted)
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if (Halted)
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@ -740,13 +740,13 @@ void ARMv4::ExecuteJIT()
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while (NDS::ARM7Timestamp < NDS::ARM7Target)
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while (NDS::ARM7Timestamp < NDS::ARM7Target)
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{
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{
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u32 instrAddr = R[15] - ((CPSR&0x20)?2:4);
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u32 instrAddr = R[15] - ((CPSR&0x20)?2:4);
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if (!ARMJIT::IsMapped(1, instrAddr))
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if (!ARMJIT::IsMapped<1>(instrAddr))
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{
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{
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NDS::ARM7Timestamp = NDS::ARM7Target;
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NDS::ARM7Timestamp = NDS::ARM7Target;
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printf("ARMv4 PC in non executable region %08X\n", R[15]);
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printf("ARMv4 PC in non executable region %08X\n", R[15]);
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return;
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return;
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}
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}
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ARMJIT::CompiledBlock block = ARMJIT::LookUpBlock(1, instrAddr);
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ARMJIT::CompiledBlock block = ARMJIT::LookUpBlock<1>(instrAddr);
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Cycles += (block ? block : ARMJIT::CompileBlock(this))();
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Cycles += (block ? block : ARMJIT::CompileBlock(this))();
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// TODO optimize this shit!!!
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// TODO optimize this shit!!!
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@ -109,11 +109,14 @@ void Init()
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{
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{
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memset(&cache, 0, sizeof(BlockCache));
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memset(&cache, 0, sizeof(BlockCache));
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for (int cpu = 0; cpu < 2; cpu++)
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for (int i = 0; i < 0x2000; i++)
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for (int i = 0; i < 0x4000; i++)
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cache.AddrMapping9[i] = JIT_MEM[0][i >> 8] == -1 ? NULL :
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cache.AddrMapping[cpu][i] = JIT_MEM[cpu][i >> 9] == -1 ? NULL :
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(CompiledBlock*)((u8*)&cache + JIT_MEM[0][i >> 8])
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(CompiledBlock*)((u8*)&cache + JIT_MEM[cpu][i >> 9])
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+ (((i << 15) & JIT_MASK[0][i >> 8]) >> 1);
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+ (((i << 14) & JIT_MASK[cpu][i >> 9]) >> 1);
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for (int i = 0; i < 0x4000; i++)
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cache.AddrMapping7[i] = JIT_MEM[1][i >> 9] == -1 ? NULL :
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(CompiledBlock*)((u8*)&cache + JIT_MEM[1][i >> 9])
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+ (((i << 14) & JIT_MASK[1][i >> 9]) >> 1);
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compiler = new Compiler();
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compiler = new Compiler();
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}
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}
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@ -175,7 +178,10 @@ CompiledBlock CompileBlock(ARM* cpu)
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CompiledBlock block = compiler->CompileBlock(cpu, instrs, i);
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CompiledBlock block = compiler->CompileBlock(cpu, instrs, i);
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InsertBlock(cpu->Num, blockAddr, block);
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if (cpu->Num == 0)
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InsertBlock<0>(blockAddr, block);
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else
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InsertBlock<1>(blockAddr, block);
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return block;
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return block;
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}
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}
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73
src/ARMJIT.h
73
src/ARMJIT.h
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@ -47,9 +47,11 @@ struct FetchedInstr
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a function which executes a block instructions starting from there.
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a function which executes a block instructions starting from there.
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The most significant 4 bits of each address is ignored. This 28 bit space is
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The most significant 4 bits of each address is ignored. This 28 bit space is
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divided into 0x4000 16 KB blocks, each of which a pointer to the relevant
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divided into 0x2000 32 KB for ARM9 and 0x4000 16 KB for ARM7, each of which
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place inside the before mentioned arrays. Only half of the bytes need to be
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a pointer to the relevant place inside the afore mentioned arrays. 32 and 16 KB
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addressed (ARM address are aligned to 4, Thumb addresses to a 2 byte boundary).
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are the sizes of the smallest contigous memory region mapped to the respective CPU.
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Because ARM addresses are always aligned to 4 bytes and Thumb to a 2 byte boundary,
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we only need every second half word to be adressable.
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In case a memory write hits mapped memory, the function block at this
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In case a memory write hits mapped memory, the function block at this
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address is set to null, so it's recompiled the next time it's executed.
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address is set to null, so it's recompiled the next time it's executed.
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@ -61,7 +63,8 @@ struct FetchedInstr
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struct BlockCache
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struct BlockCache
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{
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{
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CompiledBlock* AddrMapping[2][0x4000] = {0};
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CompiledBlock* AddrMapping9[0x2000] = {0};
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CompiledBlock* AddrMapping7[0x4000] = {0};
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CompiledBlock MainRAM[4*1024*1024/2];
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CompiledBlock MainRAM[4*1024*1024/2];
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CompiledBlock SWRAM[0x8000/2]; // Shared working RAM
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CompiledBlock SWRAM[0x8000/2]; // Shared working RAM
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@ -75,35 +78,63 @@ struct BlockCache
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extern BlockCache cache;
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extern BlockCache cache;
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inline bool IsMapped(u32 num, u32 addr)
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template <u32 num>
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inline bool IsMapped(u32 addr)
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{
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{
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return cache.AddrMapping[num][(addr & 0xFFFFFFF) >> 14];
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if (num == 0)
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return cache.AddrMapping9[(addr & 0xFFFFFFF) >> 15];
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else
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return cache.AddrMapping7[(addr & 0xFFFFFFF) >> 14];
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}
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}
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inline CompiledBlock LookUpBlock(u32 num, u32 addr)
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template <u32 num>
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inline CompiledBlock LookUpBlock(u32 addr)
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{
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{
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return cache.AddrMapping[num][(addr & 0xFFFFFFF) >> 14][(addr & 0x3FFF) >> 1];
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if (num == 0)
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return cache.AddrMapping9[(addr & 0xFFFFFFF) >> 15][(addr & 0x7FFF) >> 1];
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else
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return cache.AddrMapping7[(addr & 0xFFFFFFF) >> 14][(addr & 0x3FFF) >> 1];
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}
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}
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inline void Invalidate16(u32 num, u32 addr)
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template <u32 num>
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inline void Invalidate16(u32 addr)
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{
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{
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if (IsMapped(num, addr))
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if (IsMapped<num>(addr))
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cache.AddrMapping[num][(addr & 0xFFFFFFF) >> 14][(addr & 0x3FFF) >> 1] = NULL;
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}
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inline void Invalidate32(u32 num, u32 addr)
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{
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if (IsMapped(num, addr))
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{
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{
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CompiledBlock* page = cache.AddrMapping[num][(addr & 0xFFFFFFF) >> 14];
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if (num == 0)
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page[(addr & 0x3FFF) >> 1] = NULL;
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cache.AddrMapping9[(addr & 0xFFFFFFF) >> 15][(addr & 0x7FFF) >> 1] = NULL;
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page[((addr + 2) & 0x3FFF) >> 1] = NULL;
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else
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cache.AddrMapping7[(addr & 0xFFFFFFF) >> 14][(addr & 0x3FFF) >> 1] = NULL;
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}
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}
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}
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}
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inline void InsertBlock(u32 num, u32 addr, CompiledBlock func)
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template <u32 num>
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inline void Invalidate32(u32 addr)
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{
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{
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cache.AddrMapping[num][(addr & 0xFFFFFFF) >> 14][(addr & 0x3FFF) >> 1] = func;
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if (IsMapped<num>(addr))
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{
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if (num == 0)
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{
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CompiledBlock* page = cache.AddrMapping9[(addr & 0xFFFFFFF) >> 15];
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page[(addr & 0x7FFF) >> 1] = NULL;
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page[((addr + 2) & 0x7FFF) >> 1] = NULL;
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}
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else
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{
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CompiledBlock* page = cache.AddrMapping7[(addr & 0xFFFFFFF) >> 14];
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page[(addr & 0x3FFF) >> 1] = NULL;
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page[((addr + 2) & 0x3FFF) >> 1] = NULL;
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}
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}
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}
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template <u32 num>
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inline void InsertBlock(u32 addr, CompiledBlock func)
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{
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if (num == 0)
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cache.AddrMapping9[(addr & 0xFFFFFFF) >> 15][(addr & 0x7FFF) >> 1] = func;
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else
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cache.AddrMapping7[(addr & 0xFFFFFFF) >> 14][(addr & 0x3FFF) >> 1] = func;
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}
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}
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void Init();
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void Init();
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@ -363,7 +363,9 @@ CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrs
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CompiledBlock res = (CompiledBlock)GetWritableCodePtr();
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CompiledBlock res = (CompiledBlock)GetWritableCodePtr();
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if (!IsMapped(Num, R15 - Thumb ? 2 : 4))
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if (!(Num == 0
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? IsMapped<0>(R15 - (Thumb ? 2 : 4))
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: IsMapped<1>(R15 - (Thumb ? 2 : 4))))
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{
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{
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printf("Trying to compile a block in unmapped memory\n");
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printf("Trying to compile a block in unmapped memory\n");
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}
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}
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12
src/NDS.cpp
12
src/NDS.cpp
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@ -2013,7 +2013,7 @@ u32 ARM9Read32(u32 addr)
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void ARM9Write8(u32 addr, u8 val)
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void ARM9Write8(u32 addr, u8 val)
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{
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{
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#ifdef JIT_ENABLED
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#ifdef JIT_ENABLED
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ARMJIT::Invalidate16(0, addr);
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ARMJIT::Invalidate16<0>(addr);
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#endif
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#endif
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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@ -2067,7 +2067,7 @@ void ARM9Write8(u32 addr, u8 val)
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void ARM9Write16(u32 addr, u16 val)
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void ARM9Write16(u32 addr, u16 val)
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{
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{
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#ifdef JIT_ENABLED
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#ifdef JIT_ENABLED
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ARMJIT::Invalidate16(0, addr);
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ARMJIT::Invalidate16<0>(addr);
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#endif
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#endif
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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@ -2137,7 +2137,7 @@ void ARM9Write16(u32 addr, u16 val)
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void ARM9Write32(u32 addr, u32 val)
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void ARM9Write32(u32 addr, u32 val)
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{
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{
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#ifdef JIT_ENABLED
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#ifdef JIT_ENABLED
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ARMJIT::Invalidate32(0, addr);
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ARMJIT::Invalidate32<0>(addr);
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#endif
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#endif
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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@ -2435,7 +2435,7 @@ u32 ARM7Read32(u32 addr)
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void ARM7Write8(u32 addr, u8 val)
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void ARM7Write8(u32 addr, u8 val)
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{
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{
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#ifdef JIT_ENABLED
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#ifdef JIT_ENABLED
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ARMJIT::Invalidate16(1, addr);
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ARMJIT::Invalidate16<1>(addr);
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#endif
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#endif
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switch (addr & 0xFF800000)
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switch (addr & 0xFF800000)
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@ -2498,7 +2498,7 @@ void ARM7Write8(u32 addr, u8 val)
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void ARM7Write16(u32 addr, u16 val)
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void ARM7Write16(u32 addr, u16 val)
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{
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{
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#ifdef JIT_ENABLED
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#ifdef JIT_ENABLED
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ARMJIT::Invalidate16(1, addr);
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ARMJIT::Invalidate16<1>(addr);
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#endif
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#endif
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switch (addr & 0xFF800000)
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switch (addr & 0xFF800000)
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@ -2571,7 +2571,7 @@ void ARM7Write16(u32 addr, u16 val)
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void ARM7Write32(u32 addr, u32 val)
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void ARM7Write32(u32 addr, u32 val)
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{
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{
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#ifdef JIT_ENABLED
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#ifdef JIT_ENABLED
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ARMJIT::Invalidate32(1, addr);
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ARMJIT::Invalidate32<1>(addr);
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#endif
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#endif
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switch (addr & 0xFF800000)
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switch (addr & 0xFF800000)
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