diff --git a/src/NDS.cpp b/src/NDS.cpp
index b3e4d2c6..e8093137 100644
--- a/src/NDS.cpp
+++ b/src/NDS.cpp
@@ -2516,7 +2516,7 @@ u32 ARM7Read32(u32 addr)
               (GBACart::SRAMRead(addr+3) << 24);
     }
 
-    printf("unknown arm7 read32 %08X | %08X\n", addr, ARM7->R[15]);
+    //printf("unknown arm7 read32 %08X | %08X\n", addr, ARM7->R[15]);
     return 0;
 }
 
diff --git a/src/SPU.cpp b/src/SPU.cpp
index 8ae437e4..1de6a265 100644
--- a/src/SPU.cpp
+++ b/src/SPU.cpp
@@ -285,12 +285,26 @@ void Channel::FIFO_BufferData()
     if ((FIFOReadOffset + 16) > totallen)
         burstlen = totallen - FIFOReadOffset;
 
-    for (u32 i = 0; i < burstlen; i += 4)
+    // sound DMA can't read from the ARM7 BIOS
+    if ((SrcAddr + FIFOReadOffset) >= 0x00004000)
     {
-        FIFO[FIFOWritePos] = BusRead32(SrcAddr + FIFOReadOffset);
-        FIFOReadOffset += 4;
-        FIFOWritePos++;
-        FIFOWritePos &= 0x7;
+        for (u32 i = 0; i < burstlen; i += 4)
+        {
+            FIFO[FIFOWritePos] = BusRead32(SrcAddr + FIFOReadOffset);
+            FIFOReadOffset += 4;
+            FIFOWritePos++;
+            FIFOWritePos &= 0x7;
+        }
+    }
+    else
+    {
+        for (u32 i = 0; i < burstlen; i += 4)
+        {
+            FIFO[FIFOWritePos] = 0;
+            FIFOReadOffset += 4;
+            FIFOWritePos++;
+            FIFOWritePos &= 0x7;
+        }
     }
 
     FIFOLevel += burstlen;