NDSCart: enforce WR bit.
Bad Apple demo will break, because its NitroFS driver is broken. it needs a DLDI argv structure to exist in order to use its DLDI driver instead.
This commit is contained in:
parent
2ff065e5ea
commit
41cd092a15
|
@ -1816,12 +1816,12 @@ void WriteROMCnt(u32 val)
|
||||||
// commands that do writes will change this
|
// commands that do writes will change this
|
||||||
TransferDir = 0;
|
TransferDir = 0;
|
||||||
|
|
||||||
// TODO: how should we detect that the transfer should be a write?
|
|
||||||
// you're supposed to set bit30 of ROMCNT for a write, but it's also
|
|
||||||
// possible to do reads just fine when that bit is set
|
|
||||||
if (Cart)
|
if (Cart)
|
||||||
TransferDir = Cart->ROMCommandStart(TransferCmd, TransferData, TransferLen);
|
TransferDir = Cart->ROMCommandStart(TransferCmd, TransferData, TransferLen);
|
||||||
|
|
||||||
|
if ((datasize > 0) && (((ROMCnt >> 30) & 0x1) != TransferDir))
|
||||||
|
printf("NDSCART: !! BAD TRANSFER DIRECTION FOR CMD %02X, DIR=%d, ROMCNT=%08X\n", ROMCommand[0], TransferDir, ROMCnt);
|
||||||
|
|
||||||
ROMCnt &= ~(1<<23);
|
ROMCnt &= ~(1<<23);
|
||||||
|
|
||||||
// ROM transfer timings
|
// ROM transfer timings
|
||||||
|
@ -1869,6 +1869,8 @@ void AdvanceROMTransfer()
|
||||||
|
|
||||||
u32 ReadROMData()
|
u32 ReadROMData()
|
||||||
{
|
{
|
||||||
|
if (ROMCnt & (1<<30)) return 0;
|
||||||
|
|
||||||
if (ROMCnt & (1<<23))
|
if (ROMCnt & (1<<23))
|
||||||
{
|
{
|
||||||
AdvanceROMTransfer();
|
AdvanceROMTransfer();
|
||||||
|
@ -1879,6 +1881,8 @@ u32 ReadROMData()
|
||||||
|
|
||||||
void WriteROMData(u32 val)
|
void WriteROMData(u32 val)
|
||||||
{
|
{
|
||||||
|
if (!(ROMCnt & (1<<30))) return;
|
||||||
|
|
||||||
ROMData = val;
|
ROMData = val;
|
||||||
|
|
||||||
if (ROMCnt & (1<<23))
|
if (ROMCnt & (1<<23))
|
||||||
|
|
Loading…
Reference in New Issue