parent
fe3a189406
commit
296212ac49
8
ARM.cpp
8
ARM.cpp
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@ -74,14 +74,18 @@ void ARM::JumpTo(u32 addr, bool restorecpsr)
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{
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{
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if (restorecpsr)
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if (restorecpsr)
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{
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{
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//if (Num==1 && (CPSR&0x1F)==0x12)
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// printf("return from IRQ %08X -> %08X, SP=%08X, %08X\n", R[15], addr, R[13], Read32(0x0380FF7C));
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RestoreCPSR();
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RestoreCPSR();
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if (CPSR & 0x20) addr |= 0x1;
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if (CPSR & 0x20) addr |= 0x1;
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else addr &= ~0x1;
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else addr &= ~0x1;
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}
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}
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if (addr == 0x02000800)
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{
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printf("!!!!!!!! %08X\n", R[15]);
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printf("%08X %08X %08X %08X\n", Read32(0x02000000), Read32(0x0200000C), Read32(0x02000800), Read32(0x02000804));
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}
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if (addr & 0x1)
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if (addr & 0x1)
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{
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{
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addr &= ~0x1;
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addr &= ~0x1;
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@ -743,6 +743,7 @@ s32 T_STMIA(ARM* cpu)
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}
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}
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}
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}
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// TODO: check "Rb included in Rlist" case
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cpu->R[(cpu->CurInstr >> 8) & 0x7] = base;
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cpu->R[(cpu->CurInstr >> 8) & 0x7] = base;
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return cycles - C_S(1);
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return cycles - C_S(1);
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@ -764,7 +765,8 @@ s32 T_LDMIA(ARM* cpu)
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}
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}
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}
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}
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cpu->R[(cpu->CurInstr >> 8) & 0x7] = base;
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if (!(cpu->CurInstr & (1<<((cpu->CurInstr >> 8) & 0x7))))
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cpu->R[(cpu->CurInstr >> 8) & 0x7] = base;
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return cycles;
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return cycles;
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}
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}
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1
DMA.cpp
1
DMA.cpp
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@ -112,7 +112,6 @@ void DMA::Start()
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if (CurSrcAddr==0x04100010 && RemCount==1 && (Cnt & 0x07E00000)==0x07000000 &&
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if (CurSrcAddr==0x04100010 && RemCount==1 && (Cnt & 0x07E00000)==0x07000000 &&
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((CPU==0 && StartMode==0x06) || (CPU==1 && StartMode==0x12)))
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((CPU==0 && StartMode==0x06) || (CPU==1 && StartMode==0x12)))
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{
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{
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printf("CART DMA %08X\n", CurDstAddr);
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NDSCart::DMA(CurDstAddr);
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NDSCart::DMA(CurDstAddr);
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Cnt &= ~0x80000000;
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Cnt &= ~0x80000000;
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if (Cnt & 0x40000000)
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if (Cnt & 0x40000000)
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8
NDS.cpp
8
NDS.cpp
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@ -1146,8 +1146,6 @@ u32 ARM7Read32(u32 addr)
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void ARM7Write8(u32 addr, u8 val)
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void ARM7Write8(u32 addr, u8 val)
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{
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{
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if (addr==0x3807764) printf("DERP! %02X %08X\n", val, ARM7->R[15]);
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if (addr==0x27FFCE4) printf("FIRMWARE STATUS8 %04X %08X\n", val, ARM7->R[15]);
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switch (addr & 0xFF800000)
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switch (addr & 0xFF800000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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@ -1184,9 +1182,6 @@ void ARM7Write8(u32 addr, u8 val)
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void ARM7Write16(u32 addr, u16 val)
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void ARM7Write16(u32 addr, u16 val)
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{
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{
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if (addr == ARM7->R[15]) printf("!!!!!!!!!!!!7777 %08X %04X\n", addr, val);
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if (addr == ARM7->R[15]) printf("!!!!!!!!!!!!7777 %08X %04X\n", addr, val);
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if (addr==0x3807764) printf("DERP! %04X %08X\n", val, ARM7->R[15]);
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if (addr==0x27FF816) printf("RTC STATUS %04X %08X\n", val, ARM7->R[15]);
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if (addr==0x27FFCE4) printf("FIRMWARE STATUS %04X %08X\n", val, ARM7->R[15]);
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switch (addr & 0xFF800000)
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switch (addr & 0xFF800000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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@ -1227,7 +1222,6 @@ void ARM7Write16(u32 addr, u16 val)
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void ARM7Write32(u32 addr, u32 val)
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void ARM7Write32(u32 addr, u32 val)
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{
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{
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if (addr == ARM7->R[15]) printf("!!!!!!!!!!!!7777 %08X %08X\n", addr, val);
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if (addr == ARM7->R[15]) printf("!!!!!!!!!!!!7777 %08X %08X\n", addr, val);
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if (addr==0x27FFCE4) printf("FIRMWARE STATUS32 %08X %08X\n", val, ARM7->R[15]);
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switch (addr & 0xFF800000)
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switch (addr & 0xFF800000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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@ -2022,7 +2016,7 @@ void ARM7IOWrite32(u32 addr, u32 val)
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case 0x040000D0: DMAs[6]->WriteCnt(val); return;
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case 0x040000D0: DMAs[6]->WriteCnt(val); return;
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case 0x040000D4: DMAs[7]->SrcAddr = val; return;
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case 0x040000D4: DMAs[7]->SrcAddr = val; return;
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case 0x040000D8: DMAs[7]->DstAddr = val; return;
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case 0x040000D8: DMAs[7]->DstAddr = val; return;
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case 0x040000DC: DMAs[7]->WriteCnt(val); return;
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case 0x040000DC: DMAs[7]->WriteCnt(val); printf("start dma3 %08X %08X %08X\n", val, ARM7->R[15], ARM7Read32(ARM7->R[13]+24));return;
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case 0x04000100:
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case 0x04000100:
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Timers[4].Reload = val & 0xFFFF;
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Timers[4].Reload = val & 0xFFFF;
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43
NDSCart.cpp
43
NDSCart.cpp
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@ -38,6 +38,7 @@ bool CartInserted;
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u8* CartROM;
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u8* CartROM;
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u32 CartROMSize;
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u32 CartROMSize;
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u32 CartID;
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u32 CartID;
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bool CartIsHomebrew;
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u32 CmdEncMode;
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u32 CmdEncMode;
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u32 DataEncMode;
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u32 DataEncMode;
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@ -174,6 +175,7 @@ void Reset()
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CartROM = NULL;
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CartROM = NULL;
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CartROMSize = 0;
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CartROMSize = 0;
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CartID = 0;
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CartID = 0;
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CartIsHomebrew = false;
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CmdEncMode = 0;
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CmdEncMode = 0;
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DataEncMode = 0;
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DataEncMode = 0;
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@ -213,6 +215,30 @@ void LoadROM(char* path)
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// it just has to stay the same throughout gameplay
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// it just has to stay the same throughout gameplay
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CartID = 0x00001FC2;
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CartID = 0x00001FC2;
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u32 arm9base = *(u32*)&CartROM[0x20];
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if (arm9base < 0x8000)
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{
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if (arm9base >= 0x4000)
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{
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// reencrypt secure area if needed
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if (*(u32*)&CartROM[arm9base] == 0xE7FFDEFF)
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{
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printf("Re-encrypting cart secure area\n");
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strncpy((char*)&CartROM[arm9base], "encryObj", 8);
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Key1_InitKeycode(gamecode, 3, 2);
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for (u32 i = 0; i < 0x800; i += 8)
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Key1_Encrypt((u32*)&CartROM[arm9base + i]);
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Key1_InitKeycode(gamecode, 2, 2);
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Key1_Encrypt((u32*)&CartROM[arm9base]);
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}
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}
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else
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CartIsHomebrew = true;
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}
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// encryption
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// encryption
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Key1_InitKeycode(gamecode, 2, 2);
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Key1_InitKeycode(gamecode, 2, 2);
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}
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}
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@ -231,7 +257,11 @@ void ReadROM(u32 addr, u32 len, u32 offset)
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void ReadROM_B7(u32 addr, u32 len, u32 offset)
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void ReadROM_B7(u32 addr, u32 len, u32 offset)
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{
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{
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addr &= (CartROMSize-1);
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addr &= (CartROMSize-1);
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if (addr < 0x8000) addr = 0x8000 + (addr & 0x1FF);
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if (!CartIsHomebrew)
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{
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if (addr < 0x8000)
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addr = 0x8000 + (addr & 0x1FF);
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}
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memcpy(DataOut+offset, CartROM+addr, len);
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memcpy(DataOut+offset, CartROM+addr, len);
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}
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}
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*(u32*)&cmd[4] = *(u32*)&ROMCommand[4];
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*(u32*)&cmd[4] = *(u32*)&ROMCommand[4];
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}
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}
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printf("ROM COMMAND %04X %08X %02X%02X%02X%02X%02X%02X%02X%02X SIZE %04X\n",
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/*printf("ROM COMMAND %04X %08X %02X%02X%02X%02X%02X%02X%02X%02X SIZE %04X\n",
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SPICnt, ROMCnt,
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SPICnt, ROMCnt,
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cmd[0], cmd[1], cmd[2], cmd[3],
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cmd[0], cmd[1], cmd[2], cmd[3],
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cmd[4], cmd[5], cmd[6], cmd[7],
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cmd[4], cmd[5], cmd[6], cmd[7],
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datasize);
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datasize);*/
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switch (cmd[0])
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switch (cmd[0])
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{
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{
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*(u32*)&DataOut[pos] = CartID;
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*(u32*)&DataOut[pos] = CartID;
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break;
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break;
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case 0x20:
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{
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u32 addr = (cmd[2] & 0xF0) << 8;
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ReadROM(addr, 0x1000, 0);
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}
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break;
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case 0xA0:
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case 0xA0:
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CmdEncMode = 2;
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CmdEncMode = 2;
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break;
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break;
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@ -10,7 +10,7 @@
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1481161027 c:\documents\sources\melonds\types.h
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1481161027 c:\documents\sources\melonds\types.h
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1485111787 source:c:\documents\sources\melonds\nds.cpp
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1485133568 source:c:\documents\sources\melonds\nds.cpp
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<stdio.h>
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<stdio.h>
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<string.h>
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<string.h>
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"NDS.h"
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"NDS.h"
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"RTC.h"
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"RTC.h"
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"Wifi.h"
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"Wifi.h"
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1485106814 source:c:\documents\sources\melonds\arm.cpp
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1485133372 source:c:\documents\sources\melonds\arm.cpp
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<stdio.h>
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<stdio.h>
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"NDS.h"
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"NDS.h"
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"ARM.h"
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"ARM.h"
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@ -64,7 +64,7 @@
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1480957165 c:\documents\sources\melonds\arminterpreter_loadstore.h
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1480957165 c:\documents\sources\melonds\arminterpreter_loadstore.h
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1481203284 source:c:\documents\sources\melonds\arminterpreter_loadstore.cpp
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1485133521 source:c:\documents\sources\melonds\arminterpreter_loadstore.cpp
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<stdio.h>
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<stdio.h>
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"ARM.h"
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"ARM.h"
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@ -106,7 +106,7 @@
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1484612398 c:\documents\sources\melonds\fifo.h
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1484612398 c:\documents\sources\melonds\fifo.h
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"types.h"
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"types.h"
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1485113211 source:c:\documents\sources\melonds\dma.cpp
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1485133888 source:c:\documents\sources\melonds\dma.cpp
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<stdio.h>
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<stdio.h>
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"NDS.h"
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"NDS.h"
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"DMA.h"
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"DMA.h"
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1485112531 c:\documents\sources\melonds\ndscart.h
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1485112531 c:\documents\sources\melonds\ndscart.h
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"types.h"
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"types.h"
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1485112522 source:c:\documents\sources\melonds\ndscart.cpp
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1485134328 source:c:\documents\sources\melonds\ndscart.cpp
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<stdio.h>
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<stdio.h>
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<string.h>
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<string.h>
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"NDS.h"
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"NDS.h"
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