re-enable mainram dma

it's not bugged, it's also not inaccurate.
something else is the issue...
This commit is contained in:
Jaklyy 2024-12-16 09:06:28 -05:00
parent e77c2011bc
commit 29421f1d27
2 changed files with 35 additions and 137 deletions

View File

@ -215,7 +215,7 @@ u32 DMA::UnitTimings9_16(int burststart)
dst_n = NDS.ARM9MemTimings[dst_id][4];
dst_s = NDS.ARM9MemTimings[dst_id][5];
if (src_rgn == Mem9_MainRAM)
/*if (src_rgn == Mem9_MainRAM)
{
if (dst_rgn == Mem9_MainRAM)
{
@ -276,7 +276,7 @@ u32 DMA::UnitTimings9_16(int burststart)
return ((burststart == 2) ? src_n : src_s) + 7;
}
}
else if (src_rgn & dst_rgn)
else*/ if (src_rgn & dst_rgn)
{
if (burststart != 1)
return src_n + dst_n + (src_n == 1 || burststart <= 0);
@ -306,7 +306,7 @@ u32 DMA::UnitTimings9_32(int burststart)
dst_n = NDS.ARM9MemTimings[dst_id][6];
dst_s = NDS.ARM9MemTimings[dst_id][7];
if (src_rgn == Mem9_MainRAM)
/*if (src_rgn == Mem9_MainRAM)
{
if (dst_rgn == Mem9_MainRAM)
return (burststart == 2) ? 13 : 18;
@ -369,7 +369,7 @@ u32 DMA::UnitTimings9_32(int burststart)
return ((burststart == 2) ? src_n : src_s) + 8;
}
}
else if (src_rgn & dst_rgn)
else*/ if (src_rgn & dst_rgn)
{
if (burststart != 1)
return src_n + dst_n + (src_n == 1 || burststart <= 0);
@ -401,7 +401,7 @@ u32 DMA::UnitTimings7_16(int burststart)
dst_n = NDS.ARM7MemTimings[dst_id][0];
dst_s = NDS.ARM7MemTimings[dst_id][1];
if (src_rgn == Mem7_MainRAM)
/*if (src_rgn == Mem7_MainRAM)
{
if (dst_rgn == Mem7_MainRAM)
return 16;
@ -460,7 +460,7 @@ u32 DMA::UnitTimings7_16(int burststart)
return (burststart ? src_n : src_s) + 7;
}
}
else if (src_rgn & dst_rgn)
else*/ if (src_rgn & dst_rgn)
{
if (burststart != 1)
return src_n + dst_n + (src_n == 1 || burststart <= 0);
@ -490,7 +490,7 @@ u32 DMA::UnitTimings7_32(int burststart)
dst_n = NDS.ARM7MemTimings[dst_id][2];
dst_s = NDS.ARM7MemTimings[dst_id][3];
if (src_rgn == Mem7_MainRAM)
/*if (src_rgn == Mem7_MainRAM)
{
if (dst_rgn == Mem7_MainRAM)
return 18;
@ -553,7 +553,7 @@ u32 DMA::UnitTimings7_32(int burststart)
return (burststart ? src_n : src_s) + 8;
}
}
else if (src_rgn & dst_rgn)
else*/ if (src_rgn & dst_rgn)
{
if (burststart != 1)
return src_n + dst_n + (src_n == 1 || burststart <= 0);
@ -580,18 +580,18 @@ void DMA::Run9()
// add NS penalty for first accesses in burst
int burststart = Running-1;
if (!(Cnt & (1<<26)))
{
while (IterCount > 0 && !Stall)
{
/*u32 rgn = NDS.ARM9Regions[CurSrcAddr>>14] | NDS.ARM9Regions[CurDstAddr>>14];
u32 rgn = NDS.ARM9Regions[CurSrcAddr>>14] | NDS.ARM9Regions[CurDstAddr>>14];
if (rgn & Mem9_MainRAM)
{
NDS.ARM9.MRTrack.Type = MainRAMType::DMA16;
NDS.ARM9.MRTrack.Var = Num;
return;
}*/
break;
}
NDS.DMA9Timestamp += (UnitTimings9_16(burststart) << NDS.ARM9ClockShift);
burststart -= 1;
@ -610,13 +610,13 @@ void DMA::Run9()
{
while (IterCount > 0 && !Stall)
{
/*u32 rgn = NDS.ARM9Regions[CurSrcAddr>>14] | NDS.ARM9Regions[CurDstAddr>>14];
u32 rgn = NDS.ARM9Regions[CurSrcAddr>>14] | NDS.ARM9Regions[CurDstAddr>>14];
if (rgn & Mem9_MainRAM)
{
NDS.ARM9.MRTrack.Type = MainRAMType::DMA32;
NDS.ARM9.MRTrack.Var = Num;
return;
}*/
break;
}
NDS.DMA9Timestamp += (UnitTimings9_32(burststart) << NDS.ARM9ClockShift);
burststart -= 1;
@ -634,7 +634,7 @@ void DMA::Run9()
NDS.DMA9Timestamp -= 1;
if (burststart == 0) Running = 1;
if (burststart <= 0) Running = 1;
else Running = 2;
Executing = false;
@ -678,13 +678,13 @@ void DMA::Run7()
{
while (IterCount > 0 && !Stall)
{
/*u32 rgn = NDS.ARM7Regions[CurSrcAddr>>15] | NDS.ARM7Regions[CurDstAddr>>15];
u32 rgn = NDS.ARM7Regions[CurSrcAddr>>15] | NDS.ARM7Regions[CurDstAddr>>15];
if (rgn & Mem7_MainRAM)
{
NDS.ARM7.MRTrack.Type = MainRAMType::DMA16;
NDS.ARM7.MRTrack.Var = Num+4;
return;
}*/
break;
}
NDS.ARM7Timestamp += UnitTimings7_16(burststart);
burststart = false;
@ -703,13 +703,13 @@ void DMA::Run7()
{
while (IterCount > 0 && !Stall)
{
/*u32 rgn = NDS.ARM7Regions[CurSrcAddr>>15] | NDS.ARM7Regions[CurDstAddr>>15];
u32 rgn = NDS.ARM7Regions[CurSrcAddr>>15] | NDS.ARM7Regions[CurDstAddr>>15];
if (rgn & Mem7_MainRAM)
{
NDS.ARM7.MRTrack.Type = MainRAMType::DMA32;
NDS.ARM7.MRTrack.Var = Num+4;
return;
}*/
break;
}
NDS.ARM7Timestamp += UnitTimings7_32(burststart);
burststart = false;
@ -725,7 +725,7 @@ void DMA::Run7()
}
}
if (burststart == 0) Running = 1;
if (burststart <= 0) Running = 1;
else Running = 2;
Executing = false;

View File

@ -1130,39 +1130,13 @@ void NDS::MainRAMHandleARM9()
dma->CurDstAddr += dma->DstAddrInc<<2;
dma->IterCount--;
dma->RemCount--;
burststart -= 1;
if (burststart <= 0) dma->Running = 1;
if (burststart <= 1) dma->Running = 1;
else dma->Running = 2;
dma->Executing = false;
dma->Stall = false;
DMA9Timestamp = (A9ContentionTS << ARM9ClockShift) - 1;
DMA9Timestamp = (A9ContentionTS << ARM9ClockShift);
memset(&ARM9.MRTrack, 0, sizeof(ARM9.MRTrack));
ConTSLock = false;
if (dma->RemCount)
{
if (dma->IterCount == 0)
{
dma->Running = 0;
ResumeCPU(0, 1<<dma->Num);
if (dma->StartMode == 0x07)
GPU.GPU3D.CheckFIFODMA();
}
break;
}
if (!(dma->Cnt & (1<<25)))
dma->Cnt &= ~(1<<31);
if (dma->Cnt & (1<<30))
SetIRQ(0, IRQ_DMA0 + dma->Num);
dma->Running = 0;
dma->InProgress = false;
ResumeCPU(0, 1<<dma->Num);
}
break;
}
@ -1239,39 +1213,13 @@ void NDS::MainRAMHandleARM9()
dma->CurDstAddr += dma->DstAddrInc<<1;
dma->IterCount--;
dma->RemCount--;
burststart -= 1;
if (burststart <= 0) Running = 1;
if (burststart <= 1) Running = 1;
else dma->Running = 2;
dma->Executing = false;
dma->Stall = false;
DMA9Timestamp = (A9ContentionTS << ARM9ClockShift) - 1;
DMA9Timestamp = (A9ContentionTS << ARM9ClockShift);
memset(&ARM9.MRTrack, 0, sizeof(ARM9.MRTrack));
ConTSLock = false;
if (dma->RemCount)
{
if (dma->IterCount == 0)
{
dma->Running = 0;
ResumeCPU(0, 1<<dma->Num);
if (dma->StartMode == 0x07)
GPU.GPU3D.CheckFIFODMA();
}
break;
}
if (!(dma->Cnt & (1<<25)))
dma->Cnt &= ~(1<<31);
if (dma->Cnt & (1<<30))
SetIRQ(0, IRQ_DMA0 + dma->Num);
dma->Running = 0;
dma->InProgress = false;
ResumeCPU(0, 1<<dma->Num);
}
break;
}
@ -1498,36 +1446,11 @@ void NDS::MainRAMHandleARM7()
dma->CurDstAddr += dma->DstAddrInc<<2;
dma->IterCount--;
dma->RemCount--;
burststart -= 1;
if (burststart <= 0) dma->Running = 1;
if (burststart <= 1) dma->Running = 1;
else dma->Running = 2;
dma->Executing = false;
dma->Stall = false;
//DMA7Timestamp = ARM7Timestamp;
memset(&ARM7.MRTrack, 0, sizeof(ARM7.MRTrack));
ConTSLock = false;
if (dma->RemCount)
{
if (dma->IterCount == 0)
{
dma->Running = 0;
ResumeCPU(1, 1<<dma->Num);
}
break;
}
if (!(dma->Cnt & (1<<25)))
dma->Cnt &= ~(1<<31);
if (dma->Cnt & (1<<30))
SetIRQ(1, IRQ_DMA0 + dma->Num);
dma->Running = 0;
dma->InProgress = false;
ResumeCPU(1, 1<<dma->Num);
}
break;
}
@ -1604,36 +1527,11 @@ void NDS::MainRAMHandleARM7()
dma->CurDstAddr += dma->DstAddrInc<<1;
dma->IterCount--;
dma->RemCount--;
burststart -= 1;
if (burststart <= 0) Running = 1;
if (burststart <= 1) Running = 1;
else dma->Running = 2;
dma->Executing = false;
dma->Stall = false;
//DMA9Timestamp = (A9ContentionTS << ARM9ClockShift) - 1;
memset(&ARM7.MRTrack, 0, sizeof(ARM7.MRTrack));
ConTSLock = false;
if (dma->RemCount)
{
if (dma->IterCount == 0)
{
dma->Running = 0;
ResumeCPU(1, 1<<dma->Num);
}
break;
}
if (!(dma->Cnt & (1<<25)))
dma->Cnt &= ~(1<<31);
if (dma->Cnt & (1<<30))
SetIRQ(1, IRQ_DMA0 + dma->Num);
dma->Running = 0;
dma->InProgress = false;
ResumeCPU(1, 1<<dma->Num);
}
break;
}