implement 8- and 16-bit DSi AES register accesses
fixes NAND access through Godmode9i
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parent
4c97731468
commit
22b312bc43
66
src/DSi.cpp
66
src/DSi.cpp
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@ -2806,6 +2806,39 @@ void ARM7IOWrite8(u32 addr, u8 val)
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return;
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}
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if (addr >= 0x04004420 && addr < 0x04004430)
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{
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u32 shift = (addr&3)*8;
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addr -= 0x04004420;
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addr &= ~3;
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DSi_AES::WriteIV(addr, (u32)val << shift, 0xFF << shift);
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return;
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}
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if (addr >= 0x04004430 && addr < 0x04004440)
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{
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u32 shift = (addr&3)*8;
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addr -= 0x04004430;
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addr &= ~3;
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DSi_AES::WriteMAC(addr, (u32)val << shift, 0xFF << shift);
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return;
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}
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if (addr >= 0x04004440 && addr < 0x04004500)
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{
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u32 shift = (addr&3)*8;
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addr -= 0x04004440;
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addr &= ~3;
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int n = 0;
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while (addr >= 0x30) { addr -= 0x30; n++; }
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switch (addr >> 4)
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{
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case 0: DSi_AES::WriteKeyNormal(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
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case 1: DSi_AES::WriteKeyX(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
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case 2: DSi_AES::WriteKeyY(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
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}
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}
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return NDS::ARM7IOWrite8(addr, val);
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}
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@ -2849,6 +2882,39 @@ void ARM7IOWrite16(u32 addr, u16 val)
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return;
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}
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if (addr >= 0x04004420 && addr < 0x04004430)
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{
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u32 shift = (addr&1)*16;
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addr -= 0x04004420;
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addr &= ~1;
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DSi_AES::WriteIV(addr, (u32)val << shift, 0xFFFF << shift);
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return;
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}
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if (addr >= 0x04004430 && addr < 0x04004440)
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{
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u32 shift = (addr&1)*16;
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addr -= 0x04004430;
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addr &= ~1;
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DSi_AES::WriteMAC(addr, (u32)val << shift, 0xFFFF << shift);
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return;
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}
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if (addr >= 0x04004440 && addr < 0x04004500)
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{
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u32 shift = (addr&1)*16;
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addr -= 0x04004440;
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addr &= ~1;
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int n = 0;
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while (addr >= 0x30) { addr -= 0x30; n++; }
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switch (addr >> 4)
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{
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case 0: DSi_AES::WriteKeyNormal(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
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case 1: DSi_AES::WriteKeyX(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
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case 2: DSi_AES::WriteKeyY(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
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}
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}
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if (addr >= 0x04004800 && addr < 0x04004A00)
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{
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SDMMC->Write(addr, val);
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