implement a main ram burst restart behavior
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parent
d912429d8c
commit
2247f17f4f
30
src/NDS.cpp
30
src/NDS.cpp
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@ -926,8 +926,9 @@ void NDS::MainRAMHandleARM9()
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case MainRAMType::Fetch:
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{
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u8 var = ARM9.MRTrack.Var;
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u32 addr = (var & MRCodeFetch) ? ARM9.FetchAddr[16] : ARM9.FetchAddr[ARM9.MRTrack.Progress];
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if ((var & MRSequential) && A9WENTLAST)
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if ((var & MRSequential) && A9WENTLAST && !(MainRAMBork && ((addr & 0x1F) == 0)))
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{
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A9ContentionTS += 2;
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MainRAMTimestamp += 2;
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@ -936,7 +937,8 @@ void NDS::MainRAMHandleARM9()
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else
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{
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if (A9ContentionTS < MainRAMTimestamp) { A9ContentionTS = MainRAMTimestamp; if (A7PRIORITY) return; }
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MainRAMBork = !(var & MRWrite) && ((addr & 0x1F) >= 0x1A);
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MainRAMTimestamp = A9ContentionTS + ((var & MR16) ? 8 : 9); // checkme: are these correct for 8bit?
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if (var & MRWrite) A9ContentionTS += ((var & MR16) ? 5 : 6); // checkme: is this correct for 133mhz?
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else
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@ -1069,10 +1071,10 @@ void NDS::MainRAMHandleARM9()
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{
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if (srcrgn == Mem9_MainRAM)
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{
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if (burststart == 2 || A7WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((A9ContentionTS - DMABurstStart) >= 242) || (DMABORK && ((dma->CurSrcAddr & 0x1F) == 0)))
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if (burststart == 2 || A7WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((A9ContentionTS - DMABurstStart) >= 242) || (MainRAMBork && ((dma->CurSrcAddr & 0x1F) == 0)))
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{
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if (A9ContentionTS < MainRAMTimestamp) { A9ContentionTS = MainRAMTimestamp; if (A7PRIORITY) return; }
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DMABORK = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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MainRAMBork = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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MainRAMTimestamp = A9ContentionTS + 9;
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A9ContentionTS += 6;
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MainRAMLastAccess = A9LAST;
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@ -1173,10 +1175,10 @@ void NDS::MainRAMHandleARM9()
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{
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if (srcrgn == Mem9_MainRAM)
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{
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if (burststart == 2 || A7WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((A9ContentionTS - DMABurstStart) >= 242) || (DMABORK && ((dma->CurSrcAddr & 0x1F) == 0)))
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if (burststart == 2 || A7WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((A9ContentionTS - DMABurstStart) >= 242) || (MainRAMBork && ((dma->CurSrcAddr & 0x1F) == 0)))
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{
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if (A9ContentionTS < MainRAMTimestamp) { A9ContentionTS = MainRAMTimestamp; if (A7PRIORITY) return; }
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DMABORK = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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MainRAMBork = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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DMABurstStart = A9ContentionTS;
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MainRAMTimestamp = A9ContentionTS + 8;
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A9ContentionTS += 5;
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@ -1366,8 +1368,9 @@ void NDS::MainRAMHandleARM7()
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case MainRAMType::Fetch:
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{
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u8 var = ARM7.MRTrack.Var;
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u32 addr = (var & MRCodeFetch) ? ARM7.FetchAddr[16] : ARM7.FetchAddr[ARM7.MRTrack.Progress];
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if ((var & MRSequential) && A7WENTLAST)
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if ((var & MRSequential) && A7WENTLAST && !(MainRAMBork && ((addr & 0x1F) == 0)))
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{
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int cycles = ((var & MR32) ? 2 : 1);
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MainRAMTimestamp += cycles;
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@ -1377,7 +1380,8 @@ void NDS::MainRAMHandleARM7()
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else
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{
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if (ARM7Timestamp < MainRAMTimestamp) { ARM7Timestamp = MainRAMTimestamp; if (A9PRIORITY) return; }
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MainRAMBork = !(var & MRWrite) && ((addr & 0x1F) >= 0x1A);
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MainRAMTimestamp = ARM7Timestamp + ((var & MR16) ? 8 : 9); // checkme: are these correct for 8bit?
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if (var & MRWrite) ARM7Timestamp += ((var & MR16) ? 3 : 4);
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else ARM7Timestamp += ((var & MR16) ? 5 : 6);
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@ -1386,13 +1390,11 @@ void NDS::MainRAMHandleARM7()
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if (var & MRCodeFetch)
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{
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u32 addr = ARM7.FetchAddr[16];
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ARM7.RetVal = ((var & MR32) ? *(u32*)&MainRAM[addr&MainRAMMask] : *(u16*)&MainRAM[addr&MainRAMMask]);
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}
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else
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{
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u8 reg = ARM7.MRTrack.Progress;
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u32 addr = ARM7.FetchAddr[reg];
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if (var & MRWrite) // write
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{
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u32 val = ARM7.STRVal[reg];
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@ -1426,10 +1428,10 @@ void NDS::MainRAMHandleARM7()
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{
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if (srcrgn == Mem7_MainRAM)
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{
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if (burststart == 2 || A9WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((ARM7Timestamp - DMABurstStart) >= 242) || (DMABORK && ((dma->CurSrcAddr & 0x1F) == 0)))
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if (burststart == 2 || A9WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((ARM7Timestamp - DMABurstStart) >= 242) || (MainRAMBork && ((dma->CurSrcAddr & 0x1F) == 0)))
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{
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if (ARM7Timestamp < MainRAMTimestamp) { ARM7Timestamp = MainRAMTimestamp; if (A9PRIORITY) return; }
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DMABORK = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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MainRAMBork = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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DMABurstStart = ARM7Timestamp;
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MainRAMTimestamp = ARM7Timestamp + 9;
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ARM7Timestamp += 6;
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@ -1528,10 +1530,10 @@ void NDS::MainRAMHandleARM7()
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{
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if (srcrgn == Mem7_MainRAM)
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{
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if (burststart == 2 || A9WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((ARM7Timestamp - DMABurstStart) >= 242) || (DMABORK && ((dma->CurSrcAddr & 0x1F) == 0)))
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if (burststart == 2 || A9WENTLAST || DMALastWasMainRAM || dma->SrcAddrInc <= 0 || ((ARM7Timestamp - DMABurstStart) >= 242) || (MainRAMBork && ((dma->CurSrcAddr & 0x1F) == 0)))
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{
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if (ARM7Timestamp < MainRAMTimestamp) { ARM7Timestamp = MainRAMTimestamp; if (A9PRIORITY) return; }
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DMABORK = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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MainRAMBork = ((dma->CurSrcAddr & 0x1F) >= 0x1A);
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DMABurstStart = ARM7Timestamp;
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MainRAMTimestamp = ARM7Timestamp + 8;
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ARM7Timestamp += 5;
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@ -276,7 +276,8 @@ public: // TODO: Encapsulate the rest of these members
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alignas(u32) u8 ROMSeed0[2*8];
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alignas(u32) u8 ROMSeed1[2*8];
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u32 DMAReadHold; bool DMABORK;
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u32 DMAReadHold;
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bool MainRAMBork; // if a main ram read burst starts in the last 6 bytes of a 32 byte block, and then crosses the 32 byte boundary, the burst forcibly restarts
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bool MainRAMLastAccess; // 0 == ARM9 | 1 == ARM7
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bool DMALastWasMainRAM;
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