parent
f4335b9292
commit
1f691f3795
7
DMA.cpp
7
DMA.cpp
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@ -89,8 +89,9 @@ void DMA::WriteCnt(u32 val)
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Start();
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//else
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// printf("SPECIAL ARM%d DMA%d START MODE %02X\n", CPU?7:9, Num, StartMode);
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if (StartMode!=0x00 && StartMode!=0x10 && StartMode!=0x05 && StartMode!=0x12)
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if ((StartMode&7)!=0x00 && (StartMode&7)!=0x1 && StartMode!=2 && StartMode!=0x05 && StartMode!=0x12)
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printf("UNIMPLEMENTED ARM%d DMA%d START MODE %02X\n", CPU?7:9, Num, StartMode);
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//if (StartMode==2)printf("HBLANK DMA %08X -> %08X\n", SrcAddr, DstAddr);
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}
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}
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@ -106,13 +107,13 @@ void DMA::Start()
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if (!RemCount)
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RemCount = countmask+1;
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if ((Cnt & 0x00060000) == 0x00060000)
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if ((Cnt & 0x00600000) == 0x00600000)
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CurDstAddr = DstAddr;
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// special path for cart DMA. this is a gross hack.
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// emulating it properly requires emulating cart transfer delays, so uh... TODO
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if (CurSrcAddr==0x04100010 && RemCount==1 && (Cnt & 0x07E00000)==0x07000000 &&
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((CPU==0 && StartMode==0x05) || (CPU==1 && StartMode==0x12)))
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StartMode==0x05 || StartMode==0x12)
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{
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NDSCart::DMA(CurDstAddr);
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Cnt &= ~0x80000000;
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28
GPU.cpp
28
GPU.cpp
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@ -26,6 +26,7 @@ namespace GPU
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{
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#define LINE_CYCLES (355*6)
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#define HBLANK_CYCLES (256*6)
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#define FRAME_CYCLES (LINE_CYCLES * 263)
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u16 VCount;
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@ -756,10 +757,27 @@ void StartFrame()
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StartScanline(0);
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}
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void StartHBlank(u32 line)
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{
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DispStat[0] |= (1<<1);
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DispStat[1] |= (1<<1);
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NDS::CheckDMAs(0, 0x02);
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if (DispStat[0] & (1<<4)) NDS::TriggerIRQ(0, NDS::IRQ_HBlank);
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if (DispStat[1] & (1<<4)) NDS::TriggerIRQ(1, NDS::IRQ_HBlank);
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if (line < 262)
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NDS::ScheduleEvent(NDS::Event_LCD, true, (LINE_CYCLES - HBLANK_CYCLES), StartScanline, line+1);
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}
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void StartScanline(u32 line)
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{
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VCount = line;
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DispStat[0] &= ~(1<<1);
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DispStat[1] &= ~(1<<1);
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if (line == VMatch[0])
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{
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DispStat[0] |= (1<<2);
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@ -785,7 +803,6 @@ void StartScanline(u32 line)
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GPU2D_B->DrawScanline(line);
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//NDS::ScheduleEvent(LINE_CYCLES, StartScanline, line+1);
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NDS::ScheduleEvent(NDS::Event_ScanlineStart, true, LINE_CYCLES, StartScanline, line+1);
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}
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else if (line == 262)
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{
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@ -802,13 +819,18 @@ void StartScanline(u32 line)
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DispStat[0] |= (1<<0);
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DispStat[1] |= (1<<0);
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NDS::CheckDMAs(0, 0x01);
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NDS::CheckDMAs(1, 0x11);
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if (DispStat[0] & (1<<3)) NDS::TriggerIRQ(0, NDS::IRQ_VBlank);
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if (DispStat[1] & (1<<3)) NDS::TriggerIRQ(1, NDS::IRQ_VBlank);
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}
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//NDS::ScheduleEvent(LINE_CYCLES, StartScanline, line+1);
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NDS::ScheduleEvent(NDS::Event_ScanlineStart, true, LINE_CYCLES, StartScanline, line+1);
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//NDS::ScheduleEvent(NDS::Event_LCD, true, LINE_CYCLES, StartScanline, line+1);
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}
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NDS::ScheduleEvent(NDS::Event_LCD, true, HBLANK_CYCLES, StartHBlank, line);
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}
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@ -819,8 +841,6 @@ void SetDispStat(u32 cpu, u16 val)
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DispStat[cpu] |= val;
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VMatch[cpu] = (val >> 8) | ((val & 0x80) << 1);
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if (val & 0x10) printf("!! HBLANK ENABLED\n");
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}
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}
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2
NDS.cpp
2
NDS.cpp
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@ -1679,7 +1679,7 @@ void ARM9IOWrite32(u32 addr, u32 val)
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case 0x040001B4: *(u32*)&ROMSeed1[0] = val; return;
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case 0x04000208: IME[0] = val & 0x1; return;
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case 0x04000210: IE[0] = val; if (val&~0x000F0F7D)printf("unusual IRQ %08X\n",val);return;
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case 0x04000210: IE[0] = val; if (val&~0x000F0F7F)printf("unusual IRQ %08X\n",val);return;
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case 0x04000214: IF[0] &= ~val; return;
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case 0x04000240:
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2
NDS.h
2
NDS.h
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@ -38,7 +38,7 @@ typedef struct _SchedEvent
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enum
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{
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Event_ScanlineStart = 0,
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Event_LCD = 0,
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Event_Timer9_0,
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Event_Timer9_1,
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11
main.cpp
11
main.cpp
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@ -40,7 +40,6 @@ LRESULT CALLBACK derpo(HWND window, UINT msg, WPARAM wparam, LPARAM lparam)
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case WM_CLOSE:
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printf("close\n");
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{
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// 6006800 6008000
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FILE* f = fopen("debug/wram.bin", "wb");
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if (f)
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{
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@ -51,6 +50,16 @@ LRESULT CALLBACK derpo(HWND window, UINT msg, WPARAM wparam, LPARAM lparam)
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}
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fclose(f);
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}
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f = fopen("debug/arm7vram.bin", "wb");
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if (f)
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{
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for (u32 i = 0x6000000; i < 0x6040000; i+=4)
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{
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u32 blarg = NDS::ARM7Read32(i);
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fwrite(&blarg, 4, 1, f);
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}
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fclose(f);
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}
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f = fopen("debug/mainram.bin", "wb");
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if (f)
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{
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@ -1,16 +1,16 @@
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# depslib dependency file v1.0
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1486086940 source:c:\documents\sources\melonds\main.cpp
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1486141269 source:c:\documents\sources\melonds\main.cpp
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<stdio.h>
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<windows.h>
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"NDS.h"
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"GPU.h"
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1485981187 c:\documents\sources\melonds\nds.h
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1486142800 c:\documents\sources\melonds\nds.h
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"types.h"
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1481161027 c:\documents\sources\melonds\types.h
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1486135026 source:c:\documents\sources\melonds\nds.cpp
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1486143063 source:c:\documents\sources\melonds\nds.cpp
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<stdio.h>
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<string.h>
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"NDS.h"
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"NDS.h"
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"SPI.h"
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1485994573 source:c:\documents\sources\melonds\gpu2d.cpp
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1486143936 source:c:\documents\sources\melonds\gpu2d.cpp
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<stdio.h>
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<string.h>
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"NDS.h"
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@ -108,7 +108,7 @@
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1484612398 c:\documents\sources\melonds\fifo.h
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"types.h"
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1486093630 source:c:\documents\sources\melonds\dma.cpp
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1486143294 source:c:\documents\sources\melonds\dma.cpp
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<stdio.h>
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"NDS.h"
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"DMA.h"
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@ -117,7 +117,7 @@
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1484698068 c:\documents\sources\melonds\dma.h
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"types.h"
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1485990504 source:c:\documents\sources\melonds\gpu.cpp
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1486142983 source:c:\documents\sources\melonds\gpu.cpp
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<stdio.h>
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<string.h>
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"NDS.h"
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