include more information in DataRegion
This commit is contained in:
parent
3ab9e4a4c9
commit
1ad90cb334
16
src/ARM.h
16
src/ARM.h
|
@ -320,7 +320,7 @@ public:
|
|||
void DataRead8(u32 addr, u32* val)
|
||||
{
|
||||
*val = BusRead8(addr);
|
||||
DataRegion = addr >> 24;
|
||||
DataRegion = addr >> 20;
|
||||
DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
|
||||
}
|
||||
|
||||
|
@ -329,7 +329,7 @@ public:
|
|||
addr &= ~1;
|
||||
|
||||
*val = BusRead16(addr);
|
||||
DataRegion = addr >> 24;
|
||||
DataRegion = addr >> 20;
|
||||
DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
|
||||
}
|
||||
|
||||
|
@ -338,7 +338,7 @@ public:
|
|||
addr &= ~3;
|
||||
|
||||
*val = BusRead32(addr);
|
||||
DataRegion = addr >> 24;
|
||||
DataRegion = addr >> 20;
|
||||
DataCycles = NDS::ARM7MemTimings[addr >> 15][2];
|
||||
}
|
||||
|
||||
|
@ -353,7 +353,7 @@ public:
|
|||
void DataWrite8(u32 addr, u8 val)
|
||||
{
|
||||
BusWrite8(addr, val);
|
||||
DataRegion = addr >> 24;
|
||||
DataRegion = addr >> 20;
|
||||
DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
|
||||
}
|
||||
|
||||
|
@ -362,7 +362,7 @@ public:
|
|||
addr &= ~1;
|
||||
|
||||
BusWrite16(addr, val);
|
||||
DataRegion = addr >> 24;
|
||||
DataRegion = addr >> 20;
|
||||
DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
|
||||
}
|
||||
|
||||
|
@ -371,7 +371,7 @@ public:
|
|||
addr &= ~3;
|
||||
|
||||
BusWrite32(addr, val);
|
||||
DataRegion = addr >> 24;
|
||||
DataRegion = addr >> 20;
|
||||
DataCycles = NDS::ARM7MemTimings[addr >> 15][2];
|
||||
}
|
||||
|
||||
|
@ -402,7 +402,7 @@ public:
|
|||
s32 numC = NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?0:2];
|
||||
s32 numD = DataCycles;
|
||||
|
||||
if (DataRegion == 0x02) // mainRAM
|
||||
if ((DataRegion >> 4) == 0x02) // mainRAM
|
||||
{
|
||||
if (CodeRegion == 0x02)
|
||||
Cycles += numC + numD;
|
||||
|
@ -429,7 +429,7 @@ public:
|
|||
s32 numC = NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?0:2];
|
||||
s32 numD = DataCycles;
|
||||
|
||||
if (DataRegion == 0x02)
|
||||
if ((DataRegion >> 4) == 0x02)
|
||||
{
|
||||
if (CodeRegion == 0x02)
|
||||
Cycles += numC + numD;
|
||||
|
|
|
@ -650,7 +650,7 @@ void Compiler::Comp_AddCycles_CDI()
|
|||
s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
|
||||
s32 numD = CurInstr.DataCycles;
|
||||
|
||||
if (CurInstr.DataRegion == 0x02) // mainRAM
|
||||
if ((CurInstr.DataRegion >> 4) == 0x02) // mainRAM
|
||||
{
|
||||
if (CodeRegion == 0x02)
|
||||
cycles = numC + numD;
|
||||
|
@ -695,7 +695,7 @@ void Compiler::Comp_AddCycles_CD()
|
|||
s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
|
||||
s32 numD = CurInstr.DataCycles;
|
||||
|
||||
if (CurInstr.DataRegion == 0x02)
|
||||
if ((CurInstr.DataRegion >> 4) == 0x02)
|
||||
{
|
||||
if (CodeRegion == 0x02)
|
||||
cycles += numC + numD;
|
||||
|
|
|
@ -40,9 +40,9 @@ struct FetchedInstr
|
|||
u32 Instr;
|
||||
u32 Addr;
|
||||
|
||||
u8 CodeCycles;
|
||||
u8 DataCycles;
|
||||
u8 DataRegion;
|
||||
u16 CodeCycles;
|
||||
u32 DataRegion;
|
||||
|
||||
ARMInstrInfo::Info Info;
|
||||
};
|
||||
|
@ -195,6 +195,9 @@ typedef void (*InterpreterFunc)(ARM* cpu);
|
|||
extern InterpreterFunc InterpretARM[];
|
||||
extern InterpreterFunc InterpretTHUMB[];
|
||||
|
||||
extern u8 MemRegion9[0x80000];
|
||||
extern u8 MemRegion7[0x80000];
|
||||
|
||||
void* GetFuncForAddr(ARM* cpu, u32 addr, bool store, int size);
|
||||
|
||||
}
|
||||
|
|
|
@ -578,7 +578,7 @@ void Compiler::Comp_AddCycles_CDI()
|
|||
s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
|
||||
s32 numD = CurInstr.DataCycles;
|
||||
|
||||
if (CurInstr.DataRegion == 0x02) // mainRAM
|
||||
if ((CurInstr.DataRegion >> 4) == 0x02) // mainRAM
|
||||
{
|
||||
if (CodeRegion == 0x02)
|
||||
cycles = numC + numD;
|
||||
|
@ -623,7 +623,7 @@ void Compiler::Comp_AddCycles_CD()
|
|||
s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
|
||||
s32 numD = CurInstr.DataCycles;
|
||||
|
||||
if (CurInstr.DataRegion == 0x02)
|
||||
if ((CurInstr.DataRegion >> 4) == 0x02)
|
||||
{
|
||||
if (CodeRegion == 0x02)
|
||||
cycles += numC + numD;
|
||||
|
|
12
src/CP15.cpp
12
src/CP15.cpp
|
@ -729,6 +729,8 @@ u32 ARMv5::CodeRead32(u32 addr, bool branch)
|
|||
|
||||
void ARMv5::DataRead8(u32 addr, u32* val)
|
||||
{
|
||||
DataRegion = addr >> 12;
|
||||
|
||||
if (addr < ITCMSize)
|
||||
{
|
||||
DataCycles = 1;
|
||||
|
@ -748,6 +750,8 @@ void ARMv5::DataRead8(u32 addr, u32* val)
|
|||
|
||||
void ARMv5::DataRead16(u32 addr, u32* val)
|
||||
{
|
||||
DataRegion = addr >> 12;
|
||||
|
||||
addr &= ~1;
|
||||
|
||||
if (addr < ITCMSize)
|
||||
|
@ -769,6 +773,8 @@ void ARMv5::DataRead16(u32 addr, u32* val)
|
|||
|
||||
void ARMv5::DataRead32(u32 addr, u32* val)
|
||||
{
|
||||
DataRegion = addr >> 12;
|
||||
|
||||
addr &= ~3;
|
||||
|
||||
if (addr < ITCMSize)
|
||||
|
@ -811,6 +817,8 @@ void ARMv5::DataRead32S(u32 addr, u32* val)
|
|||
|
||||
void ARMv5::DataWrite8(u32 addr, u8 val)
|
||||
{
|
||||
DataRegion = addr >> 12;
|
||||
|
||||
if (addr < ITCMSize)
|
||||
{
|
||||
DataCycles = 1;
|
||||
|
@ -833,6 +841,8 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
|
|||
|
||||
void ARMv5::DataWrite16(u32 addr, u16 val)
|
||||
{
|
||||
DataRegion = addr >> 12;
|
||||
|
||||
addr &= ~1;
|
||||
|
||||
if (addr < ITCMSize)
|
||||
|
@ -857,6 +867,8 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
|
|||
|
||||
void ARMv5::DataWrite32(u32 addr, u32 val)
|
||||
{
|
||||
DataRegion = addr >> 12;
|
||||
|
||||
addr &= ~3;
|
||||
|
||||
if (addr < ITCMSize)
|
||||
|
|
Loading…
Reference in New Issue