hacky stall for cache streaming+wb during dmas
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16efe8e5e4
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@ -957,6 +957,7 @@ u32 NDS::RunFrame()
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}
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}
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else if (CPUStop & CPUStop_DMA9)
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else if (CPUStop & CPUStop_DMA9)
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{
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{
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u64 ts = ARM9Timestamp;
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DMAs[0].Run();
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DMAs[0].Run();
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if (!(CPUStop & CPUStop_GXStall)) DMAs[1].Run();
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if (!(CPUStop & CPUStop_GXStall)) DMAs[1].Run();
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if (!(CPUStop & CPUStop_GXStall)) DMAs[2].Run();
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if (!(CPUStop & CPUStop_GXStall)) DMAs[2].Run();
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@ -966,6 +967,14 @@ u32 NDS::RunFrame()
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auto& dsi = dynamic_cast<melonDS::DSi&>(*this);
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auto& dsi = dynamic_cast<melonDS::DSi&>(*this);
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dsi.RunNDMAs(0);
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dsi.RunNDMAs(0);
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}
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}
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ts = ARM9Timestamp - ts;
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for (int i = 0; i < 7; i++)
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{
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ARM9.ICacheFillTimes[i] += ts;
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ARM9.DCacheFillTimes[i] += ts;
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}
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ARM9.WBTimestamp += ts;
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}
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}
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else
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else
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{
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{
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