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Cleaned up magic numbers and simplified (not yet used) ICache functions 

Marked reading CP15 Cache Dirty Bit as not present
This commit is contained in:
DesperateProgrammer 2024-01-19 08:30:38 +01:00
parent a4f8e6fe29
commit 1019afee92
2 changed files with 58 additions and 57 deletions
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101
src/CP15.cpp
View File

@ -58,9 +58,9 @@ void ARMv5::CP15Reset()
ICacheLockDown = 0; ICacheLockDown = 0;
DCacheLockDown = 0; DCacheLockDown = 0;
memset(ICache, 0, 0x2000); memset(ICache, 0, ICACHE_SIZE);
ICacheInvalidateAll(); ICacheInvalidateAll();
memset(ICacheCount, 0, 64); memset(ICacheCount, 0, ICACHE_LINESPERSET);
PU_CodeCacheable = 0; PU_CodeCacheable = 0;
PU_DataCacheable = 0; PU_DataCacheable = 0;
@ -340,42 +340,26 @@ u32 ARMv5::RandomLineIndex()
void ARMv5::ICacheLookup(u32 addr) void ARMv5::ICacheLookup(u32 addr)
{ {
u32 tag = addr & 0xFFFFF800; u32 tag = addr & ~(ICACHE_LINESPERSET * ICACHE_LINELENGTH - 1);
u32 id = (addr >> 5) & 0x3F; u32 id = (addr >> ICACHE_LINELENGTH_LOG2) & (ICACHE_LINESPERSET-1);
id <<= 2; id <<= ICACHE_SETS_LOG2;
if (ICacheTags[id+0] == tag) for (int set=0;set<ICACHE_SETS;set++)
{ {
CodeCycles = 1; if (ICacheTags[id+set] == tag)
CurICacheLine = &ICache[(id+0) << 5]; {
return; CodeCycles = 1;
} CurICacheLine = &ICache[(id+set) << ICACHE_LINELENGTH_LOG2];
if (ICacheTags[id+1] == tag) return;
{ }
CodeCycles = 1;
CurICacheLine = &ICache[(id+1) << 5];
return;
}
if (ICacheTags[id+2] == tag)
{
CodeCycles = 1;
CurICacheLine = &ICache[(id+2) << 5];
return;
}
if (ICacheTags[id+3] == tag)
{
CodeCycles = 1;
CurICacheLine = &ICache[(id+3) << 5];
return;
} }
// cache miss // cache miss
u32 line; u32 line;
if (CP15Control & (1<<14)) if (CP15Control & CP15_CACHE_CR_ROUNDROBIN)
{ {
line = ICacheCount[id>>2]; line = ICacheCount[id>>ICACHE_SETS_LOG2];
ICacheCount[id>>2] = (line+1) & 0x3; ICacheCount[id>>ICACHE_SETS_LOG2] = (line+1) & (ICACHE_SETS-1);
} }
else else
{ {
@ -384,16 +368,16 @@ void ARMv5::ICacheLookup(u32 addr)
line += id; line += id;
addr &= ~0x1F; addr &= ~(ICACHE_LINELENGTH-1);
u8* ptr = &ICache[line << 5]; u8* ptr = &ICache[line << ICACHE_LINELENGTH_LOG2];
if (CodeMem.Mem) if (CodeMem.Mem)
{ {
memcpy(ptr, &CodeMem.Mem[addr & CodeMem.Mask], 32); memcpy(ptr, &CodeMem.Mem[addr & CodeMem.Mask], ICACHE_LINELENGTH);
} }
else else
{ {
for (int i = 0; i < 32; i+=4) for (int i = 0; i < ICACHE_LINELENGTH; i+=sizeof(u32))
*(u32*)&ptr[i] = NDS.ARM9Read32(addr+i); *(u32*)&ptr[i] = NDS.ARM9Read32(addr+i);
} }
@ -407,35 +391,29 @@ void ARMv5::ICacheLookup(u32 addr)
void ARMv5::ICacheInvalidateByAddr(u32 addr) void ARMv5::ICacheInvalidateByAddr(u32 addr)
{ {
u32 tag = addr & 0xFFFFF800; u32 tag = addr & ~(ICACHE_LINESPERSET * ICACHE_LINELENGTH - 1);
u32 id = (addr >> 5) & 0x3F; u32 id = (addr >> ICACHE_LINELENGTH_LOG2) & (ICACHE_LINESPERSET-1);
id <<= 2; id <<= ICACHE_SETS_LOG2;
if (ICacheTags[id+0] == tag) for (int set=0;set<ICACHE_SETS;set++)
{ {
ICacheTags[id+0] = 1; if (ICacheTags[id+set] == tag)
return; {
} // TODO: is this a valid magic number?
if (ICacheTags[id+1] == tag) // it should indicate that no address is loaded here, instead
{ // a tag of 1 indicates that addr 0x00000800.. 0x0000FBF (depending on id) ist stored at this set.
ICacheTags[id+1] = 1; ICacheTags[id+set] = 1;
return; return;
} }
if (ICacheTags[id+2] == tag)
{
ICacheTags[id+2] = 1;
return;
}
if (ICacheTags[id+3] == tag)
{
ICacheTags[id+3] = 1;
return;
} }
} }
void ARMv5::ICacheInvalidateAll() void ARMv5::ICacheInvalidateAll()
{ {
for (int i = 0; i < 64*4; i++) // TODO: is this a valid magic number?
// it should indicate that no address is loaded here, instead
// a tag of 1 indicates that addr 0x00000800.. 0x0000FBF (depending on id) ist stored at this set.
for (int i = 0; i < ICACHE_SIZE / ICACHE_LINELENGTH; i++)
ICacheTags[i] = 1; ICacheTags[i] = 1;
} }
@ -633,6 +611,10 @@ void ARMv5::CP15Write(u32 id, u32 val)
case 0x7A2: case 0x7A2:
//printf("flush data cache SI\n"); //printf("flush data cache SI\n");
return; return;
case 0x7A3:
// Test and clean (optional)
// Is not present on the NDS/DSi
return;
case 0x900: case 0x900:
// Cache Lockdown - Format B // Cache Lockdown - Format B
@ -773,6 +755,11 @@ u32 ARMv5::CP15Read(u32 id) const
case 0x671: case 0x671:
return PU_Region[(id >> 4) & 0xF]; return PU_Region[(id >> 4) & 0xF];
case 0x7A6:
// read Cache Dirty Bit (optional)
// it is not present on the NDS/DSi
return 0;
case 0x900: case 0x900:
return DCacheLockDown; return DCacheLockDown;
case 0x901: case 0x901:

14
src/MemConstants.h
View File

@ -34,6 +34,20 @@ constexpr u32 ITCMPhysicalSize = 0x8000;
constexpr u32 DTCMPhysicalSize = 0x4000; constexpr u32 DTCMPhysicalSize = 0x4000;
constexpr u32 ARM7BIOSCRC32 = 0x1280f0d5; constexpr u32 ARM7BIOSCRC32 = 0x1280f0d5;
constexpr u32 ARM9BIOSCRC32 = 0x2ab23573; constexpr u32 ARM9BIOSCRC32 = 0x2ab23573;
constexpr u32 ICACHE_SIZE_LOG2 = 13;
constexpr u32 ICACHE_SIZE = 1 << ICACHE_SIZE_LOG2;
constexpr u32 ICACHE_SETS_LOG2 = 2;
constexpr u32 ICACHE_SETS = 1 << ICACHE_SETS_LOG2;
constexpr u32 ICACHE_LINELENGTH_ENCODED = 2;
constexpr u32 ICACHE_LINELENGTH_LOG2 = ICACHE_LINELENGTH_ENCODED + 3;
constexpr u32 ICACHE_LINELENGTH = 8 * (1 << ICACHE_LINELENGTH_ENCODED);
constexpr u32 ICACHE_LINESPERSET = ICACHE_SIZE / (ICACHE_SETS * ICACHE_LINELENGTH);
constexpr u32 CP15_CACHE_CR_ROUNDROBIN = (1 < 14);
constexpr u32 CP15_CACHE_CR_ICACHEENABLE = (1 < 12);
constexpr u32 CP15_CACHE_CR_DCACHEENABLE = (1 < 2);
constexpr u32 CP15_CACHE_CR_WRITEBUFFERENABLE = (1 < 3);
} }
#endif // MELONDS_MEMCONSTANTS_H #endif // MELONDS_MEMCONSTANTS_H