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Revert "Improve accuracy of prefetch aborts" 

This reverts commit 587958e678.
This commit is contained in:
Jaklyy 2024-08-05 11:41:25 -04:00
parent 587958e678
commit 0dc619d615
2 changed files with 35 additions and 32 deletions
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30
src/ARM.cpp
View File

@ -343,6 +343,12 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr)
CPSR &= ~0x20;
}
if (!(PU_Map[addr>>12] & 0x04))
{
PrefetchAbort();
return;
}
NDS.MonitorARM9Jump(addr);
}
@ -569,6 +575,15 @@ void ARMv5::PrefetchAbort()
CPSR |= 0x97;
UpdateMode(oldcpsr, CPSR);
// this shouldn't happen, but if it does, we're stuck in some nasty endless loop
// so better take care of it
if (!(PU_Map[ExceptionBase>>12] & 0x04))
{
Log(LogLevel::Error, "!!!!! EXCEPTION REGION NOT EXECUTABLE. THIS IS VERY BAD!!\n");
NDS.Stop(Platform::StopReason::BadExceptionRegion);
return;
}
R_ABT[2] = oldcpsr;
R[14] = R[15] + (oldcpsr & 0x20 ? 2 : 0);
JumpTo(ExceptionBase + 0x0C);
@ -671,18 +686,10 @@ void ARMv5::Execute()
if (R[15] & 0x2) { NextInstr[1] >>= 16; CodeCycles = 0; }
else NextInstr[1] = CodeRead32(R[15], false);
// handle aborted instructions
if (!(PU_Map[(R[15]-4)>>12] & 0x04)) [[unlikely]]
{
PrefetchAbort();
}
// actually execute
else [[likely]]
{
u32 icode = (CurInstr >> 6) & 0x3FF;
ARMInterpreter::THUMBInstrTable[icode](this);
}
}
else
{
if constexpr (mode == CPUExecuteMode::InterpreterGDB)
@ -694,13 +701,8 @@ void ARMv5::Execute()
NextInstr[0] = NextInstr[1];
NextInstr[1] = CodeRead32(R[15], false);
// handle aborted instructions
if (!(PU_Map[(R[15]-8)>>12] & 0x04)) [[unlikely]] // todo: check for bkpt instruction?
{
PrefetchAbort();
}
// actually execute
else if (CheckCondition(CurInstr >> 28)) [[likely]]
if (CheckCondition(CurInstr >> 28))
{
u32 icode = ((CurInstr >> 4) & 0xF) | ((CurInstr >> 16) & 0xFF0);
ARMInterpreter::ARMInstrTable[icode](this);

25
src/CP15.cpp
View File

@ -773,13 +773,14 @@ u32 ARMv5::CP15Read(u32 id) const
u32 ARMv5::CodeRead32(u32 addr, bool branch)
{
// prefetch abort
// the actual exception is not raised until the aborted instruction is executed
if (!(PU_Map[addr>>12] & 0x04)) [[unlikely]]
/*if (branch || (!(addr & 0xFFF)))
{
CodeCycles = 1;
if (!(PU_Map[addr>>12] & 0x04))
{
PrefetchAbort();
return 0;
}
}*/
if (addr < ITCMSize)
{
@ -806,7 +807,7 @@ u32 ARMv5::CodeRead32(u32 addr, bool branch)
bool ARMv5::DataRead8(u32 addr, u32* val)
{
if (!(PU_Map[addr>>12] & 0x01)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x01))
{
DataAbort();
return false;
@ -832,7 +833,7 @@ bool ARMv5::DataRead8(u32 addr, u32* val)
bool ARMv5::DataRead16(u32 addr, u32* val)
{
if (!(PU_Map[addr>>12] & 0x01)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x01))
{
DataAbort();
return false;
@ -860,7 +861,7 @@ bool ARMv5::DataRead16(u32 addr, u32* val)
bool ARMv5::DataRead32(u32 addr, u32* val)
{
if (!(PU_Map[addr>>12] & 0x01)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x01))
{
DataAbort();
return false;
@ -888,7 +889,7 @@ bool ARMv5::DataRead32(u32 addr, u32* val)
bool ARMv5::DataRead32S(u32 addr, u32* val)
{
if (!(PU_Map[addr>>12] & 0x01)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x01))
{
DataAbort();
return false;
@ -916,7 +917,7 @@ bool ARMv5::DataRead32S(u32 addr, u32* val)
bool ARMv5::DataWrite8(u32 addr, u8 val)
{
if (!(PU_Map[addr>>12] & 0x02)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x02))
{
DataAbort();
return false;
@ -943,7 +944,7 @@ bool ARMv5::DataWrite8(u32 addr, u8 val)
bool ARMv5::DataWrite16(u32 addr, u16 val)
{
if (!(PU_Map[addr>>12] & 0x02)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x02))
{
DataAbort();
return false;
@ -972,7 +973,7 @@ bool ARMv5::DataWrite16(u32 addr, u16 val)
bool ARMv5::DataWrite32(u32 addr, u32 val)
{
if (!(PU_Map[addr>>12] & 0x02)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x02))
{
DataAbort();
return false;
@ -1001,7 +1002,7 @@ bool ARMv5::DataWrite32(u32 addr, u32 val)
bool ARMv5::DataWrite32S(u32 addr, u32 val, bool dataabort)
{
if (!(PU_Map[addr>>12] & 0x02)) [[unlikely]]
if (!(PU_Map[addr>>12] & 0x02))
{
if (!dataabort) DataAbort();
return false;