swp/swpb jumps work on the arm 7?
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@ -262,7 +262,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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if (r&1) { A_UNK(cpu); return; } \
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if (r&1) { A_UNK(cpu); return; } \
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if (!cpu->DataRead32 (offset , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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if (!cpu->DataRead32 (offset , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(offset+4, &val)) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(offset+4, &val)) {cpu->AddCycles_CDI(); return;} \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), cpu->CurInstr & (1<<22)); /* restores cpsr due to shared ldm dna */ \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), cpu->CurInstr & (1<<22)); /* restores cpsr presumably due to shared dna with ldm */ \
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else cpu->R[r+1] = val; \
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else cpu->R[r+1] = val; \
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cpu->AddCycles_CDI(); \
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cpu->AddCycles_CDI(); \
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
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@ -274,7 +274,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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if (r&1) { A_UNK(cpu); return; } \
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if (r&1) { A_UNK(cpu); return; } \
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if (!cpu->DataRead32 (addr , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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if (!cpu->DataRead32 (addr , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(addr+4, &val)) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(addr+4, &val)) {cpu->AddCycles_CDI(); return;} \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), cpu->CurInstr & (1<<22)); /* restores cpsr due to shared ldm dna */ \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), cpu->CurInstr & (1<<22)); /* restores cpsr presumably due to shared dna with ldm */ \
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else cpu->R[r+1] = val; \
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else cpu->R[r+1] = val; \
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cpu->AddCycles_CDI(); \
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cpu->AddCycles_CDI(); \
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
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@ -408,9 +408,10 @@ void A_SWP(ARM* cpu)
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u32 numD = cpu->DataCycles;
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u32 numD = cpu->DataCycles;
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if (cpu->DataWrite32(base, rm))
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if (cpu->DataWrite32(base, rm))
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{
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{
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// rd only gets updated if both read and write succeed, and if rd isn't r15
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// rd only gets updated if both read and write succeed
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u32 rd = (cpu->CurInstr >> 12) & 0xF;
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u32 rd = (cpu->CurInstr >> 12) & 0xF;
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if (rd != 15) cpu->R[rd] = ROR(val, 8*(base&0x3));
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if (rd != 15) cpu->R[rd] = ROR(val, 8*(base&0x3));
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else if (cpu->Num) cpu->JumpTo(ROR(val, 8*(base&0x3)) & ~1); // for some reason these jumps don't work on the arm 9?
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}
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}
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cpu->DataCycles += numD;
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cpu->DataCycles += numD;
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}
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}
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@ -429,9 +430,10 @@ void A_SWPB(ARM* cpu)
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u32 numD = cpu->DataCycles;
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u32 numD = cpu->DataCycles;
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if (cpu->DataWrite8(base, rm))
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if (cpu->DataWrite8(base, rm))
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{
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{
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// rd only gets updated if both read and write succeed, and if rd isn't r15
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// rd only gets updated if both read and write succeed
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u32 rd = (cpu->CurInstr >> 12) & 0xF;
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u32 rd = (cpu->CurInstr >> 12) & 0xF;
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if (rd != 15) cpu->R[rd] = val;
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if (rd != 15) cpu->R[rd] = val;
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else if (cpu->Num) cpu->JumpTo(val & ~1); // for some reason these jumps don't work on the arm 9?
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}
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}
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cpu->DataCycles += numD;
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cpu->DataCycles += numD;
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}
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}
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