diff --git a/src/ARMJIT_Memory.cpp b/src/ARMJIT_Memory.cpp index dbad9a7f..d8a8c181 100644 --- a/src/ARMJIT_Memory.cpp +++ b/src/ARMJIT_Memory.cpp @@ -1107,6 +1107,8 @@ int ClassifyAddress9(u32 addr) return memregion_IO9; case 0x06000000: return memregion_VRAM; + case 0x0C000000: + return (NDS::ConsoleType==1) ? memregion_MainRAM : memregion_Other; default: return memregion_Other; } @@ -1156,7 +1158,9 @@ int ClassifyAddress7(u32 addr) case 0x06000000: case 0x06800000: return memregion_VWRAM; - + case 0x0C000000: + case 0x0C800000: + return (NDS::ConsoleType==1) ? memregion_MainRAM : memregion_Other; default: return memregion_Other; } diff --git a/src/DSi.cpp b/src/DSi.cpp index 5d382a1e..638ecdc9 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -1253,7 +1253,6 @@ u8 ARM9Read8(u32 addr) switch (addr & 0xFF000000) { case 0x03000000: - case 0x03800000: if (SCFG_EXT[0] & (1 << 25)) { if (addr >= NWRAMStart[0][0] && addr < NWRAMEnd[0][0]) @@ -1281,6 +1280,9 @@ u8 ARM9Read8(u32 addr) case 0x09000000: case 0x0A000000: return (NDS::ExMemCnt[0] & (1<<7)) ? 0 : 0xFF; + + case 0x0C000000: + return *(u8*)&NDS::MainRAM[addr & NDS::MainRAMMask]; } return NDS::ARM9Read8(addr); @@ -1299,7 +1301,6 @@ u16 ARM9Read16(u32 addr) switch (addr & 0xFF000000) { case 0x03000000: - case 0x03800000: if (SCFG_EXT[0] & (1 << 25)) { if (addr >= NWRAMStart[0][0] && addr < NWRAMEnd[0][0]) @@ -1327,6 +1328,9 @@ u16 ARM9Read16(u32 addr) case 0x09000000: case 0x0A000000: return (NDS::ExMemCnt[0] & (1<<7)) ? 0 : 0xFFFF; + + case 0x0C000000: + return *(u16*)&NDS::MainRAM[addr & NDS::MainRAMMask]; } return NDS::ARM9Read16(addr); @@ -1350,7 +1354,6 @@ u32 ARM9Read32(u32 addr) break; case 0x03000000: - case 0x03800000: if (SCFG_EXT[0] & (1 << 25)) { if (addr >= NWRAMStart[0][0] && addr < NWRAMEnd[0][0]) @@ -1378,6 +1381,9 @@ u32 ARM9Read32(u32 addr) case 0x09000000: case 0x0A000000: return (NDS::ExMemCnt[0] & (1<<7)) ? 0 : 0xFFFFFFFF; + + case 0x0C000000: + return *(u32*)&NDS::MainRAM[addr & NDS::MainRAMMask]; } return NDS::ARM9Read32(addr); @@ -1388,7 +1394,6 @@ void ARM9Write8(u32 addr, u8 val) switch (addr & 0xFF000000) { case 0x03000000: - case 0x03800000: if (SCFG_EXT[0] & (1 << 25)) { if (addr >= NWRAMStart[0][0] && addr < NWRAMEnd[0][0]) @@ -1476,6 +1481,13 @@ void ARM9Write8(u32 addr, u8 val) case 0x09000000: case 0x0A000000: return; + + case 0x0C000000: +#ifdef JIT_ENABLED + ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); +#endif + *(u8*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; + return; } return NDS::ARM9Write8(addr, val); @@ -1486,7 +1498,6 @@ void ARM9Write16(u32 addr, u16 val) switch (addr & 0xFF000000) { case 0x03000000: - case 0x03800000: if (SCFG_EXT[0] & (1 << 25)) { if (addr >= NWRAMStart[0][0] && addr < NWRAMEnd[0][0]) @@ -1560,6 +1571,13 @@ void ARM9Write16(u32 addr, u16 val) case 0x09000000: case 0x0A000000: return; + + case 0x0C000000: +#ifdef JIT_ENABLED + ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); +#endif + *(u16*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; + return; } return NDS::ARM9Write16(addr, val); @@ -1570,7 +1588,6 @@ void ARM9Write32(u32 addr, u32 val) switch (addr & 0xFF000000) { case 0x03000000: - case 0x03800000: if (SCFG_EXT[0] & (1 << 25)) { if (addr >= NWRAMStart[0][0] && addr < NWRAMEnd[0][0]) @@ -1644,6 +1661,13 @@ void ARM9Write32(u32 addr, u32 val) case 0x09000000: case 0x0A000000: return; + + case 0x0C000000: +#ifdef JIT_ENABLED + ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); +#endif + *(u32*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; + return; } return NDS::ARM9Write32(addr, val); @@ -1654,6 +1678,7 @@ bool ARM9GetMemRegion(u32 addr, bool write, NDS::MemRegion* region) switch (addr & 0xFF000000) { case 0x02000000: + case 0x0C000000: region->Mem = NDS::MainRAM; region->Mask = NDS::MainRAMMask; return true; @@ -1734,6 +1759,10 @@ u8 ARM7Read8(u32 addr) case 0x0A000000: case 0x0A800000: return (NDS::ExMemCnt[0] & (1<<7)) ? 0xFF : 0; + + case 0x0C000000: + case 0x0C800000: + return *(u8*)&NDS::MainRAM[addr & NDS::MainRAMMask]; } return NDS::ARM7Read8(addr); @@ -1787,6 +1816,10 @@ u16 ARM7Read16(u32 addr) case 0x0A000000: case 0x0A800000: return (NDS::ExMemCnt[0] & (1<<7)) ? 0xFFFF : 0; + + case 0x0C000000: + case 0x0C800000: + return *(u16*)&NDS::MainRAM[addr & NDS::MainRAMMask]; } return NDS::ARM7Read16(addr); @@ -1840,6 +1873,10 @@ u32 ARM7Read32(u32 addr) case 0x0A000000: case 0x0A800000: return (NDS::ExMemCnt[0] & (1<<7)) ? 0xFFFFFFFF : 0; + + case 0x0C000000: + case 0x0C800000: + return *(u32*)&NDS::MainRAM[addr & NDS::MainRAMMask]; } return NDS::ARM7Read32(addr); @@ -1927,6 +1964,14 @@ void ARM7Write8(u32 addr, u8 val) case 0x0A000000: case 0x0A800000: return; + + case 0x0C000000: + case 0x0C800000: +#ifdef JIT_ENABLED + ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); +#endif + *(u8*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; + return; } return NDS::ARM7Write8(addr, val); @@ -2014,6 +2059,14 @@ void ARM7Write16(u32 addr, u16 val) case 0x0A000000: case 0x0A800000: return; + + case 0x0C000000: + case 0x0C800000: +#ifdef JIT_ENABLED + ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); +#endif + *(u16*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; + return; } return NDS::ARM7Write16(addr, val); @@ -2101,6 +2154,14 @@ void ARM7Write32(u32 addr, u32 val) case 0x0A000000: case 0x0A800000: return; + + case 0x0C000000: + case 0x0C800000: +#ifdef JIT_ENABLED + ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); +#endif + *(u32*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; + return; } return NDS::ARM7Write32(addr, val); @@ -2112,6 +2173,8 @@ bool ARM7GetMemRegion(u32 addr, bool write, NDS::MemRegion* region) { case 0x02000000: case 0x02800000: + case 0x0C000000: + case 0x0C800000: region->Mem = NDS::MainRAM; region->Mask = NDS::MainRAMMask; return true;