2019-06-21 23:28:32 +00:00
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#ifndef ARMJIT_COMPILER_H
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#define ARMJIT_COMPILER_H
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#include "../dolphin/x64Emitter.h"
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#include "../ARMJIT.h"
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2019-06-25 15:09:27 +00:00
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#include "../ARMJIT_RegCache.h"
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2019-06-21 23:28:32 +00:00
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namespace ARMJIT
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{
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const Gen::X64Reg RCPU = Gen::RBP;
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const Gen::X64Reg RCycles = Gen::R14;
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const Gen::X64Reg RCPSR = Gen::R15;
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const Gen::X64Reg RSCRATCH = Gen::EAX;
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const Gen::X64Reg RSCRATCH2 = Gen::EDX;
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const Gen::X64Reg RSCRATCH3 = Gen::ECX;
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2019-06-25 15:09:27 +00:00
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class Compiler;
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typedef void (Compiler::*CompileFunc)();
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class Compiler : public Gen::X64CodeBlock
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{
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public:
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Compiler();
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CompiledBlock CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrsCount);
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void LoadReg(int reg, Gen::X64Reg nativeReg);
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void UnloadReg(int reg, Gen::X64Reg nativeReg);
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private:
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CompileFunc GetCompFunc(int kind);
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void Comp_AddCycles_C();
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void Comp_AddCycles_CI(u32 i);
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enum
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{
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opSetsFlags = 1 << 0,
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opSymmetric = 1 << 1,
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opRetriveCV = 1 << 2,
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opInvertCarry = 1 << 3,
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opSyncCarry = 1 << 4,
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opInvertOp2 = 1 << 5,
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};
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void A_Comp_Arith();
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void A_Comp_MovOp();
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void A_Comp_CmpOp();
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void T_Comp_ShiftImm();
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void T_Comp_AddSub_();
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void T_Comp_ALU_Imm8();
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void T_Comp_ALU();
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void T_Comp_ALU_HiReg();
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void Comp_ArithTriOp(void (Compiler::*op)(int, const Gen::OpArg&, const Gen::OpArg&),
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Gen::OpArg rd, Gen::OpArg rn, Gen::OpArg op2, bool carryUsed, int opFlags);
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void Comp_ArithTriOpReverse(void (Compiler::*op)(int, const Gen::OpArg&, const Gen::OpArg&),
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Gen::OpArg rd, Gen::OpArg rn, Gen::OpArg op2, bool carryUsed, int opFlags);
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void Comp_CmpOp(int op, Gen::OpArg rn, Gen::OpArg op2, bool carryUsed);
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void Comp_RetriveFlags(bool sign, bool retriveCV, bool carryUsed);
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Gen::OpArg Comp_RegShiftImm(int op, int amount, Gen::OpArg rm, bool S, bool& carryUsed);
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Gen::OpArg Comp_RegShiftReg(int op, Gen::OpArg rs, Gen::OpArg rm, bool S, bool& carryUsed);
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Gen::OpArg A_Comp_GetALUOp2(bool S, bool& carryUsed);
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void LoadCPSR();
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void SaveCPSR();
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Gen::OpArg MapReg(int reg)
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{
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if (reg == 15 && RegCache.Mapping[reg] == Gen::INVALID_REG)
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return Gen::Imm32(R15);
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assert(RegCache.Mapping[reg] != Gen::INVALID_REG);
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return Gen::R(RegCache.Mapping[reg]);
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}
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bool CPSRDirty = false;
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FetchedInstr CurrentInstr;
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RegCache<Compiler, Gen::X64Reg> RegCache;
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bool Thumb;
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u32 Num;
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u32 R15;
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u32 ConstantCycles;
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};
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}
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#endif
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