mirror of https://github.com/mamedev/mame.git
emumem: API change [O. Galibert]
* direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
This commit is contained in:
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c46e1007a8
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@ -97,7 +97,7 @@ uint8_t n8x300_cpu_device::get_reg(uint8_t reg)
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void n8x300_cpu_device::device_start()
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void n8x300_cpu_device::device_start()
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{
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{
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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m_io = &space(AS_IO);
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m_io = &space(AS_IO);
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save_item(NAME(m_PC));
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save_item(NAME(m_PC));
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@ -72,7 +72,7 @@ protected:
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bool m_increment_pc;
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bool m_increment_pc;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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address_space *m_io;
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address_space *m_io;
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uint16_t m_PC; // Program Counter
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uint16_t m_PC; // Program Counter
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@ -418,7 +418,7 @@ void adsp21xx_device::device_start()
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// get our address spaces
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// get our address spaces
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<-2>();
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m_data = &space(AS_DATA);
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m_data = &space(AS_DATA);
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m_io = has_space(AS_IO) ? &space(AS_IO) : nullptr;
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m_io = has_space(AS_IO) ? &space(AS_IO) : nullptr;
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@ -776,37 +776,37 @@ util::disasm_interface *adsp21xx_device::create_disassembler()
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inline uint16_t adsp21xx_device::data_read(uint32_t addr)
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inline uint16_t adsp21xx_device::data_read(uint32_t addr)
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{
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{
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return m_data->read_word(addr << 1);
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return m_data->read_word(addr);
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}
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}
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inline void adsp21xx_device::data_write(uint32_t addr, uint16_t data)
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inline void adsp21xx_device::data_write(uint32_t addr, uint16_t data)
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{
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{
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m_data->write_word(addr << 1, data);
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m_data->write_word(addr, data);
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}
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}
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inline uint16_t adsp21xx_device::io_read(uint32_t addr)
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inline uint16_t adsp21xx_device::io_read(uint32_t addr)
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{
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{
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return m_io->read_word(addr << 1);
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return m_io->read_word(addr);
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}
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}
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inline void adsp21xx_device::io_write(uint32_t addr, uint16_t data)
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inline void adsp21xx_device::io_write(uint32_t addr, uint16_t data)
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{
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{
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m_io->write_word(addr << 1, data);
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m_io->write_word(addr, data);
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}
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}
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inline uint32_t adsp21xx_device::program_read(uint32_t addr)
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inline uint32_t adsp21xx_device::program_read(uint32_t addr)
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{
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{
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return m_program->read_dword(addr << 2);
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return m_program->read_dword(addr);
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}
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}
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inline void adsp21xx_device::program_write(uint32_t addr, uint32_t data)
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inline void adsp21xx_device::program_write(uint32_t addr, uint32_t data)
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{
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{
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m_program->write_dword(addr << 2, data & 0xffffff);
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m_program->write_dword(addr, data & 0xffffff);
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}
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}
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inline uint32_t adsp21xx_device::opcode_read()
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inline uint32_t adsp21xx_device::opcode_read()
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{
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{
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return m_direct->read_dword(m_pc << 2);
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return m_direct->read_dword(m_pc);
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}
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}
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@ -450,7 +450,7 @@ protected:
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address_space * m_program;
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address_space * m_program;
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address_space * m_data;
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address_space * m_data;
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address_space * m_io;
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address_space * m_io;
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direct_read_data * m_direct;
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direct_read_data<-2> *m_direct;
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// tables
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// tables
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uint8_t m_condition_table[0x1000];
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uint8_t m_condition_table[0x1000];
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@ -394,7 +394,7 @@ const alpha8201_cpu_device::s_opcode alpha8201_cpu_device::opcode_8301[256]=
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void alpha8201_cpu_device::device_start()
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void alpha8201_cpu_device::device_start()
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{
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{
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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state_add( ALPHA8201_PC, "PC", m_pc.w.l ).callimport().mask(0x3ff).formatstr("%03X");
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state_add( ALPHA8201_PC, "PC", m_pc.w.l ).callimport().mask(0x3ff).formatstr("%03X");
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state_add( ALPHA8201_SP, "SP", m_sp ).callimport().callexport().formatstr("%02X");
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state_add( ALPHA8201_SP, "SP", m_sp ).callimport().callexport().formatstr("%02X");
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@ -388,7 +388,7 @@ protected:
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u8 m_halt; /* halt input line */
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u8 m_halt; /* halt input line */
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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int m_icount;
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int m_icount;
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int m_inst_cycles;
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int m_inst_cycles;
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@ -131,9 +131,9 @@ device_memory_interface::space_config_vector am29000_cpu_device::memory_space_co
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void am29000_cpu_device::device_start()
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void am29000_cpu_device::device_start()
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{
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{
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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m_data = &space(AS_DATA);
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m_data = &space(AS_DATA);
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m_datadirect = &m_data->direct();
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m_datadirect = m_data->direct<0>();
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m_io = &space(AS_IO);
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m_io = &space(AS_IO);
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m_cfg = (PRL_AM29000 | PRL_REV_D) << CFG_PRL_SHIFT;
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m_cfg = (PRL_AM29000 | PRL_REV_D) << CFG_PRL_SHIFT;
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@ -630,9 +630,10 @@ protected:
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uint32_t m_next_pc;
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uint32_t m_next_pc;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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address_space *m_data;
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address_space *m_data;
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direct_read_data *m_datadirect;
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direct_read_data<0> *m_datadirect;
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address_space *m_io;
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address_space *m_io;
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typedef void ( am29000_cpu_device::*opcode_func ) ();
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typedef void ( am29000_cpu_device::*opcode_func ) ();
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@ -510,7 +510,7 @@ void arm_cpu_device::execute_set_input(int irqline, int state)
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void arm_cpu_device::device_start()
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void arm_cpu_device::device_start()
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{
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{
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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save_item(NAME(m_sArmRegister));
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save_item(NAME(m_sArmRegister));
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save_item(NAME(m_coproRegister));
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save_item(NAME(m_coproRegister));
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uint8_t m_pendingIrq;
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uint8_t m_pendingIrq;
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uint8_t m_pendingFiq;
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uint8_t m_pendingFiq;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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endianness_t m_endian;
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endianness_t m_endian;
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copro_type m_copro_type;
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copro_type m_copro_type;
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void arm7_cpu_device::device_start()
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void arm7_cpu_device::device_start()
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{
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{
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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save_item(NAME(m_r));
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save_item(NAME(m_r));
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save_item(NAME(m_pendingIrq));
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save_item(NAME(m_pendingIrq));
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@ -162,7 +162,7 @@ protected:
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int m_icount;
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int m_icount;
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endianness_t m_endian;
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endianness_t m_endian;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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/* Coprocessor Registers */
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/* Coprocessor Registers */
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uint32_t m_control;
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uint32_t m_control;
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@ -163,7 +163,7 @@ struct arm_state
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int m_icount;
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int m_icount;
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endianness_t m_endian;
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endianness_t m_endian;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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/* Coprocessor Registers */
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/* Coprocessor Registers */
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uint32_t m_control;
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uint32_t m_control;
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{
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{
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// get our address spaces
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// get our address spaces
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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// register our state for the debugger
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// register our state for the debugger
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state_add(STATE_GENPC, "GENPC", m_pc).noshow();
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state_add(STATE_GENPC, "GENPC", m_pc).noshow();
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uint8_t m_irq_state;
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uint8_t m_irq_state;
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int m_icount;
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int m_icount;
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address_space * m_program;
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address_space * m_program;
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direct_read_data * m_direct;
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direct_read_data<0> *m_direct;
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// src2val table, registers are at the end
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// src2val table, registers are at the end
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uint32_t m_src2val[65536];
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uint32_t m_src2val[65536];
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state_add(STATE_GENFLAGS , "GENFLAGS" , m_flags).noshow().formatstr("%9s");
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state_add(STATE_GENFLAGS , "GENFLAGS" , m_flags).noshow().formatstr("%9s");
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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save_item(NAME(m_reg));
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save_item(NAME(m_reg));
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save_item(NAME(m_arp));
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save_item(NAME(m_arp));
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private:
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private:
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address_space_config m_program_config;
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address_space_config m_program_config;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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int m_icount;
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int m_icount;
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#define READOP(a) (m_direct->read_byte(a))
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#define READOP(a) (m_direct->read_byte(a))
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#define RDMEM(a) (m_data->read_word((a) * 2) & 0xfff)
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#define RDMEM(a) (m_data->read_word((a) & 0xfff))
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#define WRMEM(a,v) (m_data->write_word((a) * 2, (v)))
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#define WRMEM(a,v) (m_data->write_word((a), (v)))
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#define READPORT(a) (m_io->read_byte(a))
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#define READPORT(a) (m_io->read_byte(a))
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#define WRITEPORT(a,v) (m_io->write_byte((a), (v)))
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#define WRITEPORT(a,v) (m_io->write_byte((a), (v)))
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assert(!m_vector_callback.isnull());
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assert(!m_vector_callback.isnull());
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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m_data = &space(AS_DATA);
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m_data = &space(AS_DATA);
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m_io = &space(AS_IO);
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m_io = &space(AS_IO);
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int m_icount;
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int m_icount;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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address_space *m_data;
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address_space *m_data;
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address_space *m_io;
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address_space *m_io;
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{
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{
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/* find address spaces */
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/* find address spaces */
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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m_data = &space(AS_DATA);
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m_data = &space(AS_DATA);
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/* find i/o handlers */
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/* find i/o handlers */
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bool m_has_inil;
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bool m_has_inil;
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address_space *m_program;
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address_space *m_program;
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direct_read_data *m_direct;
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direct_read_data<0> *m_direct;
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address_space *m_data;
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address_space *m_data;
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uint8_t m_featuremask;
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uint8_t m_featuremask;
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// get our address spaces
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// get our address spaces
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m_program = &space(AS_PROGRAM);
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_direct = m_program->direct<0>();
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m_io = &space(AS_IO);
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m_io = &space(AS_IO);
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// register our state for the debugger
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// register our state for the debugger
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int m_icount;
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int m_icount;
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address_space * m_program;
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address_space * m_program;
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address_space * m_io;
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address_space * m_io;
|
||||||
direct_read_data * m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
// opcode/condition tables
|
// opcode/condition tables
|
||||||
typedef void (cosmac_device::*ophandler)();
|
typedef void (cosmac_device::*ophandler)();
|
||||||
|
|
|
@ -27,9 +27,9 @@ DEFINE_DEVICE_TYPE(CP1610, cp1610_cpu_device, "cp1610", "GI CP1610")
|
||||||
#define C 0x10
|
#define C 0x10
|
||||||
|
|
||||||
|
|
||||||
#define cp1610_readop(A) m_program->read_word((A)<<1)
|
#define cp1610_readop(A) m_program->read_word(A)
|
||||||
#define cp1610_readmem16(A) m_program->read_word((A)<<1)
|
#define cp1610_readmem16(A) m_program->read_word(A)
|
||||||
#define cp1610_writemem16(A,B) m_program->write_word((A)<<1,B)
|
#define cp1610_writemem16(A,B) m_program->write_word(A,B)
|
||||||
|
|
||||||
/* clear all flags */
|
/* clear all flags */
|
||||||
#define CLR_SZOC \
|
#define CLR_SZOC \
|
||||||
|
|
|
@ -183,7 +183,7 @@ void cquestsnd_cpu_device::device_start()
|
||||||
m_sound_data = (uint16_t*)machine().root_device().memregion(m_sound_region_tag)->base();
|
m_sound_data = (uint16_t*)machine().root_device().memregion(m_sound_region_tag)->base();
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<-3>();
|
||||||
|
|
||||||
memset(m_ram, 0, sizeof(m_ram));
|
memset(m_ram, 0, sizeof(m_ram));
|
||||||
m_q = 0;
|
m_q = 0;
|
||||||
|
@ -262,7 +262,7 @@ void cquestrot_cpu_device::device_start()
|
||||||
m_linedata_w.resolve_safe();
|
m_linedata_w.resolve_safe();
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<-3>();
|
||||||
|
|
||||||
memset(m_ram, 0, sizeof(m_ram));
|
memset(m_ram, 0, sizeof(m_ram));
|
||||||
m_q = 0;
|
m_q = 0;
|
||||||
|
@ -393,7 +393,7 @@ void cquestlin_cpu_device::device_start()
|
||||||
m_linedata_r.resolve_safe(0);
|
m_linedata_r.resolve_safe(0);
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<-3>();
|
||||||
|
|
||||||
memset(m_ram, 0, sizeof(m_ram));
|
memset(m_ram, 0, sizeof(m_ram));
|
||||||
m_q = 0;
|
m_q = 0;
|
||||||
|
@ -542,7 +542,7 @@ void cquestsnd_cpu_device::execute_run()
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
/* Decode the instruction */
|
/* Decode the instruction */
|
||||||
uint64_t inst = m_direct->read_qword(SND_PC << 3);
|
uint64_t inst = m_direct->read_qword(SND_PC);
|
||||||
uint32_t inslow = inst & 0xffffffff;
|
uint32_t inslow = inst & 0xffffffff;
|
||||||
uint32_t inshig = inst >> 32;
|
uint32_t inshig = inst >> 32;
|
||||||
|
|
||||||
|
@ -798,7 +798,7 @@ void cquestrot_cpu_device::execute_run()
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
/* Decode the instruction */
|
/* Decode the instruction */
|
||||||
uint64_t inst = m_direct->read_qword(ROT_PC << 3);
|
uint64_t inst = m_direct->read_qword(ROT_PC);
|
||||||
|
|
||||||
uint32_t inslow = inst & 0xffffffff;
|
uint32_t inslow = inst & 0xffffffff;
|
||||||
uint32_t inshig = inst >> 32;
|
uint32_t inshig = inst >> 32;
|
||||||
|
@ -1218,7 +1218,7 @@ void cquestlin_cpu_device::execute_run()
|
||||||
int prog = (m_clkcnt & 3) ? BACKGROUND : FOREGROUND;
|
int prog = (m_clkcnt & 3) ? BACKGROUND : FOREGROUND;
|
||||||
|
|
||||||
m_curpc = LINE_PC;
|
m_curpc = LINE_PC;
|
||||||
uint64_t inst = m_direct->read_qword(LINE_PC << 3);
|
uint64_t inst = m_direct->read_qword(LINE_PC);
|
||||||
|
|
||||||
uint32_t inslow = inst & 0xffffffff;
|
uint32_t inslow = inst & 0xffffffff;
|
||||||
uint32_t inshig = inst >> 32;
|
uint32_t inshig = inst >> 32;
|
||||||
|
|
|
@ -118,7 +118,7 @@ private:
|
||||||
uint16_t *m_sound_data;
|
uint16_t *m_sound_data;
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<-3> *m_direct;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
int do_sndjmp(int jmp);
|
int do_sndjmp(int jmp);
|
||||||
|
@ -227,7 +227,7 @@ private:
|
||||||
uint8_t m_clkcnt;
|
uint8_t m_clkcnt;
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<-3> *m_direct;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
// For the debugger
|
// For the debugger
|
||||||
|
@ -344,7 +344,7 @@ private:
|
||||||
uint32_t m_o_stack[32768]; /* Stack DRAM: 32kx20 */
|
uint32_t m_o_stack[32768]; /* Stack DRAM: 32kx20 */
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<-3> *m_direct;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
// For the debugger
|
// For the debugger
|
||||||
|
|
|
@ -162,7 +162,7 @@ void dsp16_device::device_start()
|
||||||
// get our address spaces
|
// get our address spaces
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_data = &space(AS_DATA);
|
m_data = &space(AS_DATA);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<-1>();
|
||||||
|
|
||||||
// set our instruction counter
|
// set our instruction counter
|
||||||
m_icountptr = &m_icount;
|
m_icountptr = &m_icount;
|
||||||
|
@ -339,18 +339,18 @@ util::disasm_interface *dsp16_device::create_disassembler()
|
||||||
|
|
||||||
inline uint32_t dsp16_device::data_read(const uint16_t& addr)
|
inline uint32_t dsp16_device::data_read(const uint16_t& addr)
|
||||||
{
|
{
|
||||||
return m_data->read_word(addr << 1);
|
return m_data->read_word(addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
inline void dsp16_device::data_write(const uint16_t& addr, const uint16_t& data)
|
inline void dsp16_device::data_write(const uint16_t& addr, const uint16_t& data)
|
||||||
{
|
{
|
||||||
m_data->write_word(addr << 1, data & 0xffff);
|
m_data->write_word(addr, data & 0xffff);
|
||||||
}
|
}
|
||||||
|
|
||||||
inline uint32_t dsp16_device::opcode_read(const uint8_t pcOffset)
|
inline uint32_t dsp16_device::opcode_read(const uint8_t pcOffset)
|
||||||
{
|
{
|
||||||
const uint16_t readPC = m_pc + pcOffset;
|
const uint16_t readPC = m_pc + pcOffset;
|
||||||
return m_direct->read_dword(readPC << 1);
|
return m_direct->read_dword(readPC);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -146,7 +146,7 @@ protected:
|
||||||
// address spaces
|
// address spaces
|
||||||
address_space* m_program;
|
address_space* m_program;
|
||||||
address_space* m_data;
|
address_space* m_data;
|
||||||
direct_read_data* m_direct;
|
direct_read_data<-1> *m_direct;
|
||||||
|
|
||||||
// other internal states
|
// other internal states
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
|
@ -192,7 +192,7 @@ void dsp32c_device::device_start()
|
||||||
|
|
||||||
// get our address spaces
|
// get our address spaces
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
|
|
||||||
// register our state for the debugger
|
// register our state for the debugger
|
||||||
state_add(STATE_GENPC, "GENPC", m_r[15]).noshow();
|
state_add(STATE_GENPC, "GENPC", m_r[15]).noshow();
|
||||||
|
|
|
@ -421,7 +421,7 @@ protected:
|
||||||
uint8_t m_lastpins;
|
uint8_t m_lastpins;
|
||||||
uint32_t m_ppc;
|
uint32_t m_ppc;
|
||||||
address_space * m_program;
|
address_space * m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
devcb_write32 m_output_pins_changed;
|
devcb_write32 m_output_pins_changed;
|
||||||
// tables
|
// tables
|
||||||
|
|
|
@ -290,7 +290,7 @@ void dsp56k_device::device_start()
|
||||||
save_item(NAME(m_dsp56k_core.peripheral_ram));
|
save_item(NAME(m_dsp56k_core.peripheral_ram));
|
||||||
|
|
||||||
m_dsp56k_core.program = &space(AS_PROGRAM);
|
m_dsp56k_core.program = &space(AS_PROGRAM);
|
||||||
m_dsp56k_core.direct = &m_dsp56k_core.program->direct();
|
m_dsp56k_core.direct = m_dsp56k_core.program->direct<-1>();
|
||||||
m_dsp56k_core.data = &space(AS_DATA);
|
m_dsp56k_core.data = &space(AS_DATA);
|
||||||
|
|
||||||
state_add(DSP56K_PC, "PC", m_dsp56k_core.PCU.pc).formatstr("%04X");
|
state_add(DSP56K_PC, "PC", m_dsp56k_core.PCU.pc).formatstr("%04X");
|
||||||
|
@ -464,9 +464,9 @@ static size_t execute_one_new(dsp56k_core* cpustate)
|
||||||
cpustate->ppc = PC;
|
cpustate->ppc = PC;
|
||||||
debugger_instruction_hook(cpustate->device, PC);
|
debugger_instruction_hook(cpustate->device, PC);
|
||||||
|
|
||||||
cpustate->op = ROPCODE(ADDRESS(PC));
|
cpustate->op = ROPCODE(PC);
|
||||||
uint16_t w0 = ROPCODE(ADDRESS(PC));
|
uint16_t w0 = ROPCODE(PC);
|
||||||
uint16_t w1 = ROPCODE(ADDRESS(PC) + ADDRESS(1));
|
uint16_t w1 = ROPCODE(PC + 1);
|
||||||
|
|
||||||
Opcode op(w0, w1);
|
Opcode op(w0, w1);
|
||||||
op.evaluate(cpustate);
|
op.evaluate(cpustate);
|
||||||
|
|
|
@ -192,7 +192,7 @@ struct dsp56k_core
|
||||||
void (*output_pins_changed)(uint32_t pins);
|
void (*output_pins_changed)(uint32_t pins);
|
||||||
cpu_device *device;
|
cpu_device *device;
|
||||||
address_space *program;
|
address_space *program;
|
||||||
direct_read_data *direct;
|
direct_read_data<-1> *direct;
|
||||||
address_space *data;
|
address_space *data;
|
||||||
|
|
||||||
uint16_t peripheral_ram[0x40];
|
uint16_t peripheral_ram[0x40];
|
||||||
|
|
|
@ -42,7 +42,6 @@ struct typed_pointer
|
||||||
char data_type;
|
char data_type;
|
||||||
};
|
};
|
||||||
|
|
||||||
//#define ADDRESS(X) (X<<1)
|
|
||||||
#define BITS(CUR,MASK) (Dsp56kOpMask(CUR,MASK))
|
#define BITS(CUR,MASK) (Dsp56kOpMask(CUR,MASK))
|
||||||
|
|
||||||
/*********************/
|
/*********************/
|
||||||
|
@ -243,10 +242,10 @@ static void execute_one(dsp56k_core* cpustate)
|
||||||
cpustate->ppc = PC;
|
cpustate->ppc = PC;
|
||||||
debugger_instruction_hook(cpustate->device, PC);
|
debugger_instruction_hook(cpustate->device, PC);
|
||||||
|
|
||||||
cpustate->op = ROPCODE(ADDRESS(PC));
|
cpustate->op = ROPCODE(PC);
|
||||||
/* The words we're going to be working with */
|
/* The words we're going to be working with */
|
||||||
op = ROPCODE(ADDRESS(PC));
|
op = ROPCODE(PC);
|
||||||
op2 = ROPCODE(ADDRESS(PC) + ADDRESS(1));
|
op2 = ROPCODE(PC + 1);
|
||||||
|
|
||||||
|
|
||||||
/* DECODE */
|
/* DECODE */
|
||||||
|
@ -2308,7 +2307,7 @@ static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const uint16_t op, const uin
|
||||||
decode_BBB_bitmask(cpustate, BITS(op2,0xe000), &iVal);
|
decode_BBB_bitmask(cpustate, BITS(op2,0xe000), &iVal);
|
||||||
|
|
||||||
workAddr = assemble_address_from_Pppppp_table(cpustate, BITS(op,0x0020), BITS(op,0x001f));
|
workAddr = assemble_address_from_Pppppp_table(cpustate, BITS(op,0x0020), BITS(op,0x001f));
|
||||||
previousValue = cpustate->data->read_word(ADDRESS(workAddr));
|
previousValue = cpustate->data->read_word(workAddr);
|
||||||
workingWord = previousValue;
|
workingWord = previousValue;
|
||||||
|
|
||||||
switch(BITS(op2, 0x1f00))
|
switch(BITS(op2, 0x1f00))
|
||||||
|
@ -2332,7 +2331,7 @@ static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const uint16_t op, const uin
|
||||||
|
|
||||||
tempTP.addr = &workingWord;
|
tempTP.addr = &workingWord;
|
||||||
tempTP.data_type = DT_WORD;
|
tempTP.data_type = DT_WORD;
|
||||||
SetDataMemoryValue(cpustate, tempTP, ADDRESS(workAddr));
|
SetDataMemoryValue(cpustate, tempTP, workAddr);
|
||||||
|
|
||||||
/* S L E U N Z V C */
|
/* S L E U N Z V C */
|
||||||
/* - * - - - - - ? */
|
/* - * - - - - - ? */
|
||||||
|
@ -2374,7 +2373,7 @@ static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const uint16_t op, const u
|
||||||
decode_RR_table(cpustate, BITS(op,0x0003), &R);
|
decode_RR_table(cpustate, BITS(op,0x0003), &R);
|
||||||
|
|
||||||
workAddr = *((uint16_t*)R.addr);
|
workAddr = *((uint16_t*)R.addr);
|
||||||
previousValue = cpustate->data->read_word(ADDRESS(workAddr));
|
previousValue = cpustate->data->read_word(workAddr);
|
||||||
workingWord = previousValue;
|
workingWord = previousValue;
|
||||||
|
|
||||||
switch(BITS(op2, 0x1f00))
|
switch(BITS(op2, 0x1f00))
|
||||||
|
@ -2398,7 +2397,7 @@ static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const uint16_t op, const u
|
||||||
|
|
||||||
tempTP.addr = &workingWord;
|
tempTP.addr = &workingWord;
|
||||||
tempTP.data_type = DT_WORD;
|
tempTP.data_type = DT_WORD;
|
||||||
SetDataMemoryValue(cpustate, tempTP, ADDRESS(workAddr));
|
SetDataMemoryValue(cpustate, tempTP, workAddr);
|
||||||
|
|
||||||
/* S L E U N Z V C */
|
/* S L E U N Z V C */
|
||||||
/* - * - - - - - ? */
|
/* - * - - - - - ? */
|
||||||
|
@ -3112,7 +3111,7 @@ static size_t dsp56k_op_jsr(dsp56k_core* cpustate, const uint16_t op, const uint
|
||||||
PC += 2;
|
PC += 2;
|
||||||
|
|
||||||
/* TODO: This is a hacky implementation of Long vs Fast Interrupts. Do it right someday! */
|
/* TODO: This is a hacky implementation of Long vs Fast Interrupts. Do it right someday! */
|
||||||
if (PC < ADDRESS(0x40))
|
if (PC < 0x80)
|
||||||
{
|
{
|
||||||
/* Long interrupt gets the previous PC, not the current one */
|
/* Long interrupt gets the previous PC, not the current one */
|
||||||
SP++;
|
SP++;
|
||||||
|
@ -3265,7 +3264,7 @@ static size_t dsp56k_op_movec(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
/* Write D */
|
/* Write D */
|
||||||
uint16_t value = cpustate->data->read_word(ADDRESS(*((uint16_t*)R.addr))) ;
|
uint16_t value = cpustate->data->read_word(*((uint16_t*)R.addr)) ;
|
||||||
typed_pointer temp_src = { &value, DT_WORD };
|
typed_pointer temp_src = { &value, DT_WORD };
|
||||||
SetDestinationValue(temp_src, SD);
|
SetDestinationValue(temp_src, SD);
|
||||||
}
|
}
|
||||||
|
@ -3273,7 +3272,7 @@ static size_t dsp56k_op_movec(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
{
|
{
|
||||||
/* Read S */
|
/* Read S */
|
||||||
uint16_t dataMemOffset = *((uint16_t*)R.addr);
|
uint16_t dataMemOffset = *((uint16_t*)R.addr);
|
||||||
SetDataMemoryValue(cpustate, SD, ADDRESS(dataMemOffset));
|
SetDataMemoryValue(cpustate, SD, dataMemOffset);
|
||||||
}
|
}
|
||||||
|
|
||||||
execute_MM_table(cpustate, BITS(op,0x0003), BITS(op,0x000c));
|
execute_MM_table(cpustate, BITS(op,0x0003), BITS(op,0x000c));
|
||||||
|
@ -3307,7 +3306,7 @@ static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const uint16_t op, uint8_
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
/* Write D */
|
/* Write D */
|
||||||
uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
|
uint16_t tempData = cpustate->data->read_word(memOffset);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDestinationValue(temp_src, SD);
|
SetDestinationValue(temp_src, SD);
|
||||||
}
|
}
|
||||||
|
@ -3316,7 +3315,7 @@ static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const uint16_t op, uint8_
|
||||||
/* Read S */
|
/* Read S */
|
||||||
uint16_t tempData = *((uint16_t*)SD.addr);
|
uint16_t tempData = *((uint16_t*)SD.addr);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
|
SetDataMemoryValue(cpustate, temp_src, memOffset);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* S L E U N Z V C */
|
/* S L E U N Z V C */
|
||||||
|
@ -3351,7 +3350,7 @@ static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const uint16_t op, uint8_
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
/* Write D */
|
/* Write D */
|
||||||
uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
|
uint16_t tempData = cpustate->data->read_word(memOffset);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDestinationValue(temp_src, SD);
|
SetDestinationValue(temp_src, SD);
|
||||||
}
|
}
|
||||||
|
@ -3360,7 +3359,7 @@ static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const uint16_t op, uint8_
|
||||||
/* Read S */
|
/* Read S */
|
||||||
uint16_t tempData = *((uint16_t*)SD.addr);
|
uint16_t tempData = *((uint16_t*)SD.addr);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
|
SetDataMemoryValue(cpustate, temp_src, memOffset);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -3402,7 +3401,7 @@ static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const uint16_t op, const
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* 16-bit long address */
|
/* 16-bit long address */
|
||||||
uint16_t tempD = cpustate->data->read_word(ADDRESS(op2));
|
uint16_t tempD = cpustate->data->read_word(op2);
|
||||||
typed_pointer tempTP = {&tempD, DT_WORD};
|
typed_pointer tempTP = {&tempD, DT_WORD};
|
||||||
SetDestinationValue(tempTP, SD);
|
SetDestinationValue(tempTP, SD);
|
||||||
}
|
}
|
||||||
|
@ -3418,7 +3417,7 @@ static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const uint16_t op, const
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* 16-bit long address */
|
/* 16-bit long address */
|
||||||
SetDataMemoryValue(cpustate, SD, ADDRESS(op2));
|
SetDataMemoryValue(cpustate, SD, op2);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3480,7 +3479,7 @@ static size_t dsp56k_op_movec_5(dsp56k_core* cpustate, const uint16_t op, const
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
/* Write D */
|
/* Write D */
|
||||||
uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
|
uint16_t tempData = cpustate->data->read_word(memOffset);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDestinationValue(temp_src, SD);
|
SetDestinationValue(temp_src, SD);
|
||||||
}
|
}
|
||||||
|
@ -3489,7 +3488,7 @@ static size_t dsp56k_op_movec_5(dsp56k_core* cpustate, const uint16_t op, const
|
||||||
/* Read S */
|
/* Read S */
|
||||||
uint16_t tempData = *((uint16_t*)SD.addr);
|
uint16_t tempData = *((uint16_t*)SD.addr);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
|
SetDataMemoryValue(cpustate, temp_src, memOffset);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* S L E U N Z V C */
|
/* S L E U N Z V C */
|
||||||
|
@ -3543,7 +3542,7 @@ static size_t dsp56k_op_movem(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
{
|
{
|
||||||
/* Read from Program Memory */
|
/* Read from Program Memory */
|
||||||
typed_pointer data;
|
typed_pointer data;
|
||||||
uint16_t ldata = cpustate->program->read_word(ADDRESS(*((uint16_t*)R.addr)));
|
uint16_t ldata = cpustate->program->read_word(*((uint16_t*)R.addr));
|
||||||
|
|
||||||
data.addr = &ldata;
|
data.addr = &ldata;
|
||||||
data.data_type = DT_WORD;
|
data.data_type = DT_WORD;
|
||||||
|
@ -3552,7 +3551,7 @@ static size_t dsp56k_op_movem(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Write to Program Memory */
|
/* Write to Program Memory */
|
||||||
SetProgramMemoryValue(cpustate, SD, ADDRESS(*((uint16_t*)R.addr))) ;
|
SetProgramMemoryValue(cpustate, SD, *((uint16_t*)R.addr)) ;
|
||||||
}
|
}
|
||||||
|
|
||||||
execute_MM_table(cpustate, BITS(op,0x00c0), BITS(op,0x0018));
|
execute_MM_table(cpustate, BITS(op,0x00c0), BITS(op,0x0018));
|
||||||
|
@ -3597,7 +3596,7 @@ static size_t dsp56k_op_movep(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
|
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
uint16_t data = cpustate->data->read_word(ADDRESS(pp));
|
uint16_t data = cpustate->data->read_word(pp);
|
||||||
|
|
||||||
typed_pointer tempTP;
|
typed_pointer tempTP;
|
||||||
tempTP.addr = &data;
|
tempTP.addr = &data;
|
||||||
|
@ -3607,7 +3606,7 @@ static size_t dsp56k_op_movep(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
SetDataMemoryValue(cpustate, SD, ADDRESS(pp));
|
SetDataMemoryValue(cpustate, SD, pp);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* S L E U N Z V C */
|
/* S L E U N Z V C */
|
||||||
|
@ -3636,13 +3635,13 @@ static size_t dsp56k_op_movep_1(dsp56k_core* cpustate, const uint16_t op, uint8_
|
||||||
/* A little different than most W if's - opposite read and write */
|
/* A little different than most W if's - opposite read and write */
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
uint16_t data = cpustate->data->read_word(ADDRESS(*((uint16_t*)SD.addr)));
|
uint16_t data = cpustate->data->read_word(*((uint16_t*)SD.addr));
|
||||||
|
|
||||||
typed_pointer tempTP;
|
typed_pointer tempTP;
|
||||||
tempTP.addr = &data;
|
tempTP.addr = &data;
|
||||||
tempTP.data_type = DT_WORD;
|
tempTP.data_type = DT_WORD;
|
||||||
|
|
||||||
SetDataMemoryValue(cpustate, tempTP, ADDRESS(pp));
|
SetDataMemoryValue(cpustate, tempTP, pp);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
@ -3770,7 +3769,7 @@ static size_t dsp56k_op_rep_1(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
LC = iVal;
|
LC = iVal;
|
||||||
|
|
||||||
cpustate->repFlag = 1;
|
cpustate->repFlag = 1;
|
||||||
cpustate->repAddr = PC + ADDRESS(1);
|
cpustate->repAddr = PC + 2;
|
||||||
|
|
||||||
cycles += 4; /* TODO: + mv oscillator clock cycles */
|
cycles += 4; /* TODO: + mv oscillator clock cycles */
|
||||||
}
|
}
|
||||||
|
@ -3806,7 +3805,7 @@ static size_t dsp56k_op_rep_2(dsp56k_core* cpustate, const uint16_t op, uint8_t*
|
||||||
LC = repValue;
|
LC = repValue;
|
||||||
|
|
||||||
cpustate->repFlag = 1;
|
cpustate->repFlag = 1;
|
||||||
cpustate->repAddr = PC + ADDRESS(1);
|
cpustate->repAddr = PC + 2;
|
||||||
|
|
||||||
cycles += 4; /* TODO: + mv oscillator clock cycles */
|
cycles += 4; /* TODO: + mv oscillator clock cycles */
|
||||||
}
|
}
|
||||||
|
@ -4663,7 +4662,7 @@ static void execute_x_memory_data_move(dsp56k_core* cpustate, const uint16_t op,
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
/* From X:<ea> to SD */
|
/* From X:<ea> to SD */
|
||||||
uint16_t data = cpustate->data->read_word(ADDRESS(*((uint16_t*)R.addr)));
|
uint16_t data = cpustate->data->read_word(*((uint16_t*)R.addr));
|
||||||
|
|
||||||
typed_pointer tempTP;
|
typed_pointer tempTP;
|
||||||
tempTP.addr = &data;
|
tempTP.addr = &data;
|
||||||
|
@ -4681,11 +4680,11 @@ static void execute_x_memory_data_move(dsp56k_core* cpustate, const uint16_t op,
|
||||||
tempTP.addr = prev_accum_value;
|
tempTP.addr = prev_accum_value;
|
||||||
tempTP.data_type = DT_LONG_WORD;
|
tempTP.data_type = DT_LONG_WORD;
|
||||||
|
|
||||||
SetDataMemoryValue(cpustate, tempTP, ADDRESS(*((uint16_t*)R.addr))) ;
|
SetDataMemoryValue(cpustate, tempTP, *((uint16_t*)R.addr)) ;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
SetDataMemoryValue(cpustate, SD, ADDRESS(*((uint16_t*)R.addr))) ;
|
SetDataMemoryValue(cpustate, SD, *((uint16_t*)R.addr)) ;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -4711,14 +4710,14 @@ static void execute_x_memory_data_move2(dsp56k_core* cpustate, const uint16_t op
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
/* Write D */
|
/* Write D */
|
||||||
uint16_t value = cpustate->data->read_word(ADDRESS(*mem_offset));
|
uint16_t value = cpustate->data->read_word(*mem_offset);
|
||||||
typed_pointer tempV = {&value, DT_WORD};
|
typed_pointer tempV = {&value, DT_WORD};
|
||||||
SetDestinationValue(tempV, SD);
|
SetDestinationValue(tempV, SD);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Read S */
|
/* Read S */
|
||||||
SetDataMemoryValue(cpustate, SD, ADDRESS(*mem_offset));
|
SetDataMemoryValue(cpustate, SD, *mem_offset);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -4739,7 +4738,7 @@ static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpus
|
||||||
if (W)
|
if (W)
|
||||||
{
|
{
|
||||||
/* Write D */
|
/* Write D */
|
||||||
uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
|
uint16_t tempData = cpustate->data->read_word(memOffset);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDestinationValue(temp_src, SD);
|
SetDestinationValue(temp_src, SD);
|
||||||
}
|
}
|
||||||
|
@ -4748,7 +4747,7 @@ static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpus
|
||||||
/* Read S */
|
/* Read S */
|
||||||
uint16_t tempData = *((uint16_t*)SD.addr);
|
uint16_t tempData = *((uint16_t*)SD.addr);
|
||||||
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
|
||||||
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
|
SetDataMemoryValue(cpustate, temp_src, memOffset);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -4775,13 +4774,13 @@ static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const uint16_
|
||||||
fatalerror("Dsp56k: Unimplemented access to external X Data Memory >= 0xffc0 in Dual X Memory Data Read.\n");
|
fatalerror("Dsp56k: Unimplemented access to external X Data Memory >= 0xffc0 in Dual X Memory Data Read.\n");
|
||||||
|
|
||||||
/* First memmove */
|
/* First memmove */
|
||||||
srcVal1 = cpustate->data->read_word(ADDRESS(*((uint16_t*)R.addr)));
|
srcVal1 = cpustate->data->read_word(*((uint16_t*)R.addr));
|
||||||
tempV.addr = &srcVal1;
|
tempV.addr = &srcVal1;
|
||||||
tempV.data_type = DT_WORD;
|
tempV.data_type = DT_WORD;
|
||||||
SetDestinationValue(tempV, D1);
|
SetDestinationValue(tempV, D1);
|
||||||
|
|
||||||
/* Second memmove */
|
/* Second memmove */
|
||||||
srcVal2 = cpustate->data->read_word(ADDRESS(R3));
|
srcVal2 = cpustate->data->read_word(R3);
|
||||||
tempV.addr = &srcVal2;
|
tempV.addr = &srcVal2;
|
||||||
tempV.data_type = DT_WORD;
|
tempV.data_type = DT_WORD;
|
||||||
SetDestinationValue(tempV, D2);
|
SetDestinationValue(tempV, D2);
|
||||||
|
|
|
@ -15,7 +15,6 @@
|
||||||
//
|
//
|
||||||
namespace DSP56K
|
namespace DSP56K
|
||||||
{
|
{
|
||||||
#define ADDRESS(X) ((X)<<1)
|
|
||||||
#define UNIMPLEMENTED_OPCODE() osd_printf_error("Unimplemented opcode: PC=%04x | %s;\n", PC, __PRETTY_FUNCTION__);
|
#define UNIMPLEMENTED_OPCODE() osd_printf_error("Unimplemented opcode: PC=%04x | %s;\n", PC, __PRETTY_FUNCTION__);
|
||||||
|
|
||||||
class Opcode;
|
class Opcode;
|
||||||
|
|
|
@ -211,7 +211,7 @@ void e0c6200_cpu_device::execute_run()
|
||||||
|
|
||||||
// fetch next opcode
|
// fetch next opcode
|
||||||
debugger_instruction_hook(this, m_pc);
|
debugger_instruction_hook(this, m_pc);
|
||||||
m_op = m_program->read_word(m_pc << 1) & 0xfff;
|
m_op = m_program->read_word(m_pc) & 0xfff;
|
||||||
m_pc = (m_pc & 0x1000) | ((m_pc + 1) & 0x0fff);
|
m_pc = (m_pc & 0x1000) | ((m_pc + 1) & 0x0fff);
|
||||||
|
|
||||||
// minimal opcode time is 5 clock cycles, opcodes take 5, 7, or 12 clock cycles
|
// minimal opcode time is 5 clock cycles, opcodes take 5, 7, or 12 clock cycles
|
||||||
|
|
|
@ -1030,7 +1030,7 @@ void hyperstone_device::init(int scale_mask)
|
||||||
m_icount = 0;
|
m_icount = 0;
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hyperstone_device::timer_callback), this));
|
m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hyperstone_device::timer_callback), this));
|
||||||
|
@ -1269,7 +1269,7 @@ void hyperstone_device::device_reset()
|
||||||
//TODO: Add different reset initializations for BCR, MCR, FCR, TPR
|
//TODO: Add different reset initializations for BCR, MCR, FCR, TPR
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
m_tr_clocks_per_tick = 2;
|
m_tr_clocks_per_tick = 2;
|
||||||
|
|
|
@ -145,7 +145,7 @@ protected:
|
||||||
const address_space_config m_program_config;
|
const address_space_config m_program_config;
|
||||||
const address_space_config m_io_config;
|
const address_space_config m_io_config;
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
|
|
||||||
// CPU registers
|
// CPU registers
|
||||||
|
|
|
@ -193,7 +193,7 @@ void esrip_device::device_start()
|
||||||
m_ipt_ram.resize(IPT_RAM_SIZE/2);
|
m_ipt_ram.resize(IPT_RAM_SIZE/2);
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<-3>();
|
||||||
|
|
||||||
// register our state for the debugger
|
// register our state for the debugger
|
||||||
state_add(STATE_GENPC, "GENPC", m_rip_pc).noshow();
|
state_add(STATE_GENPC, "GENPC", m_rip_pc).noshow();
|
||||||
|
@ -1878,7 +1878,7 @@ void esrip_device::execute_run()
|
||||||
m_pl7 = m_l7;
|
m_pl7 = m_l7;
|
||||||
|
|
||||||
/* Latch instruction */
|
/* Latch instruction */
|
||||||
inst = m_direct->read_qword(RIP_PC << 3);
|
inst = m_direct->read_qword(RIP_PC);
|
||||||
|
|
||||||
in_h = inst >> 32;
|
in_h = inst >> 32;
|
||||||
in_l = inst & 0xffffffff;
|
in_l = inst & 0xffffffff;
|
||||||
|
|
|
@ -193,7 +193,7 @@ protected:
|
||||||
uint8_t *m_lbrm;
|
uint8_t *m_lbrm;
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<-3> *m_direct;
|
||||||
|
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
|
|
|
@ -1959,7 +1959,7 @@ void f8_cpu_device::device_start()
|
||||||
{
|
{
|
||||||
// TODO register debug state
|
// TODO register debug state
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_iospace = &space(AS_IO);
|
m_iospace = &space(AS_IO);
|
||||||
|
|
||||||
save_item(NAME(m_pc0));
|
save_item(NAME(m_pc0));
|
||||||
|
|
|
@ -71,7 +71,7 @@ private:
|
||||||
uint16_t m_io; /* last I/O address */
|
uint16_t m_io; /* last I/O address */
|
||||||
uint16_t m_irq_vector;
|
uint16_t m_irq_vector;
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_iospace;
|
address_space *m_iospace;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
uint8_t m_r[64]; /* scratchpad RAM */
|
uint8_t m_r[64]; /* scratchpad RAM */
|
||||||
|
|
|
@ -301,7 +301,7 @@ void h6280_device::device_reset()
|
||||||
m_io_buffer = 0;
|
m_io_buffer = 0;
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
/* set I and B flags */
|
/* set I and B flags */
|
||||||
|
|
|
@ -357,7 +357,7 @@ protected:
|
||||||
// address spaces
|
// address spaces
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
typedef void (h6280_device::*ophandler)();
|
typedef void (h6280_device::*ophandler)();
|
||||||
|
|
||||||
|
|
|
@ -32,7 +32,7 @@ h8_device::h8_device(const machine_config &mconfig, device_type type, const char
|
||||||
void h8_device::device_start()
|
void h8_device::device_start()
|
||||||
{
|
{
|
||||||
program = &space(AS_PROGRAM);
|
program = &space(AS_PROGRAM);
|
||||||
direct = &program->direct();
|
direct = program->direct<0>();
|
||||||
io = &space(AS_IO);
|
io = &space(AS_IO);
|
||||||
|
|
||||||
state_add(STATE_GENPC, "GENPC", NPC).noshow();
|
state_add(STATE_GENPC, "GENPC", NPC).noshow();
|
||||||
|
|
|
@ -112,7 +112,7 @@ protected:
|
||||||
|
|
||||||
address_space_config program_config, io_config;
|
address_space_config program_config, io_config;
|
||||||
address_space *program, *io;
|
address_space *program, *io;
|
||||||
direct_read_data *direct;
|
direct_read_data<0> *direct;
|
||||||
h8_dma_device *dma_device;
|
h8_dma_device *dma_device;
|
||||||
h8_dtc_device *dtc_device;
|
h8_dtc_device *dtc_device;
|
||||||
h8_dma_state *current_dma;
|
h8_dma_state *current_dma;
|
||||||
|
|
|
@ -168,7 +168,7 @@ void h8_adc_device::conversion_wait(bool first, bool poweron, uint64_t current_t
|
||||||
|
|
||||||
void h8_adc_device::buffer_value(int port, int buffer)
|
void h8_adc_device::buffer_value(int port, int buffer)
|
||||||
{
|
{
|
||||||
buf[buffer] = io->read_word(2*(h8_device::ADC_0 + port));
|
buf[buffer] = io->read_word(h8_device::ADC_0 + port);
|
||||||
if(V>=1) logerror("adc buffer %d -> %d:%03x\n", port, buffer, buf[buffer]);
|
if(V>=1) logerror("adc buffer %d -> %d:%03x\n", port, buffer, buf[buffer]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -13,7 +13,7 @@ h8_port_device::h8_port_device(const machine_config &mconfig, const char *tag, d
|
||||||
|
|
||||||
void h8_port_device::set_info(int _address, uint8_t _default_ddr, uint8_t _mask)
|
void h8_port_device::set_info(int _address, uint8_t _default_ddr, uint8_t _mask)
|
||||||
{
|
{
|
||||||
address = 2*_address;
|
address = _address;
|
||||||
default_ddr = _default_ddr;
|
default_ddr = _default_ddr;
|
||||||
mask = _mask;
|
mask = _mask;
|
||||||
}
|
}
|
||||||
|
|
|
@ -2754,7 +2754,7 @@ inline uint8_t hd61700_cpu_device::read_op()
|
||||||
|
|
||||||
if (m_pc <= INT_ROM)
|
if (m_pc <= INT_ROM)
|
||||||
{
|
{
|
||||||
data = m_program->read_word(addr18<<1);
|
data = m_program->read_word(addr18);
|
||||||
|
|
||||||
if (!(m_fetch_addr&1))
|
if (!(m_fetch_addr&1))
|
||||||
data = (data>>8) ;
|
data = (data>>8) ;
|
||||||
|
@ -2762,9 +2762,9 @@ inline uint8_t hd61700_cpu_device::read_op()
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if (m_fetch_addr&1)
|
if (m_fetch_addr&1)
|
||||||
data = m_program->read_word((addr18+1)<<1);
|
data = m_program->read_word(addr18 + 1);
|
||||||
else
|
else
|
||||||
data = m_program->read_word((addr18+0)<<1);
|
data = m_program->read_word(addr18 + 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
m_fetch_addr += ((m_pc > INT_ROM) ? 2 : 1);
|
m_fetch_addr += ((m_pc > INT_ROM) ? 2 : 1);
|
||||||
|
@ -2780,12 +2780,12 @@ inline uint8_t hd61700_cpu_device::read_op()
|
||||||
|
|
||||||
inline uint8_t hd61700_cpu_device::mem_readbyte(uint8_t segment, uint16_t offset)
|
inline uint8_t hd61700_cpu_device::mem_readbyte(uint8_t segment, uint16_t offset)
|
||||||
{
|
{
|
||||||
return m_program->read_word(make_18bit_addr(segment, offset)<<1) & 0xff;
|
return m_program->read_word(make_18bit_addr(segment, offset)) & 0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
inline void hd61700_cpu_device::mem_writebyte(uint8_t segment, uint16_t offset, uint8_t data)
|
inline void hd61700_cpu_device::mem_writebyte(uint8_t segment, uint16_t offset, uint8_t data)
|
||||||
{
|
{
|
||||||
m_program->write_word(make_18bit_addr(segment, offset)<<1, data);
|
m_program->write_word(make_18bit_addr(segment, offset), data);
|
||||||
}
|
}
|
||||||
|
|
||||||
inline uint32_t hd61700_cpu_device::make_18bit_addr(uint8_t segment, uint16_t offset)
|
inline uint32_t hd61700_cpu_device::make_18bit_addr(uint8_t segment, uint16_t offset)
|
||||||
|
|
|
@ -619,7 +619,7 @@ void hmcs40_cpu_device::execute_run()
|
||||||
// fetch next opcode
|
// fetch next opcode
|
||||||
debugger_instruction_hook(this, m_pc);
|
debugger_instruction_hook(this, m_pc);
|
||||||
m_icount--;
|
m_icount--;
|
||||||
m_op = m_program->read_word(m_pc << 1) & 0x3ff;
|
m_op = m_program->read_word(m_pc) & 0x3ff;
|
||||||
m_i = BITSWAP8(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR)
|
m_i = BITSWAP8(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR)
|
||||||
increment_pc();
|
increment_pc();
|
||||||
|
|
||||||
|
|
|
@ -663,7 +663,7 @@ void hmcs40_cpu_device::op_p()
|
||||||
// P p: Pattern Generation
|
// P p: Pattern Generation
|
||||||
m_icount--;
|
m_icount--;
|
||||||
u16 address = m_a | m_b << 4 | m_c << 8 | (m_op & 7) << 9 | (m_pc & ~0x3f);
|
u16 address = m_a | m_b << 4 | m_c << 8 | (m_op & 7) << 9 | (m_pc & ~0x3f);
|
||||||
u16 o = m_program->read_word((address & m_prgmask) << 1);
|
u16 o = m_program->read_word(address & m_prgmask);
|
||||||
|
|
||||||
// destination is determined by the 2 highest bits
|
// destination is determined by the 2 highest bits
|
||||||
if (o & 0x100)
|
if (o & 0x100)
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -140,7 +140,7 @@ private:
|
||||||
address_space_config m_io_config;
|
address_space_config m_io_config;
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<-1> *m_direct;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
|
|
||||||
uint32_t get_ea(uint16_t opcode);
|
uint32_t get_ea(uint16_t opcode);
|
||||||
|
|
|
@ -3244,7 +3244,7 @@ void i386_device::i386_common_init()
|
||||||
}
|
}
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
m_smi = false;
|
m_smi = false;
|
||||||
m_debugger_temp = 0;
|
m_debugger_temp = 0;
|
||||||
|
|
|
@ -212,7 +212,7 @@ protected:
|
||||||
|
|
||||||
uint8_t m_irq_state;
|
uint8_t m_irq_state;
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
uint32_t m_a20_mask;
|
uint32_t m_a20_mask;
|
||||||
|
|
||||||
|
|
|
@ -53,7 +53,7 @@ void i8008_device::device_start()
|
||||||
{
|
{
|
||||||
// find address spaces
|
// find address spaces
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
// save state
|
// save state
|
||||||
|
|
|
@ -83,7 +83,7 @@ protected:
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
};
|
};
|
||||||
|
|
||||||
// device type definition
|
// device type definition
|
||||||
|
|
|
@ -338,8 +338,8 @@ void i8085a_cpu_device::device_start()
|
||||||
}
|
}
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_opcode_direct = has_space(AS_OPCODES) ? &space(AS_OPCODES).direct() : m_direct;
|
m_opcode_direct = has_space(AS_OPCODES) ? space(AS_OPCODES).direct<0>() : m_direct;
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
/* resolve callbacks */
|
/* resolve callbacks */
|
||||||
|
|
|
@ -139,8 +139,8 @@ private:
|
||||||
bool m_ietemp; /* import/export temp space */
|
bool m_ietemp; /* import/export temp space */
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
direct_read_data *m_opcode_direct;
|
direct_read_data<0> *m_opcode_direct;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
|
|
|
@ -417,8 +417,8 @@ void i8086_common_cpu_device::device_start()
|
||||||
m_stack = m_program;
|
m_stack = m_program;
|
||||||
m_code = m_program;
|
m_code = m_program;
|
||||||
m_extra = m_program;
|
m_extra = m_program;
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_direct_opcodes = &m_opcodes->direct();
|
m_direct_opcodes = m_opcodes->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
save_item(NAME(m_regs.w));
|
save_item(NAME(m_regs.w));
|
||||||
|
|
|
@ -314,7 +314,7 @@ protected:
|
||||||
uint8_t m_test_state;
|
uint8_t m_test_state;
|
||||||
|
|
||||||
address_space *m_program, *m_opcodes, *m_stack, *m_code, *m_extra;
|
address_space *m_program, *m_opcodes, *m_stack, *m_code, *m_extra;
|
||||||
direct_read_data *m_direct, *m_direct_opcodes;
|
direct_read_data<0> *m_direct, *m_direct_opcodes;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
offs_t m_fetch_xor;
|
offs_t m_fetch_xor;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
|
@ -2103,7 +2103,7 @@ void i960_cpu_device::execute_set_input(int irqline, int state)
|
||||||
void i960_cpu_device::device_start()
|
void i960_cpu_device::device_start()
|
||||||
{
|
{
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
|
|
||||||
save_item(NAME(m_IP));
|
save_item(NAME(m_IP));
|
||||||
save_item(NAME(m_PIP));
|
save_item(NAME(m_PIP));
|
||||||
|
|
|
@ -125,7 +125,7 @@ private:
|
||||||
int m_immediate_pri;
|
int m_immediate_pri;
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
|
|
|
@ -49,7 +49,7 @@ void ie15_cpu_device::device_start()
|
||||||
{
|
{
|
||||||
// find address spaces
|
// find address spaces
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
// save state
|
// save state
|
||||||
|
|
|
@ -74,7 +74,7 @@ protected:
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
};
|
};
|
||||||
|
|
||||||
// device type definition
|
// device type definition
|
||||||
|
|
|
@ -338,7 +338,7 @@ void jaguar_cpu_device::device_start()
|
||||||
init_tables();
|
init_tables();
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_cpu_interrupt.resolve_safe();
|
m_cpu_interrupt.resolve_safe();
|
||||||
|
|
||||||
save_item(NAME(m_r));
|
save_item(NAME(m_r));
|
||||||
|
|
|
@ -139,7 +139,7 @@ protected:
|
||||||
int m_bankswitch_icount;
|
int m_bankswitch_icount;
|
||||||
devcb_write_line m_cpu_interrupt;
|
devcb_write_line m_cpu_interrupt;
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
uint32_t m_internal_ram_start;
|
uint32_t m_internal_ram_start;
|
||||||
uint32_t m_internal_ram_end;
|
uint32_t m_internal_ram_end;
|
||||||
|
|
|
@ -195,7 +195,7 @@ void lc8670_cpu_device::device_start()
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_data = &space(AS_DATA);
|
m_data = &space(AS_DATA);
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
|
|
||||||
// set our instruction counter
|
// set our instruction counter
|
||||||
m_icountptr = &m_icount;
|
m_icountptr = &m_icount;
|
||||||
|
|
|
@ -197,7 +197,7 @@ private:
|
||||||
address_space * m_program; // program space (ROM or flash)
|
address_space * m_program; // program space (ROM or flash)
|
||||||
address_space * m_data; // internal RAM/register
|
address_space * m_data; // internal RAM/register
|
||||||
address_space * m_io; // I/O ports
|
address_space * m_io; // I/O ports
|
||||||
direct_read_data * m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
// timers
|
// timers
|
||||||
static const device_timer_id BASE_TIMER = 1;
|
static const device_timer_id BASE_TIMER = 1;
|
||||||
|
|
|
@ -92,7 +92,7 @@ void lh5801_cpu_device::device_start()
|
||||||
{
|
{
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
|
|
||||||
m_in_func.resolve_safe(0);
|
m_in_func.resolve_safe(0);
|
||||||
|
|
||||||
|
|
|
@ -103,7 +103,7 @@ private:
|
||||||
|
|
||||||
address_space *m_program; //ME0
|
address_space *m_program; //ME0
|
||||||
address_space *m_io; //ME1
|
address_space *m_io; //ME1
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
PAIR m_s;
|
PAIR m_s;
|
||||||
PAIR m_p;
|
PAIR m_p;
|
||||||
|
|
|
@ -998,7 +998,7 @@ void m37710_cpu_device::device_start()
|
||||||
memset(m_m37710_regs, 0, sizeof(m_m37710_regs));
|
memset(m_m37710_regs, 0, sizeof(m_m37710_regs));
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
m_ICount = 0;
|
m_ICount = 0;
|
||||||
|
|
|
@ -171,7 +171,7 @@ private:
|
||||||
uint32_t m_source; /* temp register */
|
uint32_t m_source; /* temp register */
|
||||||
uint32_t m_destination; /* temp register */
|
uint32_t m_destination; /* temp register */
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
uint32_t m_stopped; /* Sets how the CPU is stopped */
|
uint32_t m_stopped; /* Sets how the CPU is stopped */
|
||||||
|
|
||||||
|
|
|
@ -45,8 +45,8 @@ void m6502_device::init()
|
||||||
mintf->program = &space(AS_PROGRAM);
|
mintf->program = &space(AS_PROGRAM);
|
||||||
mintf->sprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : mintf->program;
|
mintf->sprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : mintf->program;
|
||||||
|
|
||||||
mintf->direct = &mintf->program->direct();
|
mintf->direct = mintf->program->direct<0>();
|
||||||
mintf->sdirect = &mintf->sprogram->direct();
|
mintf->sdirect = mintf->sprogram->direct<0>();
|
||||||
|
|
||||||
sync_w.resolve_safe();
|
sync_w.resolve_safe();
|
||||||
|
|
||||||
|
|
|
@ -41,7 +41,7 @@ protected:
|
||||||
class memory_interface {
|
class memory_interface {
|
||||||
public:
|
public:
|
||||||
address_space *program, *sprogram;
|
address_space *program, *sprogram;
|
||||||
direct_read_data *direct, *sdirect;
|
direct_read_data<0> *direct, *sdirect;
|
||||||
|
|
||||||
virtual ~memory_interface() {}
|
virtual ~memory_interface() {}
|
||||||
virtual uint8_t read(uint16_t adr) = 0;
|
virtual uint8_t read(uint16_t adr) = 0;
|
||||||
|
|
|
@ -464,9 +464,9 @@ void m6800_cpu_device::EAT_CYCLES()
|
||||||
void m6800_cpu_device::device_start()
|
void m6800_cpu_device::device_start()
|
||||||
{
|
{
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_decrypted_opcodes = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program;
|
m_decrypted_opcodes = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program;
|
||||||
m_decrypted_opcodes_direct = &m_decrypted_opcodes->direct();
|
m_decrypted_opcodes_direct = m_decrypted_opcodes->direct<0>();
|
||||||
|
|
||||||
m_pc.d = 0;
|
m_pc.d = 0;
|
||||||
m_s.d = 0;
|
m_s.d = 0;
|
||||||
|
|
|
@ -85,7 +85,7 @@ protected:
|
||||||
|
|
||||||
/* Memory spaces */
|
/* Memory spaces */
|
||||||
address_space *m_program, *m_decrypted_opcodes;
|
address_space *m_program, *m_decrypted_opcodes;
|
||||||
direct_read_data *m_direct, *m_decrypted_opcodes_direct;
|
direct_read_data<0> *m_direct, *m_decrypted_opcodes_direct;
|
||||||
|
|
||||||
const op_func *m_insn;
|
const op_func *m_insn;
|
||||||
const uint8_t *m_cycles; /* clock cycle of instruction table */
|
const uint8_t *m_cycles; /* clock cycle of instruction table */
|
||||||
|
|
|
@ -312,7 +312,7 @@ public:
|
||||||
// m68k_memory_interface memory;
|
// m68k_memory_interface memory;
|
||||||
|
|
||||||
address_space *m_space, *m_ospace;
|
address_space *m_space, *m_ospace;
|
||||||
direct_read_data *m_direct, *m_odirect;
|
direct_read_data<0> *m_direct, *m_odirect;
|
||||||
|
|
||||||
uint32_t iotemp;
|
uint32_t iotemp;
|
||||||
|
|
||||||
|
|
|
@ -1236,9 +1236,9 @@ uint16_t m68000_base_device::m68008_read_immediate_16(offs_t address)
|
||||||
void m68000_base_device::init8(address_space &space, address_space &ospace)
|
void m68000_base_device::init8(address_space &space, address_space &ospace)
|
||||||
{
|
{
|
||||||
m_space = &space;
|
m_space = &space;
|
||||||
m_direct = &space.direct();
|
m_direct = space.direct<0>();
|
||||||
m_ospace = &ospace;
|
m_ospace = &ospace;
|
||||||
m_odirect = &ospace.direct();
|
m_odirect = ospace.direct<0>();
|
||||||
// m_cpustate = this;
|
// m_cpustate = this;
|
||||||
opcode_xor = 0;
|
opcode_xor = 0;
|
||||||
|
|
||||||
|
@ -1275,9 +1275,9 @@ void m68000_base_device::m68000_write_byte(offs_t address, uint8_t data)
|
||||||
void m68000_base_device::init16(address_space &space, address_space &ospace)
|
void m68000_base_device::init16(address_space &space, address_space &ospace)
|
||||||
{
|
{
|
||||||
m_space = &space;
|
m_space = &space;
|
||||||
m_direct = &space.direct();
|
m_direct = space.direct<0>();
|
||||||
m_ospace = &ospace;
|
m_ospace = &ospace;
|
||||||
m_odirect = &ospace.direct();
|
m_odirect = ospace.direct<0>();
|
||||||
|
|
||||||
opcode_xor = 0;
|
opcode_xor = 0;
|
||||||
|
|
||||||
|
@ -1302,9 +1302,9 @@ void m68000_base_device::init16(address_space &space, address_space &ospace)
|
||||||
void m68000_base_device::init32(address_space &space, address_space &ospace)
|
void m68000_base_device::init32(address_space &space, address_space &ospace)
|
||||||
{
|
{
|
||||||
m_space = &space;
|
m_space = &space;
|
||||||
m_direct = &space.direct();
|
m_direct = space.direct<0>();
|
||||||
m_ospace = &ospace;
|
m_ospace = &ospace;
|
||||||
m_odirect = &ospace.direct();
|
m_odirect = ospace.direct<0>();
|
||||||
opcode_xor = WORD_XOR_BE(0);
|
opcode_xor = WORD_XOR_BE(0);
|
||||||
|
|
||||||
readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this);
|
readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this);
|
||||||
|
@ -1521,9 +1521,9 @@ void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data)
|
||||||
void m68000_base_device::init32mmu(address_space &space, address_space &ospace)
|
void m68000_base_device::init32mmu(address_space &space, address_space &ospace)
|
||||||
{
|
{
|
||||||
m_space = &space;
|
m_space = &space;
|
||||||
m_direct = &space.direct();
|
m_direct = space.direct<0>();
|
||||||
m_ospace = &ospace;
|
m_ospace = &ospace;
|
||||||
m_odirect = &ospace.direct();
|
m_odirect = ospace.direct<0>();
|
||||||
opcode_xor = WORD_XOR_BE(0);
|
opcode_xor = WORD_XOR_BE(0);
|
||||||
|
|
||||||
readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this);
|
readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this);
|
||||||
|
@ -1649,9 +1649,9 @@ void m68000_base_device::writelong_d32_hmmu(offs_t address, uint32_t data)
|
||||||
void m68000_base_device::init32hmmu(address_space &space, address_space &ospace)
|
void m68000_base_device::init32hmmu(address_space &space, address_space &ospace)
|
||||||
{
|
{
|
||||||
m_space = &space;
|
m_space = &space;
|
||||||
m_direct = &space.direct();
|
m_direct = space.direct<0>();
|
||||||
m_ospace = &ospace;
|
m_ospace = &ospace;
|
||||||
m_odirect = &ospace.direct();
|
m_odirect = ospace.direct<0>();
|
||||||
opcode_xor = WORD_XOR_BE(0);
|
opcode_xor = WORD_XOR_BE(0);
|
||||||
|
|
||||||
readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this);
|
readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this);
|
||||||
|
|
|
@ -263,7 +263,7 @@ m6805_base_device::m6805_base_device(
|
||||||
void m6805_base_device::device_start()
|
void m6805_base_device::device_start()
|
||||||
{
|
{
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
|
|
||||||
// set our instruction counter
|
// set our instruction counter
|
||||||
m_icountptr = &m_icount;
|
m_icountptr = &m_icount;
|
||||||
|
@ -304,9 +304,6 @@ void m6805_base_device::device_reset()
|
||||||
|
|
||||||
m_nmi_state = 0;
|
m_nmi_state = 0;
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
|
||||||
m_direct = &m_program->direct();
|
|
||||||
|
|
||||||
/* IRQ disabled */
|
/* IRQ disabled */
|
||||||
SEI;
|
SEI;
|
||||||
|
|
||||||
|
|
|
@ -277,7 +277,7 @@ protected:
|
||||||
|
|
||||||
// address spaces
|
// address spaces
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -134,8 +134,8 @@ void m6809_base_device::device_start()
|
||||||
m_mintf->m_program = &space(AS_PROGRAM);
|
m_mintf->m_program = &space(AS_PROGRAM);
|
||||||
m_mintf->m_sprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_mintf->m_program;
|
m_mintf->m_sprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_mintf->m_program;
|
||||||
|
|
||||||
m_mintf->m_direct = &m_mintf->m_program->direct();
|
m_mintf->m_direct = m_mintf->m_program->direct<0>();
|
||||||
m_mintf->m_sdirect = &m_mintf->m_sprogram->direct();
|
m_mintf->m_sdirect = m_mintf->m_sprogram->direct<0>();
|
||||||
|
|
||||||
m_lic_func.resolve_safe();
|
m_lic_func.resolve_safe();
|
||||||
|
|
||||||
|
|
|
@ -34,7 +34,7 @@ protected:
|
||||||
class memory_interface {
|
class memory_interface {
|
||||||
public:
|
public:
|
||||||
address_space *m_program, *m_sprogram;
|
address_space *m_program, *m_sprogram;
|
||||||
direct_read_data *m_direct, *m_sdirect;
|
direct_read_data<0> *m_direct, *m_sdirect;
|
||||||
|
|
||||||
virtual ~memory_interface() {}
|
virtual ~memory_interface() {}
|
||||||
virtual uint8_t read(uint16_t adr) = 0;
|
virtual uint8_t read(uint16_t adr) = 0;
|
||||||
|
|
|
@ -79,9 +79,9 @@ util::disasm_interface *mb86233_cpu_device::create_disassembler()
|
||||||
#define GETBRAM() m_BRAM
|
#define GETBRAM() m_BRAM
|
||||||
#define GETREPCNT() m_repcnt
|
#define GETREPCNT() m_repcnt
|
||||||
|
|
||||||
#define ROPCODE(a) m_direct->read_dword(a<<2)
|
#define ROPCODE(a) m_direct->read_dword(a)
|
||||||
#define RDMEM(a) m_program->read_dword((a<<2))
|
#define RDMEM(a) m_program->read_dword(a)
|
||||||
#define WRMEM(a,v) m_program->write_dword((a<<2), v)
|
#define WRMEM(a,v) m_program->write_dword((a), v)
|
||||||
|
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
Initialization and Shutdown
|
Initialization and Shutdown
|
||||||
|
@ -110,7 +110,7 @@ void mb86233_cpu_device::device_start()
|
||||||
m_fifo_write_cb.resolve_safe();
|
m_fifo_write_cb.resolve_safe();
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<-2>();
|
||||||
|
|
||||||
if ( m_tablergn )
|
if ( m_tablergn )
|
||||||
{
|
{
|
||||||
|
|
|
@ -109,7 +109,7 @@ private:
|
||||||
uint32_t m_extport[0x30];
|
uint32_t m_extport[0x30];
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<-2> *m_direct;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
/* FIFO */
|
/* FIFO */
|
||||||
|
|
|
@ -57,7 +57,7 @@ void mb86235_device::execute_run()
|
||||||
void mb86235_device::device_start()
|
void mb86235_device::device_start()
|
||||||
{
|
{
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<-3>();
|
||||||
m_dataa = &space(AS_DATA);
|
m_dataa = &space(AS_DATA);
|
||||||
m_datab = &space(AS_IO);
|
m_datab = &space(AS_IO);
|
||||||
|
|
||||||
|
|
|
@ -73,7 +73,7 @@ protected:
|
||||||
// device_disasm_interface overrides
|
// device_disasm_interface overrides
|
||||||
virtual util::disasm_interface *create_disassembler() override;
|
virtual util::disasm_interface *create_disassembler() override;
|
||||||
|
|
||||||
direct_read_data *m_direct;
|
direct_read_data<-3> *m_direct;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
|
||||||
|
|
|
@ -498,7 +498,6 @@ void mb86235_device::static_generate_memory_accessors()
|
||||||
UML_CMP(block, I0, 0x400);
|
UML_CMP(block, I0, 0x400);
|
||||||
UML_JMPc(block, COND_GE, label);
|
UML_JMPc(block, COND_GE, label);
|
||||||
// internal A-RAM
|
// internal A-RAM
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
|
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
|
||||||
UML_RET(block);
|
UML_RET(block);
|
||||||
// external
|
// external
|
||||||
|
@ -506,7 +505,6 @@ void mb86235_device::static_generate_memory_accessors()
|
||||||
UML_AND(block, I0, I0, 0x3fff);
|
UML_AND(block, I0, I0, 0x3fff);
|
||||||
UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
|
UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
|
||||||
UML_OR(block, I0, I0, I2);
|
UML_OR(block, I0, I0, I2);
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
|
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
|
||||||
UML_RET(block);
|
UML_RET(block);
|
||||||
|
|
||||||
|
@ -523,7 +521,6 @@ void mb86235_device::static_generate_memory_accessors()
|
||||||
UML_CMP(block, I0, 0x400);
|
UML_CMP(block, I0, 0x400);
|
||||||
UML_JMPc(block, COND_GE, label);
|
UML_JMPc(block, COND_GE, label);
|
||||||
// internal A-RAM
|
// internal A-RAM
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
|
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
|
||||||
UML_RET(block);
|
UML_RET(block);
|
||||||
// external
|
// external
|
||||||
|
@ -531,7 +528,6 @@ void mb86235_device::static_generate_memory_accessors()
|
||||||
UML_AND(block, I0, I0, 0x3fff);
|
UML_AND(block, I0, I0, 0x3fff);
|
||||||
UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
|
UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
|
||||||
UML_OR(block, I0, I0, I2);
|
UML_OR(block, I0, I0, I2);
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
|
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
|
||||||
UML_RET(block);
|
UML_RET(block);
|
||||||
|
|
||||||
|
@ -1666,7 +1662,6 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
|
||||||
generate_ea(block, compiler, desc, md, sr & 7, ary, disp5);
|
generate_ea(block, compiler, desc, md, sr & 7, ary, disp5);
|
||||||
if (sr & 0x20) // RAM-B
|
if (sr & 0x20) // RAM-B
|
||||||
{
|
{
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
|
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
|
||||||
}
|
}
|
||||||
else // RAM-A
|
else // RAM-A
|
||||||
|
@ -1684,7 +1679,6 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
|
||||||
generate_ea(block, compiler, desc, md, dr & 7, ary, disp5);
|
generate_ea(block, compiler, desc, md, dr & 7, ary, disp5);
|
||||||
if (dr & 0x20) // RAM-B
|
if (dr & 0x20) // RAM-B
|
||||||
{
|
{
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
|
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
|
||||||
}
|
}
|
||||||
else // RAM-A
|
else // RAM-A
|
||||||
|
@ -1743,7 +1737,6 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
|
||||||
generate_ea(block, compiler, desc, md, sr & 7, ary, disp14);
|
generate_ea(block, compiler, desc, md, sr & 7, ary, disp14);
|
||||||
if (sr & 0x20) // RAM-B
|
if (sr & 0x20) // RAM-B
|
||||||
{
|
{
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
|
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
|
||||||
}
|
}
|
||||||
else // RAM-A
|
else // RAM-A
|
||||||
|
@ -1761,7 +1754,6 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
|
||||||
generate_ea(block, compiler, desc, md, dr & 7, ary, disp14);
|
generate_ea(block, compiler, desc, md, dr & 7, ary, disp14);
|
||||||
if (dr & 0x20) // RAM-B
|
if (dr & 0x20) // RAM-B
|
||||||
{
|
{
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
|
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
|
||||||
}
|
}
|
||||||
else // RAM-A
|
else // RAM-A
|
||||||
|
@ -1779,14 +1771,12 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
|
||||||
generate_reg_read(block, compiler, desc, dr & 0x3f, I0);
|
generate_reg_read(block, compiler, desc, dr & 0x3f, I0);
|
||||||
UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo));
|
UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo));
|
||||||
UML_ADD(block, I1, I1, disp14);
|
UML_ADD(block, I1, I1, disp14);
|
||||||
UML_SHL(block, I1, I1, 2);
|
|
||||||
UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA);
|
UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo));
|
UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo));
|
||||||
UML_ADD(block, I1, I1, disp14);
|
UML_ADD(block, I1, I1, disp14);
|
||||||
UML_SHL(block, I1, I1, 2);
|
|
||||||
UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA);
|
UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA);
|
||||||
generate_reg_write(block, compiler, desc, dr & 0x3f, I0);
|
generate_reg_write(block, compiler, desc, dr & 0x3f, I0);
|
||||||
}
|
}
|
||||||
|
@ -1835,7 +1825,6 @@ void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compile
|
||||||
|
|
||||||
case 3: // RAM-B
|
case 3: // RAM-B
|
||||||
generate_ea(block, compiler, desc, md, dr & 7, ary, disp);
|
generate_ea(block, compiler, desc, md, dr & 7, ary, disp);
|
||||||
UML_SHL(block, I0, I0, 2);
|
|
||||||
UML_WRITE(block, I0, imm, SIZE_DWORD, SPACE_IO);
|
UML_WRITE(block, I0, imm, SIZE_DWORD, SPACE_IO);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -63,7 +63,7 @@ mb86235_frontend::mb86235_frontend(mb86235_device *core, uint32_t window_start,
|
||||||
|
|
||||||
bool mb86235_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
|
bool mb86235_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
|
||||||
{
|
{
|
||||||
uint64_t opcode = desc.opptr.q[0] = m_core->m_direct->read_qword(desc.pc * 8, 0);
|
uint64_t opcode = desc.opptr.q[0] = m_core->m_direct->read_qword(desc.pc, 0);
|
||||||
|
|
||||||
desc.length = 1;
|
desc.length = 1;
|
||||||
desc.cycles = 1;
|
desc.cycles = 1;
|
||||||
|
|
|
@ -176,7 +176,7 @@ util::disasm_interface *mb88_cpu_device::create_disassembler()
|
||||||
void mb88_cpu_device::device_start()
|
void mb88_cpu_device::device_start()
|
||||||
{
|
{
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_data = &space(AS_DATA);
|
m_data = &space(AS_DATA);
|
||||||
|
|
||||||
m_read_k.resolve_safe(0);
|
m_read_k.resolve_safe(0);
|
||||||
|
|
|
@ -210,7 +210,7 @@ private:
|
||||||
uint8_t m_pending_interrupt;
|
uint8_t m_pending_interrupt;
|
||||||
|
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_data;
|
address_space *m_data;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
||||||
|
|
|
@ -397,7 +397,7 @@ void mc68hc11_cpu_device::device_start()
|
||||||
m_internal_ram.resize(m_internal_ram_size);
|
m_internal_ram.resize(m_internal_ram_size);
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
save_item(NAME(m_pc));
|
save_item(NAME(m_pc));
|
||||||
|
|
|
@ -100,7 +100,7 @@ private:
|
||||||
int m_ad_channel;
|
int m_ad_channel;
|
||||||
|
|
||||||
uint8_t m_irq_state[2];
|
uint8_t m_irq_state[2];
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
int m_icount;
|
int m_icount;
|
||||||
|
|
|
@ -142,7 +142,7 @@ void mcs40_cpu_device_base::device_start()
|
||||||
m_spaces[AS_RAM_STATUS] = &space(AS_RAM_STATUS);
|
m_spaces[AS_RAM_STATUS] = &space(AS_RAM_STATUS);
|
||||||
m_spaces[AS_RAM_PORTS] = &space(AS_RAM_PORTS);
|
m_spaces[AS_RAM_PORTS] = &space(AS_RAM_PORTS);
|
||||||
m_spaces[AS_PROGRAM_MEMORY] = &space(AS_PROGRAM_MEMORY);
|
m_spaces[AS_PROGRAM_MEMORY] = &space(AS_PROGRAM_MEMORY);
|
||||||
m_direct = &m_spaces[AS_ROM]->direct();
|
m_direct = m_spaces[AS_ROM]->direct<0>();
|
||||||
|
|
||||||
m_bus_cycle_cb.bind_relative_to(*owner());
|
m_bus_cycle_cb.bind_relative_to(*owner());
|
||||||
m_sync_cb.resolve_safe();
|
m_sync_cb.resolve_safe();
|
||||||
|
|
|
@ -291,7 +291,7 @@ private:
|
||||||
// address spaces
|
// address spaces
|
||||||
address_space_config const m_space_config[7];
|
address_space_config const m_space_config[7];
|
||||||
address_space *m_spaces[7];
|
address_space *m_spaces[7];
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
|
|
||||||
// bus snooping callback
|
// bus snooping callback
|
||||||
bus_cycle_delegate m_bus_cycle_cb;
|
bus_cycle_delegate m_bus_cycle_cb;
|
||||||
|
|
|
@ -973,7 +973,7 @@ void mcs48_cpu_device::device_start()
|
||||||
m_ea = (m_int_rom_size ? 0 : 1);
|
m_ea = (m_int_rom_size ? 0 : 1);
|
||||||
|
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_data = &space(AS_DATA);
|
m_data = &space(AS_DATA);
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
|
|
|
@ -228,7 +228,7 @@ protected:
|
||||||
|
|
||||||
/* Memory spaces */
|
/* Memory spaces */
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_data;
|
address_space *m_data;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
|
|
||||||
|
|
|
@ -2102,7 +2102,7 @@ uint8_t mcs51_cpu_device::sfr_read(size_t offset)
|
||||||
void mcs51_cpu_device::device_start()
|
void mcs51_cpu_device::device_start()
|
||||||
{
|
{
|
||||||
m_program = &space(AS_PROGRAM);
|
m_program = &space(AS_PROGRAM);
|
||||||
m_direct = &m_program->direct();
|
m_direct = m_program->direct<0>();
|
||||||
m_data = &space(AS_DATA);
|
m_data = &space(AS_DATA);
|
||||||
m_io = &space(AS_IO);
|
m_io = &space(AS_IO);
|
||||||
|
|
||||||
|
|
|
@ -166,7 +166,7 @@ protected:
|
||||||
|
|
||||||
/* Memory spaces */
|
/* Memory spaces */
|
||||||
address_space *m_program;
|
address_space *m_program;
|
||||||
direct_read_data *m_direct;
|
direct_read_data<0> *m_direct;
|
||||||
address_space *m_data;
|
address_space *m_data;
|
||||||
address_space *m_io;
|
address_space *m_io;
|
||||||
|
|
||||||
|
|
|
@ -73,7 +73,7 @@ void i8x9x_device::commit_hso_cam()
|
||||||
|
|
||||||
void i8x9x_device::ad_start(uint64_t current_time)
|
void i8x9x_device::ad_start(uint64_t current_time)
|
||||||
{
|
{
|
||||||
ad_result = (io->read_word(2*((ad_command & 7) + A0)) << 6) | 8 | (ad_command & 7);
|
ad_result = (io->read_word((ad_command & 7) + A0) << 6) | 8 | (ad_command & 7);
|
||||||
ad_done = current_time + 88;
|
ad_done = current_time + 88;
|
||||||
internal_update(current_time);
|
internal_update(current_time);
|
||||||
}
|
}
|
||||||
|
@ -87,7 +87,7 @@ void i8x9x_device::serial_send(uint8_t data)
|
||||||
void i8x9x_device::serial_send_done()
|
void i8x9x_device::serial_send_done()
|
||||||
{
|
{
|
||||||
serial_send_timer = 0;
|
serial_send_timer = 0;
|
||||||
io->write_word(SERIAL*2, serial_send_buf);
|
io->write_word(SERIAL, serial_send_buf);
|
||||||
pending_irq |= IRQ_SERIAL;
|
pending_irq |= IRQ_SERIAL;
|
||||||
sp_stat |= 0x20;
|
sp_stat |= 0x20;
|
||||||
check_irq();
|
check_irq();
|
||||||
|
@ -134,11 +134,11 @@ void i8x9x_device::io_w8(uint8_t adr, uint8_t data)
|
||||||
break;
|
break;
|
||||||
case 0x0f:
|
case 0x0f:
|
||||||
logerror("%s: io port 1 %02x (%04x)\n", tag(), data, PPC);
|
logerror("%s: io port 1 %02x (%04x)\n", tag(), data, PPC);
|
||||||
io->write_word(P1*2, data);
|
io->write_word(P1, data);
|
||||||
break;
|
break;
|
||||||
case 0x10:
|
case 0x10:
|
||||||
logerror("%s: io port 2 %02x (%04x)\n", tag(), data, PPC);
|
logerror("%s: io port 2 %02x (%04x)\n", tag(), data, PPC);
|
||||||
io->write_word(P2*2, data);
|
io->write_word(P2, data);
|
||||||
break;
|
break;
|
||||||
case 0x11:
|
case 0x11:
|
||||||
logerror("%s: sp con %02x (%04x)\n", tag(), data, PPC);
|
logerror("%s: sp con %02x (%04x)\n", tag(), data, PPC);
|
||||||
|
@ -217,16 +217,16 @@ uint8_t i8x9x_device::io_r8(uint8_t adr)
|
||||||
return timer_value(2, total_cycles()) >> 8;
|
return timer_value(2, total_cycles()) >> 8;
|
||||||
case 0x0e: {
|
case 0x0e: {
|
||||||
static int last = -1;
|
static int last = -1;
|
||||||
if(io->read_word(P0*2) != last) {
|
if(io->read_word(P0) != last) {
|
||||||
last = io->read_word(P0*2);
|
last = io->read_word(P0);
|
||||||
logerror("%s: read p0 %02x\n", tag(), io->read_word(P0*2));
|
logerror("%s: read p0 %02x\n", tag(), io->read_word(P0*2));
|
||||||
}
|
}
|
||||||
return io->read_word(P0*2);
|
return io->read_word(P0);
|
||||||
}
|
}
|
||||||
case 0x0f:
|
case 0x0f:
|
||||||
return io->read_word(P1*2);
|
return io->read_word(P1);
|
||||||
case 0x10:
|
case 0x10:
|
||||||
return io->read_word(P2*2);
|
return io->read_word(P2);
|
||||||
case 0x11: {
|
case 0x11: {
|
||||||
uint8_t res = sp_stat;
|
uint8_t res = sp_stat;
|
||||||
sp_stat &= 0x80;
|
sp_stat &= 0x80;
|
||||||
|
|
|
@ -23,7 +23,7 @@ mcs96_device::mcs96_device(const machine_config &mconfig, device_type type, cons
|
||||||
void mcs96_device::device_start()
|
void mcs96_device::device_start()
|
||||||
{
|
{
|
||||||
program = &space(AS_PROGRAM);
|
program = &space(AS_PROGRAM);
|
||||||
direct = &program->direct();
|
direct = program->direct<0>();
|
||||||
m_icountptr = &icount;
|
m_icountptr = &icount;
|
||||||
|
|
||||||
state_add(STATE_GENPC, "GENPC", PC).noshow();
|
state_add(STATE_GENPC, "GENPC", PC).noshow();
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue