150 lines
2.8 KiB
C++
150 lines
2.8 KiB
C++
#include "pvr_regs.h"
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#include "pvr_mem.h"
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#include "Renderer_if.h"
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#include "ta.h"
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#include "spg.h"
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bool pal_needs_update=true;
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bool fog_needs_update=true;
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u8 pvr_regs[pvr_RegSize];
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u32 pvr_ReadReg(u32 addr)
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{
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return PvrReg(addr,u32);
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}
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void pvr_WriteReg(u32 paddr,u32 data)
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{
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u32 addr=paddr&pvr_RegMask;
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switch (addr)
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{
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case ID_addr:
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case REVISION_addr:
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case TA_YUV_TEX_CNT_addr:
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return; // read only
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case STARTRENDER_addr:
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//start render
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rend_start_render();
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return;
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case TA_LIST_INIT_addr:
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if (data >> 31)
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{
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ta_vtx_ListInit();
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data=0;
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TA_NEXT_OPB = TA_NEXT_OPB_INIT;
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TA_ITP_CURRENT = TA_ISP_BASE;
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}
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break;
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case SOFTRESET_addr:
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if (data != 0)
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{
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if (data & 1)
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ta_vtx_SoftReset();
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}
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return;
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case TA_LIST_CONT_addr:
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//a write of anything works ?
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ta_vtx_ListCont();
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break;
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case SPG_CONTROL_addr:
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case SPG_LOAD_addr:
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if (PvrReg(addr, u32) != data)
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{
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PvrReg(addr, u32) = data;
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CalculateSync();
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}
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return;
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case FB_R_CTRL_addr:
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{
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bool vclk_div_changed = (PvrReg(addr, u32) ^ data) & (1 << 23);
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PvrReg(addr, u32) = data;
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if (vclk_div_changed)
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CalculateSync();
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}
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return;
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case FB_R_SIZE_addr:
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if (PvrReg(addr, u32) != data)
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{
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PvrReg(addr, u32) = data;
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fb_dirty = false;
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check_framebuffer_write();
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}
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return;
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case TA_YUV_TEX_BASE_addr:
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PvrReg(addr, u32) = data & 0x00FFFFF8;
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YUV_init();
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return;
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case TA_YUV_TEX_CTRL_addr:
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PvrReg(addr, u32) = data;
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YUV_init();
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return;
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case FB_R_SOF1_addr:
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data &= 0x00fffffc;
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if (data == FB_W_SOF1)
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{
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rend_swap_frame();
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}
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break;
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case FB_W_SOF1_addr:
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case FB_W_SOF2_addr:
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data &= 0x01fffffc;
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break;
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case PAL_RAM_CTRL_addr:
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pal_needs_update = pal_needs_update || ((data ^ PAL_RAM_CTRL) & 3) != 0;
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break;
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default:
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if (addr >= PALETTE_RAM_START_addr && PvrReg(addr,u32) != data)
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{
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pal_needs_update = true;
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}
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else if (addr >= FOG_TABLE_START_addr && addr <= FOG_TABLE_END_addr && PvrReg(addr,u32) != data)
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{
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fog_needs_update = true;
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}
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break;
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}
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PvrReg(addr,u32)=data;
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}
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void Regs_Reset(bool hard)
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{
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if (hard)
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memset(&pvr_regs[0], 0, sizeof(pvr_regs));
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ID_Reg = 0x17FD11DB;
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REVISION = 0x00000011;
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SOFTRESET = 0x00000007;
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SPG_HBLANK_INT.full = 0x031D0000;
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SPG_VBLANK_INT.full = 0x01500104;
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FPU_PARAM_CFG = 0x0007DF77;
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HALF_OFFSET = 0x00000007;
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ISP_FEED_CFG = 0x00402000;
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SDRAM_REFRESH = 0x00000020;
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SDRAM_ARB_CFG = 0x0000001F;
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SDRAM_CFG = 0x15F28997;
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SPG_HBLANK.full = 0x007E0345;
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SPG_LOAD.full = 0x01060359;
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SPG_VBLANK.full = 0x01500104;
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SPG_WIDTH.full = 0x07F1933F;
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VO_CONTROL.full = 0x00000108;
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VO_STARTX.full = 0x0000009D;
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VO_STARTY.full = 0x00150015;
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SCALER_CTL.full = 0x00000400;
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FB_BURSTCTRL = 0x00090639;
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PT_ALPHA_REF = 0x000000FF;
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}
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