1909 lines
42 KiB
C++
1909 lines
42 KiB
C++
// serialize.cpp : save states
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#if 1
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#include "types.h"
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#include "hw/aica/dsp.h"
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#include "hw/aica/aica.h"
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#include "hw/aica/sgc_if.h"
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#include "hw/holly/sb_mem.h"
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#include "hw/flashrom/flashrom.h"
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#include "hw/mem/_vmem.h"
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#include "hw/gdrom/gdromv3.h"
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#include "hw/maple/maple_cfg.h"
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#include "hw/pvr/Renderer_if.h"
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#include "hw/pvr/ta_structs.h"
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#include "hw/sh4/sh4_interrupts.h"
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#include "hw/sh4/sh4_sched.h"
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#include "hw/sh4/sh4_mmr.h"
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#include "hw/sh4/modules/mmu.h"
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#include "imgread/common.h"
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#include "reios/reios.h"
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#include <map>
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#include <set>
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#include "rend/gles/gles.h"
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#include "hw/sh4/dyna/blockmanager.h"
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#include "hw/sh4/dyna/ngen.h"
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#include "hw/naomi/naomi_cart.h"
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/*
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* search for "maybe" to find items that were left out that may be needed
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*/
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extern "C" void DYNACALL TAWriteSQ(u32 address,u8* sqb);
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enum serialize_version_enum {
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V1,
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V2,
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V3,
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V4,
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V5_LIBRETRO
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} ;
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//./core/hw/arm7/arm_mem.cpp
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extern bool aica_interr;
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extern u32 aica_reg_L;
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extern bool e68k_out;
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extern u32 e68k_reg_L;
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extern u32 e68k_reg_M;
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//./core/hw/arm7/arm7.cpp
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extern DECL_ALIGN(8) reg_pair arm_Reg[RN_ARM_REG_COUNT];
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extern bool armIrqEnable;
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extern bool armFiqEnable;
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extern int armMode;
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extern bool Arm7Enabled;
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extern u8 cpuBitsSet[256];
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/*
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if AREC dynarec enabled:
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vector<ArmDPOP> ops;
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u8* icPtr;
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u8* ICache;
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u8 ARM7_TCB[ICacheSize+4096];
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void* EntryPoints[8*1024*1024/4];
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map<u32,u32> renamed_regs;
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u32 rename_reg_base;
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u32 nfb,ffb,bfb,mfb;
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static x86_block* x86e;
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x86_Label* end_lbl;
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u8* ARM::emit_opt=0;
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eReg ARM::reg_addr;
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eReg ARM::reg_dst;
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s32 ARM::imma;
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*/
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//./core/hw/aica/dsp.o
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extern DECL_ALIGN(4096) dsp_t dsp;
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//recheck dsp.cpp if FEAT_DSPREC == DYNAREC_JIT
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//./core/hw/aica/aica.o
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//these are all just pointers into aica_reg
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//extern CommonData_struct* CommonData;
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//extern DSPData_struct* DSPData;
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//extern InterruptInfo* MCIEB;
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//extern InterruptInfo* MCIPD;
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//extern InterruptInfo* MCIRE;
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//extern InterruptInfo* SCIEB;
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//extern InterruptInfo* SCIPD;
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//extern InterruptInfo* SCIRE;
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extern AicaTimer timers[3];
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//./core/hw/aica/aica_if.o
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extern VLockedMemory aica_ram;
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extern u32 VREG;//video reg =P
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extern u32 ARMRST;//arm reset reg
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extern u32 rtc_EN;
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//extern s32 aica_pending_dma ;
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extern int dma_sched_id;
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//./core/hw/aica/aica_mem.o
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extern u8 aica_reg[0x8000];
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//./core/hw/aica/sgc_if.o
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struct ChannelEx;
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#define AicaChannel ChannelEx
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extern s32 volume_lut[16];
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extern s32 tl_lut[256 + 768]; //xx.15 format. >=255 is muted
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extern u32 AEG_ATT_SPS[64];
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extern u32 AEG_DSR_SPS[64];
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extern s16 pl;
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extern s16 pr;
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//this is just a pointer to aica_reg
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//extern DSP_OUT_VOL_REG* dsp_out_vol;
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//not needed - one-time init
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//void(* STREAM_STEP_LUT [5][2][2])(ChannelEx *ch)
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//void(* STREAM_INITAL_STEP_LUT [5])(ChannelEx *ch)
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//void(* AEG_STEP_LUT [4])(ChannelEx *ch)
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//void(* FEG_STEP_LUT [4])(ChannelEx *ch)
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//void(* ALFOWS_CALC [4])(ChannelEx *ch)
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//void(* PLFOWS_CALC [4])(ChannelEx *ch)
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//special handling
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//extern AicaChannel AicaChannel::Chans[64];
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#define Chans AicaChannel::Chans
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#define CDDA_SIZE (2352/2)
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extern s16 cdda_sector[CDDA_SIZE];
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extern u32 cdda_index;
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extern SampleType mxlr[64];
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extern u32 samples_gen;
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//./core/hw/holly/sb.o
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extern Array<RegisterStruct> sb_regs;
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extern u32 SB_ISTNRM;
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extern u32 SB_FFST_rc;
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extern u32 SB_FFST;
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//./core/hw/holly/sb_mem.o
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//unused
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//static HollyInterruptID dmatmp1;
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//static HollyInterruptID dmatmp2;
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//static HollyInterruptID OldDmaId;
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//this is one-time init, no updates - don't need to serialize
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//extern RomChip sys_rom;
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#ifdef FLASH_SIZE
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extern DCFlashChip sys_nvmem;
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#endif
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#ifdef BBSRAM_SIZE
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extern SRamChip sys_nvmem;
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#endif
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//this is one-time init, no updates - don't need to serialize
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//extern _vmem_handler area0_handler;
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//./core/hw/gdrom/gdrom_response.o
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extern u16 reply_11[] ;
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//./core/hw/gdrom/gdromv3.o
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extern int gdrom_schid;
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extern signed int sns_asc;
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extern signed int sns_ascq;
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extern signed int sns_key;
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extern packet_cmd_t packet_cmd;
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extern u32 set_mode_offset;
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extern read_params_t read_params ;
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extern packet_cmd_t packet_cmd;
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//Buffer for sector reads [dma]
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extern read_buff_t read_buff ;
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//pio buffer
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extern pio_buff_t pio_buff ;
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extern u32 set_mode_offset;
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extern ata_cmd_t ata_cmd ;
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extern cdda_t cdda ;
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extern gd_states gd_state;
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extern DiscType gd_disk_type;
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extern u32 data_write_mode;
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//Registers
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extern u32 DriveSel;
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extern GD_ErrRegT Error;
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extern GD_InterruptReasonT IntReason;
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extern GD_FeaturesT Features;
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extern GD_SecCountT SecCount;
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extern GD_SecNumbT SecNumber;
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extern GD_StatusT GDStatus;
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extern ByteCount_t ByteCount ;
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//./core/hw/maple/maple_devs.o
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extern char EEPROM[0x100];
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extern bool EEPROM_loaded;
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//./core/hw/maple/maple_if.o
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//one time set
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extern int maple_schid;
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//incremented but never read
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//extern u32 dmacount;
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extern bool maple_ddt_pending_reset;
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//./core/hw/modem/modem.cpp
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extern int modem_sched;
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//./core/hw/pvr/Renderer_if.o
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//only written - not read
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//extern u32 VertexCount;
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extern u32 FrameCount;
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//one-time init
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//extern Renderer* renderer;
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//these are just mutexes used during rendering
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//extern cResetEvent rs;
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//extern cResetEvent re;
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//these max_?? through ovrn are written and not read
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//extern int max_idx;
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//extern int max_mvo;
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//extern int max_op;
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//extern int max_pt;
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//extern int max_tr;
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//extern int max_vtx;
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//extern int max_modt;
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//extern int ovrn;
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//seems safe to omit this - gets refreshed every frame from a pool
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//extern TA_context* _pvrrc;
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//just a flag indiating the rendering thread is running
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//extern int rend_en ;
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//the renderer thread - one time set
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//extern cThread rthd;
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extern bool pend_rend;
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//maybe
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//extern u32 memops_t,memops_l;
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//./core/hw/pvr/pvr_mem.o
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extern u32 YUV_tempdata[512/4];//512 bytes
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extern u32 YUV_dest;
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extern u32 YUV_blockcount;
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extern u32 YUV_x_curr;
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extern u32 YUV_y_curr;
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extern u32 YUV_x_size;
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extern u32 YUV_y_size;
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//./core/hw/pvr/pvr_regs.o
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extern bool fog_needs_update;
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extern u8 pvr_regs[pvr_RegSize];
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//./core/hw/pvr/spg.o
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extern u32 in_vblank;
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extern u32 clc_pvr_scanline;
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extern u32 pvr_numscanlines;
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extern u32 prv_cur_scanline;
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extern u32 vblk_cnt;
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extern u32 Line_Cycles;
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extern u32 Frame_Cycles;
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extern int render_end_schid;
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extern int vblank_schid;
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extern int time_sync;
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extern double speed_load_mspdf;
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extern int mips_counter;
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extern double full_rps;
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extern u32 fskip;
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//./core/hw/pvr/ta.o
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extern u32 ta_type_lut[256];
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extern u8 ta_fsm[2049]; //[2048] stores the current state
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extern u32 ta_fsm_cl;
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//./core/hw/pvr/ta_ctx.o
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//these frameskipping don't need to be saved
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//extern int frameskip;
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//extern bool FrameSkipping; // global switch to enable/disable frameskip
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//maybe need these - but hopefully not
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//extern TA_context* ta_ctx;
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//extern tad_context ta_tad;
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//extern TA_context* vd_ctx;
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//extern rend_context vd_rc;
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//extern cMutex mtx_rqueue;
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//extern TA_context* rqueue;
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//extern cResetEvent frame_finished;
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//extern cMutex mtx_pool;
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//extern vector<TA_context*> ctx_pool;
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//extern vector<TA_context*> ctx_list;
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//end maybe
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//./core/hw/pvr/ta_vtx.o
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extern bool pal_needs_update;
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//extern u32 decoded_colors[3][65536];
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extern u32 tileclip_val;
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extern u8 f32_su8_tbl[65536];
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//written but never read
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//extern ModTriangle* lmr;
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//never changed
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//extern PolyParam nullPP;
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//maybe
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//extern PolyParam* CurrentPP;
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//maybe
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//extern List<PolyParam>* CurrentPPlist;
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//TA state vars
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extern DECL_ALIGN(4) u8 FaceBaseColor[4];
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extern DECL_ALIGN(4) u8 FaceOffsColor[4];
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extern DECL_ALIGN(4) u8 FaceBaseColor1[4];
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extern DECL_ALIGN(4) u8 FaceOffsColor1[4];
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extern DECL_ALIGN(4) u32 SFaceBaseColor;
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extern DECL_ALIGN(4) u32 SFaceOffsColor;
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//maybe
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//extern TaListFP* TaCmd;
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//maybe
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//extern u32 CurrentList;
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//maybe
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//extern TaListFP* VertexDataFP;
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//written but never read
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//extern bool ListIsFinished[5];
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//maybe ; need special handler
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//FifoSplitter<0> TAFifo0;
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//counter for frameskipping - doesn't need to be saved
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//extern int ta_parse_cnt;
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//./core/rend/TexCache.o
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//maybe
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//extern u8* vq_codebook;
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//extern u32 palette_index;
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//extern bool KillTex;
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//extern u32 detwiddle[2][8][1024];
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//maybe
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//extern vector<vram_block*> VramLocks[/*VRAM_SIZE*/(16*1024*1024)/PAGE_SIZE];
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//maybe - probably not - just a locking mechanism
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//extern cMutex vramlist_lock;
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extern VLockedMemory vram;
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//./core/hw/sh4/sh4_mmr.o
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extern Array<u8> OnChipRAM;
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extern Array<RegisterStruct> CCN; //CCN : 14 registers
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extern Array<RegisterStruct> UBC; //UBC : 9 registers
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extern Array<RegisterStruct> BSC; //BSC : 18 registers
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extern Array<RegisterStruct> DMAC; //DMAC : 17 registers
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extern Array<RegisterStruct> CPG; //CPG : 5 registers
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extern Array<RegisterStruct> RTC; //RTC : 16 registers
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extern Array<RegisterStruct> INTC; //INTC : 4 registers
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extern Array<RegisterStruct> TMU; //TMU : 12 registers
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extern Array<RegisterStruct> SCI; //SCI : 8 registers
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extern Array<RegisterStruct> SCIF; //SCIF : 10 registers
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//./core/hw/sh4/sh4_mem.o
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extern VLockedMemory mem_b;
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//one-time init
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//extern _vmem_handler area1_32b;
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//one-time init
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//extern _vmem_handler area5_handler;
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//./core/hw/sh4/sh4_interrupts.o
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extern u16 IRLPriority;
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//one-time init
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//extern InterptSourceList_Entry InterruptSourceList[28];
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extern DECL_ALIGN(64) u16 InterruptEnvId[32];
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extern DECL_ALIGN(64) u32 InterruptBit[32];
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extern DECL_ALIGN(64) u32 InterruptLevelBit[16];
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extern u32 interrupt_vpend; // Vector of pending interrupts
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extern u32 interrupt_vmask; // Vector of masked interrupts (-1 inhibits all interrupts)
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extern u32 decoded_srimask; // Vector of interrupts allowed by SR.IMSK (-1 inhibits all interrupts)
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//./core/hw/sh4/sh4_core_regs.o
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extern Sh4RCB* p_sh4rcb;
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//just method pointers
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//extern sh4_if sh4_cpu;
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//one-time set
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//extern u8* sh4_dyna_rcb;
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extern u32 old_rm;
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extern u32 old_dn;
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//./core/hw/sh4/sh4_sched.o
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extern u64 sh4_sched_ffb;
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extern u32 sh4_sched_intr;
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extern vector<sched_list> sch_list;
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//extern int sh4_sched_next_id;
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//./core/hw/sh4/interpr/sh4_interpreter.o
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extern int aica_schid;
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extern int rtc_schid;
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//./core/hw/sh4/modules/serial.o
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extern SCIF_SCFSR2_type SCIF_SCFSR2;
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extern u8 SCIF_SCFRDR2;
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extern SCIF_SCFDR2_type SCIF_SCFDR2;
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//./core/hw/sh4/modules/bsc.o
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extern BSC_PDTRA_type BSC_PDTRA;
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//./core/hw/sh4/modules/tmu.o
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extern u32 tmu_shift[3];
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extern u32 tmu_mask[3];
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extern u64 tmu_mask64[3];
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extern u32 old_mode[3];
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extern int tmu_sched[3];
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extern u32 tmu_ch_base[3];
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extern u64 tmu_ch_base64[3];
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//./core/hw/sh4/modules/ccn.o
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extern u32 CCN_QACR_TR[2];
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//./core/hw/sh4/modules/mmu.o
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extern TLB_Entry UTLB[64];
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extern TLB_Entry ITLB[4];
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#if defined(NO_MMU)
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extern u32 sq_remap[64];
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#else
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extern u32 ITLB_LRU_USE[64];
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extern u32 mmu_error_TT;
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#endif
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//./core/imgread/common.o
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extern u32 NullDriveDiscType;
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//maybe - seems to all be one-time inits ; needs special handler
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//extern Disc* disc;
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extern u8 q_subchannel[96];
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//./core/nullDC.o
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//extern unsigned FLASH_SIZE;
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//extern unsigned BBSRAM_SIZE;
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//extern unsigned BIOS_SIZE;
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//extern unsigned RAM_SIZE;
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//extern unsigned ARAM_SIZE;
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//extern unsigned VRAM_SIZE;
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//extern unsigned RAM_MASK;
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//extern unsigned ARAM_MASK;
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//extern unsigned VRAM_MASK;
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//settings can be dynamic
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//extern settings_t settings;
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//./core/reios/reios.o
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//never used
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//extern u8* biosrom;
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//one time init
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//extern u8* flashrom;
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//one time init
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//extern u32 base_fad ;
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//one time init
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//extern bool descrambl;
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//one time init
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//extern bool bootfile_inited;
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//all these reios_?? are one-time inits
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//extern char reios_bootfile[32];
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//extern char reios_hardware_id[17];
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//extern char reios_maker_id[17];
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//extern char reios_device_info[17];
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//extern char reios_area_symbols[9];
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//extern char reios_peripherals[9];
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//extern char reios_product_number[11];
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//extern char reios_product_version[7];
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//extern char reios_releasedate[17];
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//extern char reios_boot_filename[17];
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//extern char reios_software_company[17];
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//extern char reios_software_name[129];
|
|
//one time init
|
|
//extern map<u32, hook_fp*> hooks;
|
|
//one time init
|
|
//extern map<hook_fp*, u32> hooks_rev;
|
|
|
|
|
|
|
|
|
|
//./core/reios/gdrom_hle.o
|
|
//never used in any meaningful way
|
|
//extern u32 SecMode[4];
|
|
|
|
|
|
|
|
|
|
//./core/reios/descrambl.o
|
|
//random seeds can be...random
|
|
//extern unsigned int seed;
|
|
|
|
|
|
|
|
//./core/rend/gles/gles.o
|
|
//maybe
|
|
//extern GLCache glcache;
|
|
//maybe
|
|
//extern gl_ctx gl;
|
|
//maybe
|
|
//extern struct ShaderUniforms_t ShaderUniforms;
|
|
//maybe
|
|
//extern u32 gcflip;
|
|
//maybe
|
|
//extern float fb_scale_x;
|
|
//extern float fb_scale_y;
|
|
//extern float scale_x;
|
|
//extern float scale_y;
|
|
//extern int screen_width;
|
|
//extern int screen_height;
|
|
//extern GLuint fogTextureId;
|
|
//end maybe
|
|
|
|
|
|
|
|
//./core/rend/gles/gldraw.o
|
|
//maybe
|
|
//extern PipelineShader* CurrentShader;
|
|
//written, but never used
|
|
//extern Vertex* vtx_sort_base;
|
|
//maybe
|
|
//extern vector<SortTrigDrawParam> pidx_sort;
|
|
|
|
|
|
|
|
|
|
//./core/rend/gles/gltex.o
|
|
//maybe ; special handler
|
|
//extern map<u64,TextureCacheData> TexCache;
|
|
//maybe
|
|
//extern FBT fb_rtt;
|
|
//not used
|
|
//static int TexCacheLookups;
|
|
//static int TexCacheHits;
|
|
//static float LastTexCacheStats;
|
|
//maybe should get reset naturally if needed
|
|
//GLuint fbTextureId;
|
|
|
|
|
|
|
|
|
|
//./core/hw/naomi/naomi.o
|
|
extern u32 naomi_updates;
|
|
extern u32 GSerialBuffer;
|
|
extern u32 BSerialBuffer;
|
|
extern int GBufPos;
|
|
extern int BBufPos;
|
|
extern int GState;
|
|
extern int BState;
|
|
extern int GOldClk;
|
|
extern int BOldClk;
|
|
extern int BControl;
|
|
extern int BCmd;
|
|
extern int BLastCmd;
|
|
extern int GControl;
|
|
extern int GCmd;
|
|
extern int GLastCmd;
|
|
extern int SerStep;
|
|
extern int SerStep2;
|
|
extern unsigned char BSerial[];
|
|
extern unsigned char GSerial[];
|
|
extern u32 reg_dimm_3c; //IO window ! writen, 0x1E03 some flag ?
|
|
extern u32 reg_dimm_40; //parameters
|
|
extern u32 reg_dimm_44; //parameters
|
|
extern u32 reg_dimm_48; //parameters
|
|
extern u32 reg_dimm_4c; //status/control reg ?
|
|
extern bool NaomiDataRead;
|
|
|
|
|
|
|
|
|
|
//./core/hw/naomi/naomi_cart.o
|
|
//all one-time loads
|
|
//u8* RomPtr;
|
|
//u32 RomSize;
|
|
//fd_t* RomCacheMap;
|
|
//u32 RomCacheMapCount;
|
|
|
|
|
|
|
|
|
|
//./core/rec-x64/rec_x64.o
|
|
//maybe need special handler
|
|
//extern BlockCompilerx64 *compilerx64_data;
|
|
|
|
|
|
|
|
|
|
//./core/rec.o
|
|
#if FEAT_SHREC == DYNAREC_CPP
|
|
extern int idxnxx;
|
|
#endif
|
|
|
|
|
|
|
|
//./core/hw/sh4/dyna/decoder.o
|
|
//temp storage only
|
|
//extern RuntimeBlockInfo* blk;
|
|
extern state_t state;
|
|
extern Sh4RegType div_som_reg1;
|
|
extern Sh4RegType div_som_reg2;
|
|
extern Sh4RegType div_som_reg3;
|
|
|
|
|
|
|
|
|
|
//./core/hw/sh4/dyna/driver.o
|
|
//extern u8 SH4_TCB[CODE_SIZE+4096];
|
|
//one time ptr set
|
|
//extern u8* CodeCache;
|
|
extern u32 LastAddr;
|
|
extern u32 LastAddr_min;
|
|
//temp storage only
|
|
//extern u32* emit_ptr;
|
|
extern char block_hash[1024];
|
|
|
|
|
|
|
|
|
|
//./core/hw/sh4/dyna/blockmanager.o
|
|
//cleared but never read
|
|
//extern bm_List blocks_page[/*BLOCKS_IN_PAGE_LIST_COUNT*/(32*1024*1024)/4096];
|
|
//maybe - the next three seem to be list of precompiled blocks of code - but if not found will populate
|
|
//extern bm_List all_blocks;
|
|
//extern bm_List del_blocks;
|
|
//extern blkmap_t blkmap;
|
|
//these two are never referenced
|
|
//extern u32 bm_gc_luc;
|
|
//extern u32 bm_gcf_luc;
|
|
//data is never written to this
|
|
//extern u32 PAGE_STATE[(32*1024*1024)/*RAM_SIZE*//32];
|
|
//never read
|
|
//extern u32 total_saved;
|
|
//counter with no real controlling logic behind it
|
|
//extern u32 rebuild_counter;
|
|
//just printf output
|
|
//extern bool print_stats;
|
|
|
|
|
|
|
|
|
|
//./core/hw/sh4/dyna/shil.o
|
|
extern u32 RegisterWrite[sh4_reg_count];
|
|
extern u32 RegisterRead[sh4_reg_count];
|
|
extern u32 fallback_blocks;
|
|
extern u32 total_blocks;
|
|
extern u32 REMOVED_OPS;
|
|
|
|
bool rc_serialize(void *src, unsigned int src_size, void **dest, unsigned int *total_size)
|
|
{
|
|
if ( *dest != NULL )
|
|
{
|
|
memcpy(*dest, src, src_size) ;
|
|
*dest = ((unsigned char*)*dest) + src_size ;
|
|
}
|
|
|
|
*total_size += src_size ;
|
|
return true ;
|
|
}
|
|
|
|
bool rc_unserialize(void *src, unsigned int src_size, void **dest, unsigned int *total_size)
|
|
{
|
|
if ( *dest != NULL )
|
|
{
|
|
memcpy(src, *dest, src_size) ;
|
|
*dest = ((unsigned char*)*dest) + src_size ;
|
|
}
|
|
|
|
*total_size += src_size ;
|
|
return true ;
|
|
}
|
|
|
|
bool register_serialize(Array<RegisterStruct>& regs,void **data, unsigned int *total_size )
|
|
{
|
|
int i = 0 ;
|
|
|
|
for ( i = 0 ; i < regs.Size ; i++ )
|
|
{
|
|
REICAST_S(regs.data[i].flags) ;
|
|
REICAST_S(regs.data[i].data32) ;
|
|
}
|
|
|
|
return true ;
|
|
}
|
|
|
|
bool register_unserialize(Array<RegisterStruct>& regs,void **data, unsigned int *total_size )
|
|
{
|
|
int i = 0 ;
|
|
u32 dummy = 0 ;
|
|
|
|
for ( i = 0 ; i < regs.Size ; i++ )
|
|
{
|
|
REICAST_US(regs.data[i].flags) ;
|
|
if ( ! (regs.data[i].flags & REG_RF) )
|
|
REICAST_US(regs.data[i].data32) ;
|
|
else
|
|
REICAST_US(dummy) ;
|
|
}
|
|
return true ;
|
|
}
|
|
|
|
bool dc_serialize(void **data, unsigned int *total_size)
|
|
{
|
|
int i = 0;
|
|
int j = 0;
|
|
serialize_version_enum version = V4 ;
|
|
|
|
*total_size = 0 ;
|
|
|
|
//dc not initialized yet
|
|
if ( p_sh4rcb == NULL )
|
|
return false ;
|
|
|
|
REICAST_S(version) ;
|
|
REICAST_S(aica_interr) ;
|
|
REICAST_S(aica_reg_L) ;
|
|
REICAST_S(e68k_out) ;
|
|
REICAST_S(e68k_reg_L) ;
|
|
REICAST_S(e68k_reg_M) ;
|
|
|
|
REICAST_SA(arm_Reg,RN_ARM_REG_COUNT);
|
|
REICAST_S(armIrqEnable);
|
|
REICAST_S(armFiqEnable);
|
|
REICAST_S(armMode);
|
|
REICAST_S(Arm7Enabled);
|
|
REICAST_SA(cpuBitsSet,256);
|
|
bool dummy;
|
|
REICAST_S(dummy);
|
|
REICAST_S(dummy);
|
|
REICAST_S(dummy);
|
|
|
|
REICAST_S(dsp);
|
|
|
|
for ( i = 0 ; i < 3 ; i++)
|
|
{
|
|
REICAST_S(timers[i].c_step);
|
|
REICAST_S(timers[i].m_step);
|
|
}
|
|
|
|
|
|
REICAST_SA(aica_ram.data,aica_ram.size) ;
|
|
REICAST_S(VREG);
|
|
REICAST_S(ARMRST);
|
|
REICAST_S(rtc_EN);
|
|
|
|
REICAST_SA(aica_reg,0x8000);
|
|
|
|
|
|
|
|
REICAST_SA(volume_lut,16);
|
|
REICAST_SA(tl_lut,256 + 768);
|
|
REICAST_SA(AEG_ATT_SPS,64);
|
|
REICAST_SA(AEG_DSR_SPS,64);
|
|
REICAST_S(pl);
|
|
REICAST_S(pr);
|
|
|
|
channel_serialize(data, total_size) ;
|
|
|
|
REICAST_SA(cdda_sector,CDDA_SIZE);
|
|
REICAST_S(cdda_index);
|
|
REICAST_SA(mxlr,64);
|
|
REICAST_S(samples_gen);
|
|
|
|
|
|
register_serialize(sb_regs, data, total_size) ;
|
|
REICAST_S(SB_ISTNRM);
|
|
REICAST_S(SB_FFST_rc);
|
|
REICAST_S(SB_FFST);
|
|
|
|
|
|
|
|
//this is one-time init, no updates - don't need to serialize
|
|
//extern RomChip sys_rom;
|
|
REICAST_S(sys_nvmem.size);
|
|
REICAST_S(sys_nvmem.mask);
|
|
#ifdef FLASH_SIZE
|
|
REICAST_S(sys_nvmem.state);
|
|
#endif
|
|
REICAST_SA(sys_nvmem.data,sys_nvmem.size);
|
|
|
|
//this is one-time init, no updates - don't need to serialize
|
|
//extern _vmem_handler area0_handler;
|
|
|
|
|
|
|
|
|
|
REICAST_SA(reply_11,16) ;
|
|
|
|
|
|
REICAST_S(sns_asc);
|
|
REICAST_S(sns_ascq);
|
|
REICAST_S(sns_key);
|
|
|
|
REICAST_S(packet_cmd);
|
|
REICAST_S(set_mode_offset);
|
|
REICAST_S(read_params);
|
|
REICAST_S(packet_cmd);
|
|
REICAST_S(read_buff);
|
|
REICAST_S(pio_buff);
|
|
REICAST_S(set_mode_offset);
|
|
REICAST_S(ata_cmd);
|
|
REICAST_S(cdda);
|
|
REICAST_S(gd_state);
|
|
REICAST_S(gd_disk_type);
|
|
REICAST_S(data_write_mode);
|
|
REICAST_S(DriveSel);
|
|
REICAST_S(Error);
|
|
REICAST_S(IntReason);
|
|
REICAST_S(Features);
|
|
REICAST_S(SecCount);
|
|
REICAST_S(SecNumber);
|
|
REICAST_S(GDStatus);
|
|
REICAST_S(ByteCount);
|
|
|
|
|
|
REICAST_SA(EEPROM,0x100);
|
|
REICAST_S(EEPROM_loaded);
|
|
|
|
|
|
REICAST_S(maple_ddt_pending_reset);
|
|
|
|
mcfg_SerializeDevices(data, total_size);
|
|
|
|
REICAST_S(FrameCount);
|
|
REICAST_S(pend_rend);
|
|
|
|
|
|
REICAST_SA(YUV_tempdata,512/4);
|
|
REICAST_S(YUV_dest);
|
|
REICAST_S(YUV_blockcount);
|
|
REICAST_S(YUV_x_curr);
|
|
REICAST_S(YUV_y_curr);
|
|
REICAST_S(YUV_x_size);
|
|
REICAST_S(YUV_y_size);
|
|
|
|
REICAST_SA(pvr_regs,pvr_RegSize);
|
|
|
|
REICAST_S(in_vblank);
|
|
REICAST_S(clc_pvr_scanline);
|
|
REICAST_S(pvr_numscanlines);
|
|
REICAST_S(prv_cur_scanline);
|
|
REICAST_S(vblk_cnt);
|
|
REICAST_S(Line_Cycles);
|
|
REICAST_S(Frame_Cycles);
|
|
REICAST_S(speed_load_mspdf);
|
|
REICAST_S(mips_counter);
|
|
REICAST_S(full_rps);
|
|
REICAST_S(fskip);
|
|
|
|
|
|
|
|
REICAST_SA(ta_type_lut,256);
|
|
REICAST_SA(ta_fsm,2049);
|
|
REICAST_S(ta_fsm_cl);
|
|
|
|
REICAST_S(tileclip_val);
|
|
REICAST_SA(f32_su8_tbl,65536);
|
|
REICAST_SA(FaceBaseColor,4);
|
|
REICAST_SA(FaceOffsColor,4);
|
|
REICAST_S(SFaceBaseColor);
|
|
REICAST_S(SFaceOffsColor);
|
|
|
|
REICAST_SA(vram.data, vram.size);
|
|
|
|
REICAST_SA(OnChipRAM.data,OnChipRAM_SIZE);
|
|
|
|
register_serialize(CCN, data, total_size) ;
|
|
register_serialize(UBC, data, total_size) ;
|
|
register_serialize(BSC, data, total_size) ;
|
|
register_serialize(DMAC, data, total_size) ;
|
|
register_serialize(CPG, data, total_size) ;
|
|
register_serialize(RTC, data, total_size) ;
|
|
register_serialize(INTC, data, total_size) ;
|
|
register_serialize(TMU, data, total_size) ;
|
|
register_serialize(SCI, data, total_size) ;
|
|
register_serialize(SCIF, data, total_size) ;
|
|
|
|
REICAST_SA(mem_b.data, mem_b.size);
|
|
|
|
|
|
|
|
REICAST_S(IRLPriority);
|
|
REICAST_SA(InterruptEnvId,32);
|
|
REICAST_SA(InterruptBit,32);
|
|
REICAST_SA(InterruptLevelBit,16);
|
|
REICAST_S(interrupt_vpend);
|
|
REICAST_S(interrupt_vmask);
|
|
REICAST_S(decoded_srimask);
|
|
|
|
|
|
//default to nommu_full
|
|
i = 3 ;
|
|
if ( do_sqw_nommu == &do_sqw_nommu_area_3)
|
|
i = 0 ;
|
|
else if (do_sqw_nommu == &do_sqw_nommu_area_3_nonvmem)
|
|
i = 1 ;
|
|
else if (do_sqw_nommu==(sqw_fp*)&TAWriteSQ)
|
|
i = 2 ;
|
|
else if (do_sqw_nommu==&do_sqw_nommu_full)
|
|
i = 3 ;
|
|
|
|
REICAST_S(i) ;
|
|
|
|
REICAST_SA((*p_sh4rcb).sq_buffer,64/8);
|
|
|
|
//store these before unserializing and then restore after
|
|
//void *getptr = &((*p_sh4rcb).cntx.sr.GetFull) ;
|
|
//void *setptr = &((*p_sh4rcb).cntx.sr.SetFull) ;
|
|
REICAST_S((*p_sh4rcb).cntx);
|
|
|
|
REICAST_S(old_rm);
|
|
REICAST_S(old_dn);
|
|
|
|
|
|
|
|
|
|
REICAST_S(sh4_sched_ffb);
|
|
REICAST_S(sh4_sched_intr);
|
|
|
|
//extern vector<sched_list> list;
|
|
|
|
|
|
REICAST_S(sch_list[aica_schid].tag) ;
|
|
REICAST_S(sch_list[aica_schid].start) ;
|
|
REICAST_S(sch_list[aica_schid].end) ;
|
|
|
|
REICAST_S(sch_list[rtc_schid].tag) ;
|
|
REICAST_S(sch_list[rtc_schid].start) ;
|
|
REICAST_S(sch_list[rtc_schid].end) ;
|
|
|
|
REICAST_S(sch_list[gdrom_schid].tag) ;
|
|
REICAST_S(sch_list[gdrom_schid].start) ;
|
|
REICAST_S(sch_list[gdrom_schid].end) ;
|
|
|
|
REICAST_S(sch_list[maple_schid].tag) ;
|
|
REICAST_S(sch_list[maple_schid].start) ;
|
|
REICAST_S(sch_list[maple_schid].end) ;
|
|
|
|
REICAST_S(sch_list[dma_sched_id].tag) ;
|
|
REICAST_S(sch_list[dma_sched_id].start) ;
|
|
REICAST_S(sch_list[dma_sched_id].end) ;
|
|
|
|
for (int i = 0; i < 3; i++)
|
|
{
|
|
REICAST_S(sch_list[tmu_sched[i]].tag) ;
|
|
REICAST_S(sch_list[tmu_sched[i]].start) ;
|
|
REICAST_S(sch_list[tmu_sched[i]].end) ;
|
|
}
|
|
|
|
REICAST_S(sch_list[render_end_schid].tag) ;
|
|
REICAST_S(sch_list[render_end_schid].start) ;
|
|
REICAST_S(sch_list[render_end_schid].end) ;
|
|
|
|
REICAST_S(sch_list[vblank_schid].tag) ;
|
|
REICAST_S(sch_list[vblank_schid].start) ;
|
|
REICAST_S(sch_list[vblank_schid].end) ;
|
|
|
|
REICAST_S(sch_list[time_sync].tag) ;
|
|
REICAST_S(sch_list[time_sync].start) ;
|
|
REICAST_S(sch_list[time_sync].end) ;
|
|
|
|
#ifdef ENABLE_MODEM
|
|
REICAST_S(sch_list[modem_sched].tag) ;
|
|
REICAST_S(sch_list[modem_sched].start) ;
|
|
REICAST_S(sch_list[modem_sched].end) ;
|
|
#else
|
|
int modem_dummy = 0;
|
|
REICAST_S(modem_dummy);
|
|
REICAST_S(modem_dummy);
|
|
REICAST_S(modem_dummy);
|
|
#endif
|
|
|
|
REICAST_S(SCIF_SCFSR2);
|
|
REICAST_S(SCIF_SCFRDR2);
|
|
REICAST_S(SCIF_SCFDR2);
|
|
|
|
REICAST_S(BSC_PDTRA);
|
|
|
|
REICAST_SA(tmu_shift,3);
|
|
REICAST_SA(tmu_mask,3);
|
|
REICAST_SA(tmu_mask64,3);
|
|
REICAST_SA(old_mode,3);
|
|
REICAST_SA(tmu_ch_base,3);
|
|
REICAST_SA(tmu_ch_base64,3);
|
|
|
|
REICAST_SA(CCN_QACR_TR,2);
|
|
|
|
REICAST_SA(UTLB,64);
|
|
REICAST_SA(ITLB,4);
|
|
#if defined(NO_MMU)
|
|
REICAST_SA(sq_remap,64);
|
|
#else
|
|
REICAST_SA(ITLB_LRU_USE,64);
|
|
REICAST_S(mmu_error_TT);
|
|
#endif
|
|
|
|
REICAST_S(NullDriveDiscType);
|
|
REICAST_SA(q_subchannel,96);
|
|
|
|
REICAST_S(naomi_updates);
|
|
REICAST_S(i); //BoardID
|
|
REICAST_S(GSerialBuffer);
|
|
REICAST_S(BSerialBuffer);
|
|
REICAST_S(GBufPos);
|
|
REICAST_S(BBufPos);
|
|
REICAST_S(GState);
|
|
REICAST_S(BState);
|
|
REICAST_S(GOldClk);
|
|
REICAST_S(BOldClk);
|
|
REICAST_S(BControl);
|
|
REICAST_S(BCmd);
|
|
REICAST_S(BLastCmd);
|
|
REICAST_S(GControl);
|
|
REICAST_S(GCmd);
|
|
REICAST_S(GLastCmd);
|
|
REICAST_S(SerStep);
|
|
REICAST_S(SerStep2);
|
|
REICAST_SA(BSerial,69);
|
|
REICAST_SA(GSerial,69);
|
|
REICAST_S(reg_dimm_3c);
|
|
REICAST_S(reg_dimm_40);
|
|
REICAST_S(reg_dimm_44);
|
|
REICAST_S(reg_dimm_48);
|
|
REICAST_S(reg_dimm_4c);
|
|
REICAST_S(NaomiDataRead);
|
|
|
|
#if FEAT_SHREC == DYNAREC_CPP
|
|
REICAST_S(idxnxx);
|
|
#else
|
|
REICAST_S(i);
|
|
#endif
|
|
|
|
REICAST_S(state);
|
|
REICAST_S(div_som_reg1);
|
|
REICAST_S(div_som_reg2);
|
|
REICAST_S(div_som_reg3);
|
|
|
|
REICAST_S(LastAddr);
|
|
REICAST_S(LastAddr_min);
|
|
REICAST_SA(block_hash,1024);
|
|
|
|
REICAST_SA(RegisterWrite,sh4_reg_count);
|
|
REICAST_SA(RegisterRead,sh4_reg_count);
|
|
REICAST_S(fallback_blocks);
|
|
REICAST_S(total_blocks);
|
|
REICAST_S(REMOVED_OPS);
|
|
|
|
REICAST_S(i); //REICAST_SA(kcode,4);
|
|
REICAST_S(i);
|
|
REICAST_S(i); //REICAST_SA(rt,4);
|
|
REICAST_S(i); //REICAST_SA(lt,4);
|
|
REICAST_S(i); //REICAST_SA(vks,4);
|
|
REICAST_S(i);
|
|
REICAST_S(i);
|
|
REICAST_S(i);
|
|
REICAST_S(i); //REICAST_SA(joyx,4);
|
|
REICAST_S(i); //REICAST_SA(joyy,4);
|
|
|
|
REICAST_S(settings.dreamcast.broadcast);
|
|
REICAST_S(settings.dreamcast.cable);
|
|
REICAST_S(settings.dreamcast.region);
|
|
|
|
if (CurrentCartridge != NULL)
|
|
CurrentCartridge->Serialize(data, total_size);
|
|
|
|
return true ;
|
|
}
|
|
|
|
static bool dc_unserialize_libretro(void **data, unsigned int *total_size)
|
|
{
|
|
int i = 0;
|
|
int j = 0;
|
|
|
|
REICAST_US(aica_interr) ;
|
|
REICAST_US(aica_reg_L) ;
|
|
REICAST_US(e68k_out) ;
|
|
REICAST_US(e68k_reg_L) ;
|
|
REICAST_US(e68k_reg_M) ;
|
|
|
|
REICAST_USA(arm_Reg,RN_ARM_REG_COUNT);
|
|
REICAST_US(armIrqEnable);
|
|
REICAST_US(armFiqEnable);
|
|
REICAST_US(armMode);
|
|
REICAST_US(Arm7Enabled);
|
|
REICAST_USA(cpuBitsSet,256);
|
|
bool dummy;
|
|
REICAST_US(dummy);
|
|
REICAST_US(dummy);
|
|
REICAST_US(dummy);
|
|
|
|
REICAST_US(dsp);
|
|
|
|
for ( i = 0 ; i < 3 ; i++)
|
|
{
|
|
REICAST_US(timers[i].c_step);
|
|
REICAST_US(timers[i].m_step);
|
|
}
|
|
|
|
|
|
REICAST_USA(aica_ram.data,aica_ram.size) ;
|
|
REICAST_US(VREG);
|
|
REICAST_US(ARMRST);
|
|
REICAST_US(rtc_EN);
|
|
|
|
REICAST_USA(aica_reg,0x8000);
|
|
|
|
|
|
|
|
REICAST_USA(volume_lut,16);
|
|
REICAST_USA(tl_lut,256 + 768);
|
|
REICAST_USA(AEG_ATT_SPS,64);
|
|
REICAST_USA(AEG_DSR_SPS,64);
|
|
REICAST_US(pl);
|
|
REICAST_US(pr);
|
|
|
|
channel_unserialize(data, total_size) ;
|
|
|
|
REICAST_USA(cdda_sector,CDDA_SIZE);
|
|
REICAST_US(cdda_index);
|
|
REICAST_USA(mxlr,64);
|
|
REICAST_US(samples_gen);
|
|
|
|
|
|
register_unserialize(sb_regs, data, total_size) ;
|
|
REICAST_US(SB_ISTNRM);
|
|
REICAST_US(SB_FFST_rc);
|
|
REICAST_US(SB_FFST);
|
|
|
|
|
|
|
|
//this is one-time init, no updates - don't need to serialize
|
|
//extern RomChip sys_rom;
|
|
|
|
REICAST_US(i); //LIBRETRO_S(sys_nvmem_sram.size);
|
|
verify(i == 0);
|
|
REICAST_US(i); //LIBRETRO_S(sys_nvmem_sram.mask);
|
|
//LIBRETRO_SA(sys_nvmem_sram.data,sys_nvmem_sram.size);
|
|
|
|
REICAST_US(sys_nvmem.size);
|
|
REICAST_US(sys_nvmem.mask);
|
|
#if DC_PLATFORM == DC_PLATFORM_DREAMCAST
|
|
REICAST_US(sys_nvmem.state);
|
|
#else
|
|
// FIXME
|
|
die("Naomi/Atomiswave libretro savestates are not supported");
|
|
#endif
|
|
REICAST_USA(sys_nvmem.data,sys_nvmem.size);
|
|
|
|
|
|
//this is one-time init, no updates - don't need to serialize
|
|
//extern _vmem_handler area0_handler;
|
|
|
|
REICAST_USA(reply_11,16);
|
|
|
|
REICAST_US(sns_asc);
|
|
REICAST_US(sns_ascq);
|
|
REICAST_US(sns_key);
|
|
|
|
REICAST_US(packet_cmd);
|
|
REICAST_US(set_mode_offset);
|
|
REICAST_US(read_params);
|
|
REICAST_US(packet_cmd);
|
|
REICAST_US(read_buff);
|
|
REICAST_US(pio_buff);
|
|
REICAST_US(set_mode_offset);
|
|
REICAST_US(ata_cmd);
|
|
REICAST_US(cdda);
|
|
REICAST_US(gd_state);
|
|
REICAST_US(gd_disk_type);
|
|
REICAST_US(data_write_mode);
|
|
REICAST_US(DriveSel);
|
|
REICAST_US(Error);
|
|
REICAST_US(IntReason);
|
|
REICAST_US(Features);
|
|
REICAST_US(SecCount);
|
|
REICAST_US(SecNumber);
|
|
REICAST_US(GDStatus);
|
|
REICAST_US(ByteCount);
|
|
REICAST_US(i); //LIBRETRO_S(GDROM_TICK);
|
|
|
|
REICAST_USA(EEPROM,0x100);
|
|
REICAST_US(EEPROM_loaded);
|
|
|
|
|
|
REICAST_US(maple_ddt_pending_reset);
|
|
|
|
mcfg_UnserializeDevices(data, total_size);
|
|
|
|
REICAST_US(FrameCount);
|
|
REICAST_US(pend_rend);
|
|
|
|
|
|
REICAST_USA(YUV_tempdata,512/4);
|
|
REICAST_US(YUV_dest);
|
|
REICAST_US(YUV_blockcount);
|
|
REICAST_US(YUV_x_curr);
|
|
REICAST_US(YUV_y_curr);
|
|
REICAST_US(YUV_x_size);
|
|
REICAST_US(YUV_y_size);
|
|
|
|
bool dumbool;
|
|
REICAST_US(dumbool); //LIBRETRO_S(fog_needs_update);
|
|
REICAST_USA(pvr_regs,pvr_RegSize);
|
|
fog_needs_update = true ;
|
|
|
|
REICAST_US(in_vblank);
|
|
REICAST_US(clc_pvr_scanline);
|
|
REICAST_US(pvr_numscanlines);
|
|
REICAST_US(prv_cur_scanline);
|
|
REICAST_US(vblk_cnt);
|
|
REICAST_US(Line_Cycles);
|
|
REICAST_US(Frame_Cycles);
|
|
REICAST_US(speed_load_mspdf);
|
|
REICAST_US(mips_counter);
|
|
REICAST_US(full_rps);
|
|
|
|
REICAST_USA(ta_type_lut,256);
|
|
REICAST_USA(ta_fsm,2049);
|
|
REICAST_US(ta_fsm_cl);
|
|
|
|
REICAST_US(dumbool); //LIBRETRO_S(pal_needs_update);
|
|
for (int i = 0; i < 4; i++) REICAST_US(j); //LIBRETRO_SA(_pal_rev_256,4);
|
|
for (int i = 0; i < 64; i++) REICAST_US(j); //LIBRETRO_SA(_pal_rev_16,64);
|
|
for (int i = 0; i < 4; i++) REICAST_US(j); //LIBRETRO_SA(pal_rev_256,4);
|
|
for (int i = 0; i < 64; i++) REICAST_US(j); //LIBRETRO_SA(pal_rev_16,64);
|
|
for ( i = 0 ; i < 3 ; i++ )
|
|
{
|
|
u32 buf[65536]; //u32 *ptr = decoded_colors[i] ;
|
|
REICAST_US(buf); //LIBRETRO_SA(ptr,65536);
|
|
}
|
|
|
|
REICAST_US(tileclip_val);
|
|
REICAST_USA(f32_su8_tbl,65536);
|
|
REICAST_USA(FaceBaseColor,4);
|
|
REICAST_USA(FaceOffsColor,4);
|
|
REICAST_US(SFaceBaseColor);
|
|
REICAST_US(SFaceOffsColor);
|
|
|
|
pal_needs_update = true;
|
|
REICAST_US(i); //LIBRETRO_S(palette_index);
|
|
REICAST_US(dumbool); //LIBRETRO_S(KillTex);
|
|
for (int i = 0; i < 1024; i++) REICAST_US(j); //LIBRETRO_SA(palette16_ram,1024);
|
|
for (int i = 0; i < 1024; i++) REICAST_US(j); //LIBRETRO_SA(palette32_ram,1024);
|
|
for (i = 0 ; i < 2 ; i++)
|
|
for (j = 0 ; j < 8 ; j++)
|
|
{
|
|
u32 buf[1024]; //u32 *ptr = detwiddle[i][j] ;
|
|
REICAST_US(buf); //LIBRETRO_SA(ptr,1024);
|
|
}
|
|
REICAST_USA(vram.data, vram.size);
|
|
|
|
REICAST_USA(OnChipRAM.data,OnChipRAM_SIZE);
|
|
|
|
register_unserialize(CCN, data, total_size) ;
|
|
register_unserialize(UBC, data, total_size) ;
|
|
register_unserialize(BSC, data, total_size) ;
|
|
register_unserialize(DMAC, data, total_size) ;
|
|
register_unserialize(CPG, data, total_size) ;
|
|
register_unserialize(RTC, data, total_size) ;
|
|
register_unserialize(INTC, data, total_size) ;
|
|
register_unserialize(TMU, data, total_size) ;
|
|
register_unserialize(SCI, data, total_size) ;
|
|
register_unserialize(SCIF, data, total_size) ;
|
|
|
|
REICAST_USA(mem_b.data, mem_b.size);
|
|
|
|
REICAST_US(IRLPriority);
|
|
REICAST_USA(InterruptEnvId,32);
|
|
REICAST_USA(InterruptBit,32);
|
|
REICAST_USA(InterruptLevelBit,16);
|
|
REICAST_US(interrupt_vpend);
|
|
REICAST_US(interrupt_vmask);
|
|
REICAST_US(decoded_srimask);
|
|
|
|
REICAST_US(i) ;
|
|
if ( i == 0 )
|
|
do_sqw_nommu = &do_sqw_nommu_area_3 ;
|
|
else if ( i == 1 )
|
|
do_sqw_nommu = &do_sqw_nommu_area_3_nonvmem ;
|
|
else if ( i == 2 )
|
|
do_sqw_nommu = (sqw_fp*)&TAWriteSQ ;
|
|
else if ( i == 3 )
|
|
do_sqw_nommu = &do_sqw_nommu_full ;
|
|
|
|
|
|
|
|
REICAST_USA((*p_sh4rcb).sq_buffer,64/8);
|
|
|
|
//store these before unserializing and then restore after
|
|
//void *getptr = &((*p_sh4rcb).cntx.sr.GetFull) ;
|
|
//void *setptr = &((*p_sh4rcb).cntx.sr.SetFull) ;
|
|
REICAST_US((*p_sh4rcb).cntx);
|
|
//(*p_sh4rcb).cntx.sr.GetFull = getptr ;
|
|
//(*p_sh4rcb).cntx.sr.SetFull = setptr ;
|
|
|
|
REICAST_US(old_rm);
|
|
REICAST_US(old_dn);
|
|
|
|
REICAST_US(sh4_sched_ffb);
|
|
REICAST_US(sh4_sched_intr);
|
|
|
|
//extern vector<sched_list> sch_list;
|
|
|
|
REICAST_US(sch_list[aica_schid].tag) ;
|
|
REICAST_US(sch_list[aica_schid].start) ;
|
|
REICAST_US(sch_list[aica_schid].end) ;
|
|
|
|
REICAST_US(sch_list[rtc_schid].tag) ;
|
|
REICAST_US(sch_list[rtc_schid].start) ;
|
|
REICAST_US(sch_list[rtc_schid].end) ;
|
|
|
|
REICAST_US(sch_list[gdrom_schid].tag) ;
|
|
REICAST_US(sch_list[gdrom_schid].start) ;
|
|
REICAST_US(sch_list[gdrom_schid].end) ;
|
|
|
|
REICAST_US(sch_list[maple_schid].tag) ;
|
|
REICAST_US(sch_list[maple_schid].start) ;
|
|
REICAST_US(sch_list[maple_schid].end) ;
|
|
|
|
REICAST_US(sch_list[dma_sched_id].tag) ;
|
|
REICAST_US(sch_list[dma_sched_id].start) ;
|
|
REICAST_US(sch_list[dma_sched_id].end) ;
|
|
|
|
for (int i = 0; i < 3; i++)
|
|
{
|
|
REICAST_US(sch_list[tmu_sched[i]].tag) ;
|
|
REICAST_US(sch_list[tmu_sched[i]].start) ;
|
|
REICAST_US(sch_list[tmu_sched[i]].end) ;
|
|
}
|
|
|
|
REICAST_US(sch_list[render_end_schid].tag) ;
|
|
REICAST_US(sch_list[render_end_schid].start) ;
|
|
REICAST_US(sch_list[render_end_schid].end) ;
|
|
|
|
REICAST_US(sch_list[vblank_schid].tag) ;
|
|
REICAST_US(sch_list[vblank_schid].start) ;
|
|
REICAST_US(sch_list[vblank_schid].end) ;
|
|
|
|
REICAST_US(sch_list[time_sync].tag) ;
|
|
REICAST_US(sch_list[time_sync].start) ;
|
|
REICAST_US(sch_list[time_sync].end) ;
|
|
|
|
#ifdef ENABLE_MODEM
|
|
REICAST_US(sch_list[modem_sched].tag) ;
|
|
REICAST_US(sch_list[modem_sched].start) ;
|
|
REICAST_US(sch_list[modem_sched].end) ;
|
|
#else
|
|
int modem_dummy;
|
|
REICAST_US(modem_dummy);
|
|
REICAST_US(modem_dummy);
|
|
REICAST_US(modem_dummy);
|
|
#endif
|
|
|
|
REICAST_US(SCIF_SCFSR2);
|
|
REICAST_US(SCIF_SCFRDR2);
|
|
REICAST_US(SCIF_SCFDR2);
|
|
|
|
REICAST_US(BSC_PDTRA);
|
|
|
|
REICAST_USA(tmu_shift,3);
|
|
REICAST_USA(tmu_mask,3);
|
|
REICAST_USA(tmu_mask64,3);
|
|
REICAST_USA(old_mode,3);
|
|
REICAST_USA(tmu_ch_base,3);
|
|
REICAST_USA(tmu_ch_base64,3);
|
|
|
|
REICAST_USA(CCN_QACR_TR,2);
|
|
|
|
REICAST_USA(UTLB,64);
|
|
REICAST_USA(ITLB,4);
|
|
#if defined(NO_MMU)
|
|
REICAST_USA(sq_remap,64);
|
|
#else
|
|
REICAST_USA(ITLB_LRU_USE,64);
|
|
REICAST_US(mmu_error_TT);
|
|
#endif
|
|
|
|
REICAST_US(NullDriveDiscType);
|
|
REICAST_USA(q_subchannel,96);
|
|
|
|
REICAST_US(i); // FLASH_SIZE
|
|
REICAST_US(i); // BBSRAM_SIZE
|
|
REICAST_US(i); // BIOS_SIZE
|
|
REICAST_US(i); // RAM_SIZE
|
|
REICAST_US(i); // ARAM_SIZE
|
|
REICAST_US(i); // VRAM_SIZE
|
|
REICAST_US(i); // RAM_MASK
|
|
REICAST_US(i); // ARAM_MASK
|
|
REICAST_US(i); // VRAM_MASK
|
|
|
|
|
|
|
|
REICAST_US(naomi_updates);
|
|
REICAST_US(i); // BoardID
|
|
REICAST_US(GSerialBuffer);
|
|
REICAST_US(BSerialBuffer);
|
|
REICAST_US(GBufPos);
|
|
REICAST_US(BBufPos);
|
|
REICAST_US(GState);
|
|
REICAST_US(BState);
|
|
REICAST_US(GOldClk);
|
|
REICAST_US(BOldClk);
|
|
REICAST_US(BControl);
|
|
REICAST_US(BCmd);
|
|
REICAST_US(BLastCmd);
|
|
REICAST_US(GControl);
|
|
REICAST_US(GCmd);
|
|
REICAST_US(GLastCmd);
|
|
REICAST_US(SerStep);
|
|
REICAST_US(SerStep2);
|
|
REICAST_USA(BSerial,69);
|
|
REICAST_USA(GSerial,69);
|
|
REICAST_US(reg_dimm_3c);
|
|
REICAST_US(reg_dimm_40);
|
|
REICAST_US(reg_dimm_44);
|
|
REICAST_US(reg_dimm_48);
|
|
REICAST_US(reg_dimm_4c);
|
|
REICAST_US(NaomiDataRead);
|
|
|
|
REICAST_US(i); //LIBRETRO_S(cycle_counter);
|
|
#if FEAT_SHREC == DYNAREC_CPP
|
|
REICAST_US(idxnxx);
|
|
#else
|
|
REICAST_US(i);
|
|
#endif
|
|
|
|
REICAST_US(state);
|
|
REICAST_US(div_som_reg1);
|
|
REICAST_US(div_som_reg2);
|
|
REICAST_US(div_som_reg3);
|
|
|
|
//REICAST_USA(CodeCache,CODE_SIZE) ;
|
|
//REICAST_USA(SH4_TCB,CODE_SIZE+4096);
|
|
REICAST_US(LastAddr);
|
|
REICAST_US(LastAddr_min);
|
|
REICAST_USA(block_hash,1024);
|
|
|
|
|
|
REICAST_USA(RegisterWrite,sh4_reg_count);
|
|
REICAST_USA(RegisterRead,sh4_reg_count);
|
|
REICAST_US(fallback_blocks);
|
|
REICAST_US(total_blocks);
|
|
REICAST_US(REMOVED_OPS);
|
|
|
|
REICAST_US(settings.dreamcast.broadcast);
|
|
REICAST_US(settings.dreamcast.cable);
|
|
REICAST_US(settings.dreamcast.region);
|
|
|
|
if (CurrentCartridge != NULL)
|
|
CurrentCartridge->Unserialize(data, total_size);
|
|
|
|
return true ;
|
|
}
|
|
|
|
bool dc_unserialize(void **data, unsigned int *total_size)
|
|
{
|
|
int i = 0;
|
|
int j = 0;
|
|
serialize_version_enum version = V1 ;
|
|
|
|
*total_size = 0 ;
|
|
|
|
REICAST_US(version) ;
|
|
if (version == V5_LIBRETRO)
|
|
return dc_unserialize_libretro(data, total_size);
|
|
if (version != V4)
|
|
{
|
|
fprintf(stderr, "Save State version not supported: %d\n", version);
|
|
return false;
|
|
}
|
|
REICAST_US(aica_interr) ;
|
|
REICAST_US(aica_reg_L) ;
|
|
REICAST_US(e68k_out) ;
|
|
REICAST_US(e68k_reg_L) ;
|
|
REICAST_US(e68k_reg_M) ;
|
|
|
|
REICAST_USA(arm_Reg,RN_ARM_REG_COUNT);
|
|
REICAST_US(armIrqEnable);
|
|
REICAST_US(armFiqEnable);
|
|
REICAST_US(armMode);
|
|
REICAST_US(Arm7Enabled);
|
|
REICAST_USA(cpuBitsSet,256);
|
|
bool dummy;
|
|
REICAST_US(dummy);
|
|
REICAST_US(dummy);
|
|
REICAST_US(dummy);
|
|
|
|
REICAST_US(dsp);
|
|
|
|
for ( i = 0 ; i < 3 ; i++)
|
|
{
|
|
REICAST_US(timers[i].c_step);
|
|
REICAST_US(timers[i].m_step);
|
|
}
|
|
|
|
REICAST_USA(aica_ram.data,aica_ram.size) ;
|
|
REICAST_US(VREG);
|
|
REICAST_US(ARMRST);
|
|
REICAST_US(rtc_EN);
|
|
|
|
REICAST_USA(aica_reg,0x8000);
|
|
|
|
REICAST_USA(volume_lut,16);
|
|
REICAST_USA(tl_lut,256 + 768);
|
|
REICAST_USA(AEG_ATT_SPS,64);
|
|
REICAST_USA(AEG_DSR_SPS,64);
|
|
REICAST_US(pl);
|
|
REICAST_US(pr);
|
|
|
|
channel_unserialize(data, total_size) ;
|
|
|
|
REICAST_USA(cdda_sector,CDDA_SIZE);
|
|
REICAST_US(cdda_index);
|
|
REICAST_USA(mxlr,64);
|
|
REICAST_US(samples_gen);
|
|
|
|
register_unserialize(sb_regs, data, total_size) ;
|
|
REICAST_US(SB_ISTNRM);
|
|
REICAST_US(SB_FFST_rc);
|
|
REICAST_US(SB_FFST);
|
|
|
|
//this is one-time init, no updates - don't need to serialize
|
|
//extern RomChip sys_rom;
|
|
REICAST_US(sys_nvmem.size);
|
|
REICAST_US(sys_nvmem.mask);
|
|
#ifdef FLASH_SIZE
|
|
REICAST_US(sys_nvmem.state);
|
|
#endif
|
|
REICAST_USA(sys_nvmem.data,sys_nvmem.size);
|
|
|
|
|
|
//this is one-time init, no updates - don't need to serialize
|
|
//extern _vmem_handler area0_handler;
|
|
|
|
|
|
|
|
|
|
REICAST_USA(reply_11,16) ;
|
|
|
|
|
|
|
|
REICAST_US(sns_asc);
|
|
REICAST_US(sns_ascq);
|
|
REICAST_US(sns_key);
|
|
|
|
REICAST_US(packet_cmd);
|
|
REICAST_US(set_mode_offset);
|
|
REICAST_US(read_params);
|
|
REICAST_US(packet_cmd);
|
|
REICAST_US(read_buff);
|
|
REICAST_US(pio_buff);
|
|
REICAST_US(set_mode_offset);
|
|
REICAST_US(ata_cmd);
|
|
REICAST_US(cdda);
|
|
REICAST_US(gd_state);
|
|
REICAST_US(gd_disk_type);
|
|
REICAST_US(data_write_mode);
|
|
REICAST_US(DriveSel);
|
|
REICAST_US(Error);
|
|
REICAST_US(IntReason);
|
|
REICAST_US(Features);
|
|
REICAST_US(SecCount);
|
|
REICAST_US(SecNumber);
|
|
REICAST_US(GDStatus);
|
|
REICAST_US(ByteCount);
|
|
|
|
|
|
REICAST_USA(EEPROM,0x100);
|
|
REICAST_US(EEPROM_loaded);
|
|
|
|
|
|
REICAST_US(maple_ddt_pending_reset);
|
|
|
|
mcfg_UnserializeDevices(data, total_size);
|
|
|
|
REICAST_US(FrameCount);
|
|
REICAST_US(pend_rend);
|
|
|
|
|
|
REICAST_USA(YUV_tempdata,512/4);
|
|
REICAST_US(YUV_dest);
|
|
REICAST_US(YUV_blockcount);
|
|
REICAST_US(YUV_x_curr);
|
|
REICAST_US(YUV_y_curr);
|
|
REICAST_US(YUV_x_size);
|
|
REICAST_US(YUV_y_size);
|
|
|
|
REICAST_USA(pvr_regs,pvr_RegSize);
|
|
fog_needs_update = true ;
|
|
|
|
REICAST_US(in_vblank);
|
|
REICAST_US(clc_pvr_scanline);
|
|
REICAST_US(pvr_numscanlines);
|
|
REICAST_US(prv_cur_scanline);
|
|
REICAST_US(vblk_cnt);
|
|
REICAST_US(Line_Cycles);
|
|
REICAST_US(Frame_Cycles);
|
|
REICAST_US(speed_load_mspdf);
|
|
REICAST_US(mips_counter);
|
|
REICAST_US(full_rps);
|
|
REICAST_US(fskip);
|
|
|
|
REICAST_USA(ta_type_lut,256);
|
|
REICAST_USA(ta_fsm,2049);
|
|
REICAST_US(ta_fsm_cl);
|
|
|
|
REICAST_US(tileclip_val);
|
|
REICAST_USA(f32_su8_tbl,65536);
|
|
REICAST_USA(FaceBaseColor,4);
|
|
REICAST_USA(FaceOffsColor,4);
|
|
REICAST_US(SFaceBaseColor);
|
|
REICAST_US(SFaceOffsColor);
|
|
|
|
pal_needs_update = true;
|
|
|
|
REICAST_USA(vram.data, vram.size);
|
|
|
|
REICAST_USA(OnChipRAM.data,OnChipRAM_SIZE);
|
|
|
|
register_unserialize(CCN, data, total_size) ;
|
|
register_unserialize(UBC, data, total_size) ;
|
|
register_unserialize(BSC, data, total_size) ;
|
|
register_unserialize(DMAC, data, total_size) ;
|
|
register_unserialize(CPG, data, total_size) ;
|
|
register_unserialize(RTC, data, total_size) ;
|
|
register_unserialize(INTC, data, total_size) ;
|
|
register_unserialize(TMU, data, total_size) ;
|
|
register_unserialize(SCI, data, total_size) ;
|
|
register_unserialize(SCIF, data, total_size) ;
|
|
|
|
REICAST_USA(mem_b.data, mem_b.size);
|
|
|
|
REICAST_US(IRLPriority);
|
|
REICAST_USA(InterruptEnvId,32);
|
|
REICAST_USA(InterruptBit,32);
|
|
REICAST_USA(InterruptLevelBit,16);
|
|
REICAST_US(interrupt_vpend);
|
|
REICAST_US(interrupt_vmask);
|
|
REICAST_US(decoded_srimask);
|
|
|
|
REICAST_US(i) ;
|
|
if ( i == 0 )
|
|
do_sqw_nommu = &do_sqw_nommu_area_3 ;
|
|
else if ( i == 1 )
|
|
do_sqw_nommu = &do_sqw_nommu_area_3_nonvmem ;
|
|
else if ( i == 2 )
|
|
do_sqw_nommu = (sqw_fp*)&TAWriteSQ ;
|
|
else if ( i == 3 )
|
|
do_sqw_nommu = &do_sqw_nommu_full ;
|
|
|
|
|
|
|
|
REICAST_USA((*p_sh4rcb).sq_buffer,64/8);
|
|
|
|
//store these before unserializing and then restore after
|
|
//void *getptr = &((*p_sh4rcb).cntx.sr.GetFull) ;
|
|
//void *setptr = &((*p_sh4rcb).cntx.sr.SetFull) ;
|
|
REICAST_US((*p_sh4rcb).cntx);
|
|
//(*p_sh4rcb).cntx.sr.GetFull = getptr ;
|
|
//(*p_sh4rcb).cntx.sr.SetFull = setptr ;
|
|
|
|
REICAST_US(old_rm);
|
|
REICAST_US(old_dn);
|
|
|
|
|
|
|
|
|
|
REICAST_US(sh4_sched_ffb);
|
|
REICAST_US(sh4_sched_intr);
|
|
|
|
//extern vector<sched_list> list;
|
|
|
|
REICAST_US(sch_list[aica_schid].tag) ;
|
|
REICAST_US(sch_list[aica_schid].start) ;
|
|
REICAST_US(sch_list[aica_schid].end) ;
|
|
|
|
REICAST_US(sch_list[rtc_schid].tag) ;
|
|
REICAST_US(sch_list[rtc_schid].start) ;
|
|
REICAST_US(sch_list[rtc_schid].end) ;
|
|
|
|
REICAST_US(sch_list[gdrom_schid].tag) ;
|
|
REICAST_US(sch_list[gdrom_schid].start) ;
|
|
REICAST_US(sch_list[gdrom_schid].end) ;
|
|
|
|
REICAST_US(sch_list[maple_schid].tag) ;
|
|
REICAST_US(sch_list[maple_schid].start) ;
|
|
REICAST_US(sch_list[maple_schid].end) ;
|
|
|
|
REICAST_US(sch_list[dma_sched_id].tag) ;
|
|
REICAST_US(sch_list[dma_sched_id].start) ;
|
|
REICAST_US(sch_list[dma_sched_id].end) ;
|
|
|
|
for (int i = 0; i < 3; i++)
|
|
{
|
|
REICAST_US(sch_list[tmu_sched[i]].tag) ;
|
|
REICAST_US(sch_list[tmu_sched[i]].start) ;
|
|
REICAST_US(sch_list[tmu_sched[i]].end) ;
|
|
}
|
|
|
|
REICAST_US(sch_list[render_end_schid].tag) ;
|
|
REICAST_US(sch_list[render_end_schid].start) ;
|
|
REICAST_US(sch_list[render_end_schid].end) ;
|
|
|
|
REICAST_US(sch_list[vblank_schid].tag) ;
|
|
REICAST_US(sch_list[vblank_schid].start) ;
|
|
REICAST_US(sch_list[vblank_schid].end) ;
|
|
|
|
REICAST_US(sch_list[time_sync].tag) ;
|
|
REICAST_US(sch_list[time_sync].start) ;
|
|
REICAST_US(sch_list[time_sync].end) ;
|
|
|
|
#ifdef ENABLE_MODEM
|
|
REICAST_US(sch_list[modem_sched].tag) ;
|
|
REICAST_US(sch_list[modem_sched].start) ;
|
|
REICAST_US(sch_list[modem_sched].end) ;
|
|
#else
|
|
int modem_dummy;
|
|
REICAST_US(modem_dummy);
|
|
REICAST_US(modem_dummy);
|
|
REICAST_US(modem_dummy);
|
|
#endif
|
|
|
|
REICAST_US(SCIF_SCFSR2);
|
|
REICAST_US(SCIF_SCFRDR2);
|
|
REICAST_US(SCIF_SCFDR2);
|
|
|
|
|
|
REICAST_US(BSC_PDTRA);
|
|
|
|
|
|
|
|
|
|
REICAST_USA(tmu_shift,3);
|
|
REICAST_USA(tmu_mask,3);
|
|
REICAST_USA(tmu_mask64,3);
|
|
REICAST_USA(old_mode,3);
|
|
REICAST_USA(tmu_ch_base,3);
|
|
REICAST_USA(tmu_ch_base64,3);
|
|
|
|
|
|
|
|
|
|
REICAST_USA(CCN_QACR_TR,2);
|
|
|
|
|
|
|
|
|
|
REICAST_USA(UTLB,64);
|
|
REICAST_USA(ITLB,4);
|
|
#if defined(NO_MMU)
|
|
REICAST_USA(sq_remap,64);
|
|
#else
|
|
REICAST_USA(ITLB_LRU_USE,64);
|
|
REICAST_US(mmu_error_TT);
|
|
#endif
|
|
|
|
|
|
REICAST_US(NullDriveDiscType);
|
|
REICAST_USA(q_subchannel,96);
|
|
|
|
// FIXME
|
|
// REICAST_US(i); // FLASH_SIZE
|
|
// REICAST_US(i); // BBSRAM_SIZE
|
|
// REICAST_US(i); // BIOS_SIZE
|
|
// REICAST_US(i); // RAM_SIZE
|
|
// REICAST_US(i); // ARAM_SIZE
|
|
// REICAST_US(i); // VRAM_SIZE
|
|
// REICAST_US(i); // RAM_MASK
|
|
// REICAST_US(i); // ARAM_MASK
|
|
// REICAST_US(i); // VRAM_MASK
|
|
|
|
|
|
REICAST_US(naomi_updates);
|
|
REICAST_US(i); // BoardID
|
|
REICAST_US(GSerialBuffer);
|
|
REICAST_US(BSerialBuffer);
|
|
REICAST_US(GBufPos);
|
|
REICAST_US(BBufPos);
|
|
REICAST_US(GState);
|
|
REICAST_US(BState);
|
|
REICAST_US(GOldClk);
|
|
REICAST_US(BOldClk);
|
|
REICAST_US(BControl);
|
|
REICAST_US(BCmd);
|
|
REICAST_US(BLastCmd);
|
|
REICAST_US(GControl);
|
|
REICAST_US(GCmd);
|
|
REICAST_US(GLastCmd);
|
|
REICAST_US(SerStep);
|
|
REICAST_US(SerStep2);
|
|
REICAST_USA(BSerial,69);
|
|
REICAST_USA(GSerial,69);
|
|
REICAST_US(reg_dimm_3c);
|
|
REICAST_US(reg_dimm_40);
|
|
REICAST_US(reg_dimm_44);
|
|
REICAST_US(reg_dimm_48);
|
|
REICAST_US(reg_dimm_4c);
|
|
REICAST_US(NaomiDataRead);
|
|
|
|
#if FEAT_SHREC == DYNAREC_CPP
|
|
REICAST_US(idxnxx);
|
|
#else
|
|
REICAST_US(i);
|
|
#endif
|
|
|
|
REICAST_US(state);
|
|
REICAST_US(div_som_reg1);
|
|
REICAST_US(div_som_reg2);
|
|
REICAST_US(div_som_reg3);
|
|
|
|
//REICAST_USA(CodeCache,CODE_SIZE) ;
|
|
//REICAST_USA(SH4_TCB,CODE_SIZE+4096);
|
|
REICAST_US(LastAddr);
|
|
REICAST_US(LastAddr_min);
|
|
REICAST_USA(block_hash,1024);
|
|
|
|
REICAST_USA(RegisterWrite,sh4_reg_count);
|
|
REICAST_USA(RegisterRead,sh4_reg_count);
|
|
REICAST_US(fallback_blocks);
|
|
REICAST_US(total_blocks);
|
|
REICAST_US(REMOVED_OPS);
|
|
|
|
REICAST_US(i); //REICAST_USA(kcode,4);
|
|
REICAST_US(i);
|
|
REICAST_US(i); //REICAST_USA(rt,4);
|
|
REICAST_US(i); //REICAST_USA(lt,4);
|
|
REICAST_US(i); //REICAST_USA(vks,4);
|
|
REICAST_US(i);
|
|
REICAST_US(i);
|
|
REICAST_US(i);
|
|
REICAST_US(i); //REICAST_USA(joyx,4);
|
|
REICAST_US(i); //REICAST_USA(joyy,4);
|
|
|
|
|
|
REICAST_US(settings.dreamcast.broadcast);
|
|
REICAST_US(settings.dreamcast.cable);
|
|
REICAST_US(settings.dreamcast.region);
|
|
|
|
if (CurrentCartridge != NULL)
|
|
CurrentCartridge->Unserialize(data, total_size);
|
|
|
|
return true ;
|
|
}
|
|
#endif
|