132 lines
4.2 KiB
C
132 lines
4.2 KiB
C
#pragma once
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#include "types.h"
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enum InterruptType
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{
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sh4_int = 0x00000000,
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/*
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sh4_exp = 0x01000000,
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*/
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InterruptTypeMask = 0x7F000000,
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InterruptIntEVNTMask=0x00FFFF00,
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InterruptPIIDMask=0x000000FF,
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};
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#define KMIID(type,ID,PIID) ( (type) | ((ID)<<8) | (PIID))
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enum InterruptID
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{
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//internal interrupts
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//IRL*
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//sh4_IRL_0 = KMIID(sh4_int,0x200,0),-> these are not connected on the Dreamcast
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//sh4_IRL_1 = KMIID(sh4_int,0x220,1),
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//sh4_IRL_2 = KMIID(sh4_int,0x240,2),
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//sh4_IRL_3 = KMIID(sh4_int,0x260,3),
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//sh4_IRL_4 = KMIID(sh4_int,0x280,4),
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//sh4_IRL_5 = KMIID(sh4_int,0x2A0,5),
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//sh4_IRL_6 = KMIID(sh4_int,0x2C0,6),
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//sh4_IRL_7 = KMIID(sh4_int,0x2E0,7),
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//sh4_IRL_8 = KMIID(sh4_int,0x300,8),
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sh4_IRL_9 = KMIID(sh4_int,0x320,0),
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//sh4_IRL_10 = KMIID(sh4_int,0x340,10),-> these are not connected on the Dreamcast
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sh4_IRL_11 = KMIID(sh4_int,0x360,1),
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//sh4_IRL_12 = KMIID(sh4_int,0x380,12),-> these are not connected on the Dreamcast
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sh4_IRL_13 = KMIID(sh4_int,0x3A0,2),
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//sh4_IRL_14 = KMIID(sh4_int,0x3C0,14),-> these are not connected on the Dreamcast
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//sh4_IRL_15 = KMIID(sh4_int,0x340,0), -> no interrupt (masked)
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sh4_HUDI_HUDI = KMIID(sh4_int,0x600,3), /* H-UDI underflow */
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sh4_GPIO_GPIOI = KMIID(sh4_int,0x620,4),
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//DMAC
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sh4_DMAC_DMTE0 = KMIID(sh4_int,0x640,5),
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sh4_DMAC_DMTE1 = KMIID(sh4_int,0x660,6),
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sh4_DMAC_DMTE2 = KMIID(sh4_int,0x680,7),
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sh4_DMAC_DMTE3 = KMIID(sh4_int,0x6A0,8),
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sh4_DMAC_DMAE = KMIID(sh4_int,0x6C0,9),
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//TMU
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sh4_TMU0_TUNI0 = KMIID(sh4_int,0x400,10), /* TMU0 underflow */
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sh4_TMU1_TUNI1 = KMIID(sh4_int,0x420,11), /* TMU1 underflow */
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sh4_TMU2_TUNI2 = KMIID(sh4_int,0x440,12), /* TMU2 underflow */
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sh4_TMU2_TICPI2 = KMIID(sh4_int,0x460,13), /* TMU Compare (not used in the Dreamcast)*/
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//RTC
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sh4_RTC_ATI = KMIID(sh4_int,0x480,14),
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sh4_RTC_PRI = KMIID(sh4_int,0x4A0,15),
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sh4_RTC_CUI = KMIID(sh4_int,0x4C0,16),
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//SCI
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sh4_SCI1_ERI = KMIID(sh4_int,0x4E0,17),
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sh4_SCI1_RXI = KMIID(sh4_int,0x500,18),
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sh4_SCI1_TXI = KMIID(sh4_int,0x520,19),
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sh4_SCI1_TEI = KMIID(sh4_int,0x540,29),
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//SCIF
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sh4_SCIF_ERI = KMIID(sh4_int,0x700,21),
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sh4_SCIF_RXI = KMIID(sh4_int,0x720,22),
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sh4_SCIF_BRI = KMIID(sh4_int,0x740,23),
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sh4_SCIF_TXI = KMIID(sh4_int,0x760,24),
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//WDT
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sh4_WDT_ITI = KMIID(sh4_int,0x560,25),
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//REF
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sh4_REF_RCMI = KMIID(sh4_int,0x580,26),
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sh4_REF_ROVI = KMIID(sh4_int,0x5A0,27),
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/*
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//sh4 exceptions
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sh4_ex_USER_BREAK_BEFORE_INSTRUCTION_EXECUTION = sh4_exp | 0x1e0,
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sh4_ex_INSTRUCTION_ADDRESS_ERROR =sh4_exp | 0x0e0,
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sh4_ex_INSTRUCTION_TLB_MISS =sh4_exp | 0x040,
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sh4_ex_INSTRUCTION_TLB_PROTECTION_VIOLATION = sh4_exp |0x0a0,
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sh4_ex_GENERAL_ILLEGAL_INSTRUCTION = sh4_exp |0x180,
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sh4_ex_SLOT_ILLEGAL_INSTRUCTION = sh4_exp |0x1a0,
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sh4_ex_GENERAL_FPU_DISABLE = sh4_exp |0x800,
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sh4_ex_SLOT_FPU_DISABLE = sh4_exp |0x820,
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sh4_ex_DATA_ADDRESS_ERROR_READ =sh4_exp |0x0e0,
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sh4_ex_DATA_ADDRESS_ERROR_WRITE = sh4_exp | 0x100,
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sh4_ex_DATA_TLB_MISS_READ = sh4_exp | 0x040,
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sh4_ex_DATA_TLB_MISS_WRITE = sh4_exp | 0x060,
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sh4_ex_DATA_TLB_PROTECTION_VIOLATION_READ = sh4_exp | 0x0a0,
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sh4_ex_DATA_TLB_PROTECTION_VIOLATION_WRITE = sh4_exp | 0x0c0,
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sh4_ex_FPU = sh4_exp | 0x120,
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sh4_ex_TRAP = sh4_exp | 0x160,
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sh4_ex_INITAL_PAGE_WRITE = sh4_exp | 0x080,
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*/
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};
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void SetInterruptPend(InterruptID intr);
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void ResetInterruptPend(InterruptID intr);
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inline static void InterruptPend(InterruptID intr, u32 v) {
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if (v == 0)
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ResetInterruptPend(intr);
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else
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SetInterruptPend(intr);
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}
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void SetInterruptMask(InterruptID intr);
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void ResetInterruptMask(InterruptID intr);
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inline static void InterruptMask(InterruptID intr, u32 v)
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{
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if (v == 0)
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ResetInterruptMask(intr);
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else
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SetInterruptMask(intr);
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}
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int UpdateINTC();
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bool Do_Exception(u32 lvl, u32 expEvn, u32 CallVect);
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bool SRdecode();
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void SIIDRebuild();
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//Init/Res/Term
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void interrupts_init();
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void interrupts_reset();
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void interrupts_term(); |