87 lines
1.6 KiB
C++
87 lines
1.6 KiB
C++
#include "arm_mem.h"
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#include "hw/aica/aica_mem.h"
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#define REG_L (0x2D00)
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#define REG_M (0x2D04)
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//Set to true when aica interrupt is pending
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bool aica_interr=false;
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u32 aica_reg_L=0;
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//Set to true when the out of the intc is 1
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bool e68k_out = false;
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u32 e68k_reg_L;
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u32 e68k_reg_M=0; //constant ?
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void update_e68k()
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{
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if (!e68k_out && aica_interr)
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{
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//Set the pending signal
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//Is L register held here too ?
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e68k_out=true;
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e68k_reg_L=aica_reg_L;
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update_armintc();
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}
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}
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void libARM_InterruptChange(u32 bits,u32 L)
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{
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aica_interr=bits!=0;
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if (aica_interr)
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aica_reg_L=L;
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update_e68k();
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}
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void e68k_AcceptInterrupt()
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{
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e68k_out=false;
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update_e68k();
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update_armintc();
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}
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//Reg reads from arm side ..
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template <u32 sz,class T>
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T arm_ReadReg(u32 addr)
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{
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addr&=0x7FFF;
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if (addr==REG_L)
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return e68k_reg_L;
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else if(addr==REG_M)
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return e68k_reg_M; //shouldn't really happen
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else
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return libAICA_ReadReg(addr,sz);
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}
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template <u32 sz,class T>
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void arm_WriteReg(u32 addr,T data)
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{
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addr &= 0x7FFF;
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if (addr == REG_L)
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{
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return; // Shouldn't really happen (read only)
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}
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else if (addr == REG_M)
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{
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//accept interrupts
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if (data & 1)
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e68k_AcceptInterrupt();
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}
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else
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{
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return libAICA_WriteReg(addr, data, sz);
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}
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}
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//00000000~007FFFFF @DRAM_AREA*
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//00800000~008027FF @CHANNEL_DATA
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//00802800~00802FFF @COMMON_DATA
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//00803000~00807FFF @DSP_DATA
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template u8 arm_ReadReg<1,u8>(u32 adr);
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template u16 arm_ReadReg<2,u16>(u32 adr);
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template u32 arm_ReadReg<4,u32>(u32 adr);
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template void arm_WriteReg<1>(u32 adr,u8 data);
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template void arm_WriteReg<2>(u32 adr,u16 data);
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template void arm_WriteReg<4>(u32 adr,u32 data);
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