434 lines
9.4 KiB
C++
434 lines
9.4 KiB
C++
#include "types.h"
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#include <unordered_set>
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#include "hw/sh4/sh4_interpreter.h"
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#include "hw/sh4/sh4_core.h"
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#include "hw/sh4/sh4_interrupts.h"
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#include "hw/sh4/sh4_mem.h"
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#include "hw/sh4/modules/mmu.h"
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#include "cfg/option.h"
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#include <ctime>
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#include <cfloat>
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#include "blockmanager.h"
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#include "ngen.h"
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#include "decoder.h"
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#include <xxhash.h>
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#if FEAT_SHREC != DYNAREC_NONE
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#if defined(_WIN32) || FEAT_SHREC != DYNAREC_JIT || defined(TARGET_IPHONE) || defined(TARGET_ARM_MAC)
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static u8 *SH4_TCB;
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#else
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static u8 SH4_TCB[CODE_SIZE + TEMP_CODE_SIZE + 4096]
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#if defined(__unix__) || defined(__SWITCH__)
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__attribute__((section(".text")));
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#elif defined(__APPLE__)
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__attribute__((section("__TEXT,.text")));
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#else
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#error SH4_TCB ALLOC
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#endif
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#endif
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u8* CodeCache;
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static u8* TempCodeCache;
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ptrdiff_t cc_rx_offset;
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static u32 LastAddr;
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static u32 TempLastAddr;
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static u32 *emit_ptr;
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static u32 *emit_ptr_limit;
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static std::unordered_set<u32> smc_hotspots;
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static sh4_if sh4Interp;
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void* emit_GetCCPtr() { return emit_ptr==0?(void*)&CodeCache[LastAddr]:(void*)emit_ptr; }
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static void clear_temp_cache(bool full)
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{
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//printf("recSh4:Temp Code Cache clear at %08X\n", curr_pc);
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TempLastAddr = 0;
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bm_ResetTempCache(full);
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}
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static void recSh4_ClearCache()
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{
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INFO_LOG(DYNAREC, "recSh4:Dynarec Cache clear at %08X free space %d", next_pc, emit_FreeSpace());
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LastAddr = 0;
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bm_ResetCache();
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smc_hotspots.clear();
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clear_temp_cache(true);
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}
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static void recSh4_Run()
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{
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sh4_int_bCpuRun = true;
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RestoreHostRoundingMode();
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u8 *sh4_dyna_rcb = (u8 *)&Sh4cntx + sizeof(Sh4cntx);
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INFO_LOG(DYNAREC, "cntx // fpcb offset: %td // pc offset: %td // pc %08X", (u8*)&sh4rcb.fpcb - sh4_dyna_rcb, (u8*)&sh4rcb.cntx.pc - sh4_dyna_rcb, sh4rcb.cntx.pc);
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ngen_mainloop(sh4_dyna_rcb);
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sh4_int_bCpuRun = false;
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}
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void emit_Skip(u32 sz)
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{
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if (emit_ptr)
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emit_ptr = (u32*)((u8*)emit_ptr + sz);
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else
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LastAddr += sz;
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}
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u32 emit_FreeSpace()
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{
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if (emit_ptr)
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return (emit_ptr_limit - emit_ptr) * sizeof(u32);
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else
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return CODE_SIZE - LastAddr;
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}
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void AnalyseBlock(RuntimeBlockInfo* blk);
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const char* RuntimeBlockInfo::hash()
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{
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XXH32_hash_t hash = 0;
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u8* ptr = GetMemPtr(this->addr, this->sh4_code_size);
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if (ptr)
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{
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XXH32_state_t *state = XXH32_createState();
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XXH32_reset(state, 7);
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for (u32 i = 0; i < this->guest_opcodes; i++)
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{
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u16 data = ptr[i];
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//Do not count PC relative loads (relocated code)
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if ((data >> 12) == 0xD)
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data = 0xD000;
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XXH32_update(state, &data, 2);
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}
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hash = XXH32_digest(state);
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XXH32_freeState(state);
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}
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static char block_hash[20];
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sprintf(block_hash, ">:1:%02X:%08X", this->guest_opcodes, hash);
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return block_hash;
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}
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bool RuntimeBlockInfo::Setup(u32 rpc,fpscr_t rfpu_cfg)
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{
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staging_runs=addr=lookups=runs=host_code_size=0;
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guest_cycles=guest_opcodes=host_opcodes=0;
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sh4_code_size = 0;
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pBranchBlock=pNextBlock=0;
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code=0;
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has_jcond=false;
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BranchBlock = NullAddress;
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NextBlock = NullAddress;
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BlockType = BET_SCL_Intr;
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has_fpu_op = false;
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temp_block = false;
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vaddr = rpc;
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if (mmu_enabled())
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{
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u32 rv = mmu_instruction_translation(vaddr, addr);
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if (rv != MMU_ERROR_NONE)
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{
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DoMMUException(vaddr, rv, MMU_TT_IREAD);
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return false;
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}
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}
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else
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addr = vaddr;
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fpu_cfg=rfpu_cfg;
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oplist.clear();
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try {
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if (!dec_DecodeBlock(this, SH4_TIMESLICE / 2))
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return false;
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}
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catch (const SH4ThrownException& ex) {
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Do_Exception(rpc, ex.expEvn, ex.callVect);
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return false;
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}
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SetProtectedFlags();
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AnalyseBlock(this);
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return true;
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}
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DynarecCodeEntryPtr rdv_CompilePC(u32 blockcheck_failures)
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{
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u32 pc=next_pc;
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if (emit_FreeSpace()<16*1024 || pc==0x8c0000e0 || pc==0xac010000 || pc==0xac008300)
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recSh4_ClearCache();
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RuntimeBlockInfo* rbi = ngen_AllocateBlock();
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if (!rbi->Setup(pc,fpscr))
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{
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delete rbi;
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return NULL;
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}
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rbi->blockcheck_failures = blockcheck_failures;
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if (smc_hotspots.find(rbi->addr) != smc_hotspots.end())
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{
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if (TEMP_CODE_SIZE - TempLastAddr < 16 * 1024)
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clear_temp_cache(false);
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emit_ptr = (u32 *)(TempCodeCache + TempLastAddr);
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emit_ptr_limit = (u32 *)(TempCodeCache + TEMP_CODE_SIZE);
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rbi->temp_block = true;
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if (rbi->read_only)
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INFO_LOG(DYNAREC, "WARNING: temp block %x (%x) is protected!", rbi->vaddr, rbi->addr);
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}
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bool do_opts = !rbi->temp_block;
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rbi->staging_runs=do_opts?100:-100;
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bool block_check = !rbi->read_only;
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ngen_Compile(rbi, block_check, (pc & 0xFFFFFF) == 0x08300 || (pc & 0xFFFFFF) == 0x10000, false, do_opts);
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verify(rbi->code!=0);
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bm_AddBlock(rbi);
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if (emit_ptr != NULL)
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{
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TempLastAddr = (u8*)emit_ptr - TempCodeCache;
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emit_ptr = NULL;
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emit_ptr_limit = NULL;
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}
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return rbi->code;
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}
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DynarecCodeEntryPtr DYNACALL rdv_FailedToFindBlock_pc()
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{
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return rdv_FailedToFindBlock(next_pc);
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}
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DynarecCodeEntryPtr DYNACALL rdv_FailedToFindBlock(u32 pc)
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{
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//DEBUG_LOG(DYNAREC, "rdv_FailedToFindBlock %08x", pc);
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next_pc=pc;
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DynarecCodeEntryPtr code = rdv_CompilePC(0);
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if (code == NULL)
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code = bm_GetCodeByVAddr(next_pc);
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else
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code = (DynarecCodeEntryPtr)CC_RW2RX(code);
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return code;
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}
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static void ngen_FailedToFindBlock_internal() {
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rdv_FailedToFindBlock(Sh4cntx.pc);
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}
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void (*ngen_FailedToFindBlock)() = &ngen_FailedToFindBlock_internal;
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u32 DYNACALL rdv_DoInterrupts_pc(u32 pc) {
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next_pc = pc;
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UpdateINTC();
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return next_pc;
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}
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u32 DYNACALL rdv_DoInterrupts(void* block_cpde)
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{
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RuntimeBlockInfoPtr rbi = bm_GetBlock(block_cpde);
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return rdv_DoInterrupts_pc(rbi->vaddr);
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}
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// addr must be the physical address of the start of the block
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DynarecCodeEntryPtr DYNACALL rdv_BlockCheckFail(u32 addr)
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{
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DEBUG_LOG(DYNAREC, "rdv_BlockCheckFail @ %08x", addr);
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u32 blockcheck_failures = 0;
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if (mmu_enabled())
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{
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RuntimeBlockInfoPtr block = bm_GetBlock(addr);
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blockcheck_failures = block->blockcheck_failures + 1;
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if (blockcheck_failures > 5)
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{
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bool inserted = smc_hotspots.insert(addr).second;
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if (inserted)
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DEBUG_LOG(DYNAREC, "rdv_BlockCheckFail SMC hotspot @ %08x fails %d", addr, blockcheck_failures);
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}
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bm_DiscardBlock(block.get());
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}
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else
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{
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next_pc = addr;
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recSh4_ClearCache();
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}
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return (DynarecCodeEntryPtr)CC_RW2RX(rdv_CompilePC(blockcheck_failures));
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}
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DynarecCodeEntryPtr rdv_FindOrCompile()
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{
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DynarecCodeEntryPtr rv = bm_GetCodeByVAddr(next_pc); // Returns exec addr
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if (rv == ngen_FailedToFindBlock)
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rv = (DynarecCodeEntryPtr)CC_RW2RX(rdv_CompilePC(0)); // Returns rw addr
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return rv;
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}
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void* DYNACALL rdv_LinkBlock(u8* code,u32 dpc)
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{
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// code is the RX addr to return after, however bm_GetBlock returns RW
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//DEBUG_LOG(DYNAREC, "rdv_LinkBlock %p pc %08x", code, dpc);
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RuntimeBlockInfoPtr rbi = bm_GetBlock(code);
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bool stale_block = false;
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if (!rbi)
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{
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stale_block = true;
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rbi = bm_GetStaleBlock(code);
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}
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verify(rbi != NULL);
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u32 bcls = BET_GET_CLS(rbi->BlockType);
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if (bcls == BET_CLS_Static)
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{
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if (rbi->BlockType == BET_StaticIntr)
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next_pc = rbi->NextBlock;
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else
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next_pc = rbi->BranchBlock;
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}
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else if (bcls == BET_CLS_Dynamic)
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{
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next_pc = dpc;
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}
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else if (bcls == BET_CLS_COND)
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{
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if (dpc)
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next_pc = rbi->BranchBlock;
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else
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next_pc = rbi->NextBlock;
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}
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DynarecCodeEntryPtr rv = rdv_FindOrCompile(); // Returns rx ptr
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if (!mmu_enabled() && !stale_block)
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{
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if (bcls == BET_CLS_Dynamic)
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{
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verify(rbi->relink_data == 0 || rbi->pBranchBlock == NULL);
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if (rbi->pBranchBlock != NULL)
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{
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rbi->pBranchBlock->RemRef(rbi);
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rbi->pBranchBlock = NULL;
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rbi->relink_data = 1;
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}
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else if (rbi->relink_data == 0)
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{
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rbi->pBranchBlock = bm_GetBlock(next_pc).get();
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rbi->pBranchBlock->AddRef(rbi);
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}
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}
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else
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{
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RuntimeBlockInfo* nxt = bm_GetBlock(next_pc).get();
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if (rbi->BranchBlock == next_pc)
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rbi->pBranchBlock = nxt;
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if (rbi->NextBlock == next_pc)
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rbi->pNextBlock = nxt;
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nxt->AddRef(rbi);
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}
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u32 ncs = rbi->relink_offset + rbi->Relink();
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verify(rbi->host_code_size >= ncs);
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rbi->host_code_size = ncs;
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}
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else
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{
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INFO_LOG(DYNAREC, "null RBI: from %08X to %08X -- unlinked stale block -- code %p next %p", rbi->vaddr, next_pc, code, rv);
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}
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return (void*)rv;
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}
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static void recSh4_Stop()
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{
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sh4Interp.Stop();
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}
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static void recSh4_Step()
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{
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sh4Interp.Step();
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}
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static void recSh4_Reset(bool hard)
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{
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sh4Interp.Reset(hard);
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recSh4_ClearCache();
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if (hard)
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bm_Reset();
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}
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static void recSh4_Init()
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{
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INFO_LOG(DYNAREC, "recSh4 Init");
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Get_Sh4Interpreter(&sh4Interp);
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sh4Interp.Init();
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bm_Init();
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if (_nvmem_enabled())
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verify(mem_b.data == ((u8*)p_sh4rcb->sq_buffer + 512 + 0x0C000000));
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// Prepare some pointer to the pre-allocated code cache:
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void *candidate_ptr = (void*)(((unat)SH4_TCB + 4095) & ~4095);
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// Call the platform-specific magic to make the pages RWX
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CodeCache = NULL;
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#ifdef FEAT_NO_RWX_PAGES
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bool rc = vmem_platform_prepare_jit_block(candidate_ptr, CODE_SIZE + TEMP_CODE_SIZE, (void**)&CodeCache, &cc_rx_offset);
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#else
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bool rc = vmem_platform_prepare_jit_block(candidate_ptr, CODE_SIZE + TEMP_CODE_SIZE, (void**)&CodeCache);
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#endif
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verify(rc);
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// Ensure the pointer returned is non-null
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verify(CodeCache != NULL);
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TempCodeCache = CodeCache + CODE_SIZE;
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ngen_init();
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bm_ResetCache();
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}
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static void recSh4_Term()
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{
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INFO_LOG(DYNAREC, "recSh4 Term");
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bm_Term();
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sh4Interp.Term();
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}
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static bool recSh4_IsCpuRunning()
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{
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return sh4Interp.IsCpuRunning();
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}
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void Get_Sh4Recompiler(sh4_if* cpu)
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{
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cpu->Run = recSh4_Run;
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cpu->Stop = recSh4_Stop;
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cpu->Step = recSh4_Step;
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cpu->Reset = recSh4_Reset;
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cpu->Init = recSh4_Init;
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cpu->Term = recSh4_Term;
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cpu->IsCpuRunning = recSh4_IsCpuRunning;
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cpu->ResetCache = recSh4_ClearCache;
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}
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#endif // FEAT_SHREC != DYNAREC_NONE
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