697 lines
10 KiB
C
697 lines
10 KiB
C
//structs were getting tooo many , so i moved em here !
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#pragma once
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//bits that affect drawing (for caching params)
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#define PCW_DRAW_MASK (0x000000CC)
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#pragma pack(push, 1) // n = 1
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// Global Param/misc structs
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//4B
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union PCW
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{
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struct
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{
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//Obj Control //affects drawing ?
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u32 UV_16bit : 1; //0
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u32 Gouraud : 1; //0
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u32 Offset : 1; //1
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u32 Texture : 1; //1
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u32 Col_Type : 2; //00
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u32 Volume : 1; //1
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u32 Shadow : 1; //1
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u32 Reserved : 8; //0000 0000
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// Group Control
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u32 User_Clip : 2;
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u32 Strip_Len : 2;
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u32 Res_2 : 3;
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u32 Group_En : 1;
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// Para Control
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u32 ListType : 3;
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u32 Res_1 : 1;
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u32 EndOfStrip : 1;
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u32 ParaType : 3;
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};
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u8 obj_ctrl;
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struct
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{
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u32 padin : 8;
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u32 S6X : 1; //set by TA preprocessing if sz64
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u32 padin2 : 19;
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u32 PTEOS : 4;
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};
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u32 full;
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};
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//// ISP/TSP Instruction Word
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union ISP_TSP
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{
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struct
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{
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u32 Reserved : 20;
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u32 DCalcCtrl : 1;
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u32 CacheBypass : 1;
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u32 UV_16b : 1; //In TA they are replaced
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u32 Gouraud : 1; //by the ones on PCW
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u32 Offset : 1; //
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u32 Texture : 1; // -- up to here --
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u32 ZWriteDis : 1;
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u32 CullMode : 2;
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u32 DepthMode : 3;
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};
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u32 full;
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};
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union ISP_Modvol
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{
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struct
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{
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u32 id : 26;
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u32 VolumeLast : 1;
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u32 CullMode : 2;
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u32 DepthMode : 3;
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};
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u32 full;
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};
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//// END ISP/TSP Instruction Word
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//// TSP Instruction Word
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union TSP
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{
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struct
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{
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u32 TexV : 3;
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u32 TexU : 3;
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u32 ShadInstr : 2;
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u32 MipMapD : 4;
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u32 SupSample : 1;
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u32 FilterMode : 2;
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u32 ClampV : 1;
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u32 ClampU : 1;
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u32 FlipV : 1;
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u32 FlipU : 1;
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u32 IgnoreTexA : 1;
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u32 UseAlpha : 1;
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u32 ColorClamp : 1;
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u32 FogCtrl : 2;
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u32 DstSelect : 1; // Secondary Accum
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u32 SrcSelect : 1; // Primary Accum
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u32 DstInstr : 3;
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u32 SrcInstr : 3;
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};
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u32 full;
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} ;
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//// END TSP Instruction Word
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/// Texture Control Word
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union TCW
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{
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struct
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{
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u32 TexAddr :21;
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u32 Reserved : 4;
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u32 StrideSel : 1;
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u32 ScanOrder : 1;
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u32 PixelFmt : 3;
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u32 VQ_Comp : 1;
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u32 MipMapped : 1;
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} ;
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struct
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{
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u32 pading_0 :21;
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u32 PalSelect : 6;
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} ;
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u32 full;
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};
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/// END Texture Control Word
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//32B
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struct Ta_Dma
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{
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//0
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//Parameter Control Word
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PCW pcw;
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//4
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union
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{
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u8 data_8[32-4];
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u32 data_32[8-1];
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};
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};
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//Poly Param types :/
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/*
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Polygon Type 0(Packed/Floating Color)
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0x00 Parameter Control Word
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0x04 ISP/TSP Instruction Word
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0x08 TSP Instruction Word
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0x0C Texture Control Word
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0x10 (ignored)
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0x14 (ignored)
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0x18 Data Size for Sort DMA
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0x1C Next Address for Sort DMA
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*/
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//32B
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struct TA_PolyParam0
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{
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PCW pcw;
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ISP_TSP isp;
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TSP tsp;
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TCW tcw;
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u32 ign1;
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u32 ign2;
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//for sort dma
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u32 SDMA_SIZE;
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u32 SDMA_ADDR;
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};
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/*
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Polygon Type 1(Intensity, no Offset Color)
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0x00 Parameter Control Word
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0x04 ISP/TSP Instruction Word
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0x08 TSP Instruction Word
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0x0C Texture Control Word
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0x10 Face Color Alpha
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0x14 Face Color R
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0x18 Face Color G
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0x1C Face Color B
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*/
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//32B
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struct TA_PolyParam1
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{
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PCW pcw;
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ISP_TSP isp;
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TSP tsp;
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TCW tcw;
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f32 FaceColorA;
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f32 FaceColorR;
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f32 FaceColorG;
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f32 FaceColorB;
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};
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/*
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Polygon Type 2(Intensity, use Offset Color)
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0x00 Parameter Control Word
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0x04 ISP/TSP Instruction Word
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0x08 TSP Instruction Word
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0x0C Texture Control Word
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0x10 (ignored)
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0x14 (ignored)
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0x18 Data Size for Sort DMA
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0x1C Next Address for Sort DMA
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0x20 Face Color Alpha
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0x24 Face Color R
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0x28 Face Color G
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0x2C Face Color B
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0x30 Face Offset Color Alpha
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0x34 Face Offset Color R
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0x38 Face Offset Color G
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0x3C Face Offset Color B
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*/
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//32B
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struct TA_PolyParam2A
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{
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PCW pcw;
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ISP_TSP isp;
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TSP tsp;
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TCW tcw;
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u32 ign1;
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u32 ign2;
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//for sort dma
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u32 SDMA_SIZE;
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u32 SDMA_ADDR;
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};
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//32B
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struct TA_PolyParam2B
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{
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//Face color
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f32 FaceColorA, FaceColorR,FaceColorG, FaceColorB;
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//Offset color :)
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f32 FaceOffsetA, FaceOffsetR, FaceOffsetG, FaceOffsetB;
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};
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/*
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Polygon Type 3(Packed Color, with Two Volumes)
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0x00 Parameter Control Word
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0x04 ISP/TSP Instruction Word
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0x08 TSP Instruction Word 0
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0x0C Texture Control Word 0
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0x10 TSP Instruction Word 1
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0x14 Texture Control Word 1
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0x18 Data Size for Sort DMA
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0x1C Next Address for Sort DMA
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*/
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//32B
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struct TA_PolyParam3
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{
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PCW pcw;
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ISP_TSP isp;
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//for 1st volume
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TSP tsp;
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TCW tcw;
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//for 2nd volume format
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TSP tsp1;
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TCW tcw1;
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//for sort dma
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u32 SDMA_SIZE;
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u32 SDMA_ADDR;
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};
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/*
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Polygon Type 4(Intensity, with Two Volumes)
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0x00 Parameter Control Word
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0x04 ISP/TSP Instruction Word
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0x08 TSP Instruction Word 0
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0x0C Texture Control Word 0
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0x10 TSP Instruction Word 1
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0x14 Texture Control Word 1
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0x18 Data Size for Sort DMA
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0x1C Next Address for Sort DMA
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0x20 Face Color Alpha 0
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0x24 Face Color R 0
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0x28 Face Color G 0
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0x2C Face Color B 0
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0x30 Face Color Alpha 1
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0x34 Face Color R 1
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0x38 Face Color G 1
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0x3C Face Color B 1
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*/
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//32B
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struct TA_PolyParam4A
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{
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PCW pcw;
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ISP_TSP isp;
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//for 1st volume
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TSP tsp;
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TCW tcw;
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//for 2nd volume format
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TSP tsp1;
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TCW tcw1;
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//for sort dma
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u32 SDMA_SIZE;
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u32 SDMA_ADDR;
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};
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//32B
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struct TA_PolyParam4B
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{
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//Face color 0
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f32 FaceColor0A, FaceColor0R,FaceColor0G, FaceColor0B;
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//Face color 1
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f32 FaceColor1A, FaceColor1R, FaceColor1G, FaceColor1B;
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};
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///Mod vol param types
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struct TA_ModVolParam
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{
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PCW pcw;
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ISP_TSP isp;
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u32 ign[8-2];
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};
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//Sprite
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struct TA_SpriteParam
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{
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PCW pcw;
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ISP_TSP isp;
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TSP tsp;
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TCW tcw;
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u32 BaseCol;
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u32 OffsCol;
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//for sort DMA
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u32 SDMA_SIZE;
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u32 SDMA_ADDR;
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};
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// Vertex Param Structs
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//28B
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struct TA_Vertex0 // (Non-Textured, Packed Color)
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{
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f32 xyz[3];
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u32 ignore_1;
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u32 ignore_2;
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u32 BaseCol;
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u32 ignore_3;
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};
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//28B
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struct TA_Vertex1 // (Non-Textured, Floating Color)
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{
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f32 xyz[3];
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f32 BaseA, BaseR,
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BaseG, BaseB;
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};
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//28B
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struct TA_Vertex2 // (Non-Textured, Intensity)
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{
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f32 xyz[3];
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u32 ignore_1;
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u32 ignore_2;
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f32 BaseInt;
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u32 ignore_3;
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};
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//28B
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struct TA_Vertex3 // (Packed Color)
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{
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f32 xyz[3];
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f32 u,v;
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u32 BaseCol;
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u32 OffsCol;
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};
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//28B
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struct TA_Vertex4 // (Packed Color, 16bit UV)
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{
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f32 xyz[3];
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u16 v,u; //note the opposite order here !
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u32 ignore_1;
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u32 BaseCol;
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u32 OffsCol;
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};
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//28B
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struct TA_Vertex5A // (Floating Color)
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{
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f32 xyz[3];
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f32 u,v;
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u32 ignore_1;
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u32 ignore_2;
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};
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//32B
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struct TA_Vertex5B
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{
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f32 BaseA, BaseR,
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BaseG, BaseB;
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f32 OffsA, OffsR,
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OffsG, OffsB;
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};
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//28B
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struct TA_Vertex6A // (Floating Color, 16bit UV)
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{
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f32 xyz[3];
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u16 v,u; //note the opposite order here !
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u32 ignore_1;
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u32 ignore_2;
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u32 ignore_3;
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};
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//32B
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struct TA_Vertex6B
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{
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f32 BaseA, BaseR,
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BaseG, BaseB;
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f32 OffsA, OffsR,
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OffsG, OffsB;
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};
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//28B
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struct TA_Vertex7 // (Intensity)
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{
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f32 xyz[3];
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f32 u,v;
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f32 BaseInt;
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f32 OffsInt;
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};
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//28B
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struct TA_Vertex8 // (Intensity, 16bit UV)
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{
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f32 xyz[3];
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u16 v,u; //note the opposite order here !
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u32 ignore_1;
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f32 BaseInt;
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f32 OffsInt;
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};
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//28B
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struct TA_Vertex9 // (Non-Textured, Packed Color, with Two Volumes)
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{
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f32 xyz[3];
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u32 BaseCol0;
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u32 BaseCol1;
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u32 ignore_1;
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u32 ignore_2;
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};
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//28B
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struct TA_Vertex10 // (Non-Textured, Intensity, with Two Volumes)
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{
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f32 xyz[3];
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f32 BaseInt0;
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f32 BaseInt1;
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u32 ignore_1;
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u32 ignore_2;
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};
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//28B
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struct TA_Vertex11A // (Textured, Packed Color, with Two Volumes)
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{
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f32 xyz[3];
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f32 u0,v0;
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u32 BaseCol0, OffsCol0;
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};
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//32B
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struct TA_Vertex11B
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{
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f32 u1,v1;
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u32 BaseCol1, OffsCol1;
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u32 ignore_1, ignore_2;
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u32 ignore_3, ignore_4;
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};
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//28B
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struct TA_Vertex12A // (Textured, Packed Color, 16bit UV, with Two Volumes)
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{
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f32 xyz[3];
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u16 v0,u0; //note the opposite order here !
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u32 ignore_1;
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u32 BaseCol0, OffsCol0;
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};
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//32B
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struct TA_Vertex12B
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{
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u16 v1,u1; //note the opposite order here !
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u32 ignore_2;
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u32 BaseCol1, OffsCol1;
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u32 ignore_3, ignore_4;
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u32 ignore_5, ignore_6;
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};
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//28B
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struct TA_Vertex13A // (Textured, Intensity, with Two Volumes)
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{
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f32 xyz[3];
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f32 u0,v0;
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f32 BaseInt0, OffsInt0;
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};
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//32B
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struct TA_Vertex13B
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{
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f32 u1,v1;
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f32 BaseInt1, OffsInt1;
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u32 ignore_1, ignore_2;
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u32 ignore_3, ignore_4;
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};
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//28B
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struct TA_Vertex14A // (Textured, Intensity, 16bit UV, with Two Volumes)
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{
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f32 xyz[3];
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u16 v0,u0; //note the opposite order here !
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u32 ignore_1;
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f32 BaseInt0, OffsInt0;
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};
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//32B
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struct TA_Vertex14B
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{
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u16 v1,u1; //note the opposite order here !
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u32 ignore_2;
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f32 BaseInt1, OffsInt1;
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u32 ignore_3, ignore_4;
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u32 ignore_5, ignore_6;
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};
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//28B
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struct TA_Sprite0A // Line ?
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{
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f32 x0,y0,z0;
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f32 x1,y1,z1;
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f32 x2;
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};
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//32B
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struct TA_Sprite0B // Line ?
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{
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f32 y2,z2;
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f32 x3,y3;
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u32 ignore_1, ignore_2;
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u32 ignore_3, ignore_4;
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};
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//28B
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struct TA_Sprite1A
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{
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f32 x0,y0,z0;
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f32 x1,y1,z1;
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f32 x2;
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};
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//32B
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struct TA_Sprite1B
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{
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f32 y2,z2;
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f32 x3,y3;
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u32 ignore_1;
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u16 v0; u16 u0;
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u16 v1; u16 u1;
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u16 v2; u16 u2;
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};
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//28B
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struct TA_ModVolA
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{
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PCW pcw;
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f32 x0,y0,z0;
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f32 x1,y1,z1;
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f32 x2; //3+3+1=7*4=28
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};
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//32B
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struct TA_ModVolB
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{
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f32 y2,z2; //2
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u32 ignore[6]; //8
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};
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//all together , and pcw ;)
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struct TA_VertexParam
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{
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union
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{
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struct
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{
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PCW pcw;
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union
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{
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u8 Raw[64-4];
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TA_Vertex0 vtx0;
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TA_Vertex1 vtx1;
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TA_Vertex2 vtx2;
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TA_Vertex3 vtx3;
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TA_Vertex4 vtx4;
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struct
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{
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TA_Vertex5A vtx5A;
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TA_Vertex5B vtx5B;
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};
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struct
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{
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TA_Vertex6A vtx6A;
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TA_Vertex6B vtx6B;
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};
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TA_Vertex7 vtx7;
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TA_Vertex8 vtx8;
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TA_Vertex9 vtx9;
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|
TA_Vertex10 vtx10;
|
|
|
|
|
|
|
|
struct
|
|
{
|
|
TA_Vertex11A vtx11A;
|
|
TA_Vertex11B vtx11B;
|
|
};
|
|
|
|
|
|
struct
|
|
{
|
|
TA_Vertex12A vtx12A;
|
|
TA_Vertex12B vtx12B;
|
|
};
|
|
|
|
struct
|
|
{
|
|
TA_Vertex13A vtx13A;
|
|
TA_Vertex13B vtx13B;
|
|
};
|
|
|
|
struct
|
|
{
|
|
TA_Vertex14A vtx14A;
|
|
TA_Vertex14B vtx14B;
|
|
};
|
|
|
|
struct
|
|
{
|
|
TA_Sprite0A spr0A;
|
|
TA_Sprite0B spr0B;
|
|
};
|
|
|
|
struct
|
|
{
|
|
TA_Sprite1A spr1A;
|
|
TA_Sprite1B spr1B;
|
|
};
|
|
};
|
|
|
|
};
|
|
struct
|
|
{
|
|
TA_ModVolA mvolA;
|
|
TA_ModVolB mvolB;
|
|
};
|
|
};
|
|
};
|
|
|
|
#pragma pack(pop)
|
|
|
|
|
|
const u32 ListType_Opaque=0;
|
|
const u32 ListType_Opaque_Modifier_Volume=1;
|
|
const u32 ListType_Translucent =2;
|
|
const u32 ListType_Translucent_Modifier_Volume=3;
|
|
const u32 ListType_Punch_Through=4;
|
|
#define IsModVolList(list) (((list)&1)!=0)
|
|
|
|
|
|
//Control Parameter
|
|
const u32 ParamType_End_Of_List=0;
|
|
const u32 ParamType_User_Tile_Clip=1;
|
|
const u32 ParamType_Object_List_Set=2;
|
|
|
|
//Global Parameter
|
|
const u32 ParamType_Polygon_or_Modifier_Volume=4;
|
|
const u32 ParamType_Sprite=5;
|
|
|
|
//Vertex , Sprite or ModVolume Parameter
|
|
const u32 ParamType_Vertex_Parameter=7;
|
|
|
|
//Reserved
|
|
const u32 ParamType_Reserved_1=3;
|
|
const u32 ParamType_Reserved_2=6; |