835 lines
18 KiB
C++
835 lines
18 KiB
C++
/*
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Copyright 2021 flyinghead
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This file is part of Flycast.
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Flycast is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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Flycast is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Flycast. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "build.h"
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#if FEAT_SHREC == DYNAREC_JIT && HOST_CPU == CPU_X86
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#include "rec_x86.h"
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#include "hw/sh4/sh4_core.h"
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#include "hw/sh4/sh4_interpreter.h"
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#include "hw/sh4/sh4_interrupts.h"
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#include "hw/sh4/sh4_mem.h"
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#include "hw/mem/_vmem.h"
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#include "oslib/oslib.h"
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static int cycle_counter;
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static void (*mainloop)();
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static void (*ngen_FailedToFindBlock_)();
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static void (*intc_sched)();
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static void (*no_update)();
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static void (*ngen_LinkBlock_cond_Next_stub)();
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static void (*ngen_LinkBlock_cond_Branch_stub)();
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static void (*ngen_LinkBlock_Generic_stub)();
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static void (*ngen_blockcheckfail)();
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static X86Compiler* compiler;
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static Xbyak::Operand::Code alloc_regs[] { Xbyak::Operand::EBX, Xbyak::Operand::EBP, Xbyak::Operand::ESI, Xbyak::Operand::EDI, (Xbyak::Operand::Code)-1 };
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static s8 alloc_fregs[] = { 7, 6, 5, 4, -1 };
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alignas(16) static f32 thaw_regs[4];
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UnwindInfo unwinder;
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void X86RegAlloc::doAlloc(RuntimeBlockInfo* block)
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{
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RegAlloc::DoAlloc(block, alloc_regs, alloc_fregs);
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}
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void X86RegAlloc::Preload(u32 reg, Xbyak::Operand::Code nreg)
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{
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compiler->regPreload(reg, nreg);
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}
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void X86RegAlloc::Writeback(u32 reg, Xbyak::Operand::Code nreg)
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{
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compiler->regWriteback(reg, nreg);
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}
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void X86RegAlloc::Preload_FPU(u32 reg, s8 nreg)
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{
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compiler->regPreload_FPU(reg, nreg);
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}
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void X86RegAlloc::Writeback_FPU(u32 reg, s8 nreg)
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{
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compiler->regWriteback_FPU(reg, nreg);
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}
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struct DynaRBI : RuntimeBlockInfo
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{
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u32 Relink() override;
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void Relocate(void* dst) override {
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verify(false);
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}
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};
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RuntimeBlockInfo* ngen_AllocateBlock()
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{
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return new DynaRBI();
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}
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void X86Compiler::alignStack(int amount)
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{
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#ifndef _WIN32
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if (amount > 0)
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add(esp, amount);
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else
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sub(esp, -amount);
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unwinder.allocStackPtr(getCurr(), -amount);
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#endif
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}
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void X86Compiler::compile(RuntimeBlockInfo* block, bool force_checks, bool optimise)
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{
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DEBUG_LOG(DYNAREC, "X86 compiling %08x to %p", block->addr, emit_GetCCPtr());
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current_opid = -1;
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unwinder.start((void *)getCurr());
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unwinder.pushReg(0, Xbyak::Operand::ESI);
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unwinder.pushReg(0, Xbyak::Operand::EDI);
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unwinder.pushReg(0, Xbyak::Operand::EBP);
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unwinder.pushReg(0, Xbyak::Operand::EBX);
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#ifndef _WIN32
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// 16-byte alignment
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unwinder.allocStack(0, 12);
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#endif
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unwinder.endProlog(0);
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checkBlock(force_checks, block);
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sub(dword[&cycle_counter], block->guest_cycles);
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Xbyak::Label no_up;
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jns(no_up);
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call((const void *)intc_sched);
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L(no_up);
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regalloc.doAlloc(block);
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for (current_opid = 0; current_opid < block->oplist.size(); current_opid++)
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{
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shil_opcode& op = block->oplist[current_opid];
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regalloc.OpBegin(&op, current_opid);
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genOpcode(block, optimise, op);
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regalloc.OpEnd(&op);
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}
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regalloc.Cleanup();
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current_opid = -1;
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block->relink_offset = getCurr() - getCode();
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block->relink_data = 0;
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relinkBlock(block);
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block->code = (DynarecCodeEntryPtr)getCode();
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block->host_code_size = getSize();
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size_t unwindSize = unwinder.end(getSize());
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setSize(getSize() + unwindSize);
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emit_Skip(getSize());
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}
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u32 X86Compiler::relinkBlock(RuntimeBlockInfo* block)
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{
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const u8 *startPosition = getCurr();
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#define BLOCK_LINKING
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#ifndef BLOCK_LINKING
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switch (block->BlockType) {
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case BET_StaticJump:
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case BET_StaticCall:
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//next_pc = block->BranchBlock;
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mov(ecx, block->BranchBlock);
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break;
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case BET_Cond_0:
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case BET_Cond_1:
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{
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//next_pc = next_pc_value;
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//if (*jdyn == 0)
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//next_pc = branch_pc_value;
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mov(ecx, block->NextBlock);
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cmp(dword[GetRegPtr(block->has_jcond ? reg_pc_dyn : reg_sr_T)], (u32)block->BlockType & 1);
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Xbyak::Label branch_not_taken;
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jne(branch_not_taken, T_SHORT);
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mov(ecx, block->BranchBlock);
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L(branch_not_taken);
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}
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break;
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case BET_DynamicJump:
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case BET_DynamicCall:
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case BET_DynamicRet:
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//next_pc = *jdyn;
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mov(ecx, dword[GetRegPtr(reg_pc_dyn)]);
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break;
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case BET_DynamicIntr:
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case BET_StaticIntr:
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if (block->BlockType == BET_DynamicIntr)
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{
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//next_pc = *jdyn;
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mov(ecx, dword[GetRegPtr(reg_pc_dyn)]);
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mov(dword[&next_pc], ecx);
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}
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else
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{
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//next_pc = next_pc_value;
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mov(dword[&next_pc], block->NextBlock);
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}
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call(UpdateINTC);
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mov(ecx, dword[&next_pc]);
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break;
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default:
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die("Invalid block end type");
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}
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jmp((const void *)no_update);
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#else
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switch(block->BlockType)
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{
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case BET_Cond_0:
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case BET_Cond_1:
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{
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cmp(dword[GetRegPtr(block->has_jcond ? reg_pc_dyn : reg_sr_T)], (u32)block->BlockType & 1);
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Xbyak::Label noBranch;
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jne(noBranch);
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{
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//branch block
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if (block->pBranchBlock)
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jmp((const void *)block->pBranchBlock->code, T_NEAR);
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else
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call(ngen_LinkBlock_cond_Branch_stub);
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}
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L(noBranch);
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{
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//no branch block
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if (block->pNextBlock)
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jmp((const void *)block->pNextBlock->code, T_NEAR);
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else
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call(ngen_LinkBlock_cond_Next_stub);
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}
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}
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break;
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case BET_DynamicRet:
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case BET_DynamicCall:
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case BET_DynamicJump:
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mov(ecx, dword[GetRegPtr(reg_pc_dyn)]);
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jmp((const void *)no_update);
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break;
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case BET_StaticCall:
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case BET_StaticJump:
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if (block->pBranchBlock)
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jmp((const void *)block->pBranchBlock->code, T_NEAR);
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else
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call(ngen_LinkBlock_Generic_stub);
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break;
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case BET_StaticIntr:
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case BET_DynamicIntr:
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if (block->BlockType == BET_StaticIntr)
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{
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mov(dword[&next_pc], block->NextBlock);
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}
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else
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{
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mov(eax, dword[GetRegPtr(reg_pc_dyn)]);
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mov(dword[&next_pc], eax);
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}
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call(UpdateINTC);
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mov(ecx, dword[&next_pc]);
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jmp((const void *)no_update);
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break;
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default:
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die("Invalid block end type");
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}
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#endif
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ready();
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return getCurr() - startPosition;
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}
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u32 DynaRBI::Relink()
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{
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X86Compiler *compiler = new X86Compiler((u8*)code + relink_offset);
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u32 codeSize = compiler->relinkBlock(this);
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delete compiler;
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return codeSize;
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}
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void X86Compiler::ngen_CC_param(const shil_opcode& op, const shil_param& param, CanonicalParamType tp)
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{
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switch (tp)
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{
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//push the contents
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case CPT_u32:
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case CPT_f32:
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if (param.is_reg())
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{
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if (regalloc.IsAllocg(param))
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push(regalloc.MapRegister(param));
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else
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{
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sub(esp, 4);
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movss(dword[esp], regalloc.MapXRegister(param));
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}
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}
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else if (param.is_imm())
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push(param.imm_value());
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else
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die("invalid combination");
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CC_stackSize += 4;
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unwinder.allocStackPtr(getCurr(), 4);
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break;
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//push the ptr itself
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case CPT_ptr:
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verify(param.is_reg());
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push((unat)param.reg_ptr());
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CC_stackSize += 4;
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unwinder.allocStackPtr(getCurr(), 4);
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break;
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// store from EAX
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case CPT_u64rvL:
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case CPT_u32rv:
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mov(regalloc.MapRegister(param), eax);
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break;
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// store from EDX
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case CPT_u64rvH:
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mov(regalloc.MapRegister(param), edx);
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break;
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// store from ST(0)
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case CPT_f32rv:
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fstp(dword[param.reg_ptr()]);
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movss(regalloc.MapXRegister(param), dword[param.reg_ptr()]);
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break;
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}
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}
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void X86Compiler::ngen_CC_Finish(const shil_opcode &op)
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{
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add(esp, CC_stackSize);
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unwinder.allocStackPtr(getCurr(), -CC_stackSize);
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}
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void X86Compiler::freezeXMM()
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{
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if (current_opid == (size_t)-1)
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return;
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s8 *fpreg = alloc_fregs;
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f32 *slpc = thaw_regs;
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while (*fpreg != -1)
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{
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if (regalloc.IsMapped(Xbyak::Xmm(*fpreg), current_opid))
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movss(dword[slpc++], Xbyak::Xmm(*fpreg));
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fpreg++;
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}
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}
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void X86Compiler::thawXMM()
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{
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if (current_opid == (size_t)-1)
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return;
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s8* fpreg = alloc_fregs;
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f32* slpc = thaw_regs;
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while (*fpreg != -1)
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{
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if (regalloc.IsMapped(Xbyak::Xmm(*fpreg), current_opid))
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movss(Xbyak::Xmm(*fpreg), dword[slpc++]);
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fpreg++;
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}
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}
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void X86Compiler::genMainloop()
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{
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unwinder.start((void *)getCurr());
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push(esi);
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unwinder.pushReg(getSize(), Xbyak::Operand::ESI);
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push(edi);
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unwinder.pushReg(getSize(), Xbyak::Operand::EDI);
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push(ebp);
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unwinder.pushReg(getSize(), Xbyak::Operand::EBP);
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push(ebx);
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unwinder.pushReg(getSize(), Xbyak::Operand::EBX);
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#ifndef _WIN32
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// 16-byte alignment
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sub(esp, 12);
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unwinder.allocStack(getSize(), 12);
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#endif
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unwinder.endProlog(getSize());
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mov(ecx, dword[&Sh4cntx.pc]);
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mov(dword[&cycle_counter], SH4_TIMESLICE);
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mov(eax, 0);
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//next_pc _MUST_ be on ecx
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Xbyak::Label cleanup;
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//no_update:
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Xbyak::Label no_updateLabel;
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L(no_updateLabel);
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mov(esi, ecx); // save sh4 pc in ESI, used below if FPCB is still empty for this address
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mov(eax, (size_t)&p_sh4rcb->fpcb[0]);
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and_(ecx, RAM_SIZE_MAX - 2);
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jmp(dword[eax + ecx * 2]);
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//cleanup:
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L(cleanup);
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#ifndef _WIN32
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// 16-byte alignment
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add(esp, 12);
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#endif
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pop(ebx);
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pop(ebp);
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pop(edi);
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pop(esi);
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ret();
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//do_iter:
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Xbyak::Label do_iter;
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L(do_iter);
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pop(ecx);
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call((void *)rdv_DoInterrupts);
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mov(ecx, eax);
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mov(edx, dword[&Sh4cntx.CpuRunning]);
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cmp(edx, 0);
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jz(cleanup);
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jmp(no_updateLabel);
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//ngen_LinkBlock_Shared_stub:
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Xbyak::Label ngen_LinkBlock_Shared_stub;
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L(ngen_LinkBlock_Shared_stub);
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pop(ecx);
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sub(ecx, 5);
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call((void *)rdv_LinkBlock);
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jmp(eax);
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size_t unwindSize = unwinder.end(getSize());
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setSize(getSize() + unwindSize);
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// Functions called by blocks
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//intc_sched:
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unwinder.start((void *)getCurr());
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size_t startOffset = getSize();
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unwinder.endProlog(0);
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Xbyak::Label intc_schedLabel;
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L(intc_schedLabel);
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add(dword[&cycle_counter], SH4_TIMESLICE);
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call((void *)UpdateSystem);
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cmp(eax, 0);
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jnz(do_iter);
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ret();
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//ngen_LinkBlock_cond_Next_stub:
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Xbyak::Label ngen_LinkBlock_cond_Next_label;
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L(ngen_LinkBlock_cond_Next_label);
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mov(edx, 0);
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jmp(ngen_LinkBlock_Shared_stub);
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//ngen_LinkBlock_cond_Branch_stub:
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Xbyak::Label ngen_LinkBlock_cond_Branch_label;
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L(ngen_LinkBlock_cond_Branch_label);
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mov(edx, 1);
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jmp(ngen_LinkBlock_Shared_stub);
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//ngen_LinkBlock_Generic_stub:
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Xbyak::Label ngen_LinkBlock_Generic_label;
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L(ngen_LinkBlock_Generic_label);
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mov(edx, dword[&Sh4cntx.jdyn]);
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jmp(ngen_LinkBlock_Shared_stub);
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genMemHandlers();
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unwindSize = unwinder.end(getSize() - startOffset);
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setSize(getSize() + unwindSize);
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// The following code and all code blocks use the same stack frame as mainloop()
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// (direct jump from there or from a block)
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unwinder.start((void *)getCurr());
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startOffset = getSize();
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unwinder.pushReg(0, Xbyak::Operand::ESI);
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unwinder.pushReg(0, Xbyak::Operand::EDI);
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unwinder.pushReg(0, Xbyak::Operand::EBP);
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unwinder.pushReg(0, Xbyak::Operand::EBX);
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#ifndef _WIN32
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// 16-byte alignment
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unwinder.allocStack(0, 12);
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#endif
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unwinder.endProlog(0);
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//ngen_FailedToFindBlock_:
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Xbyak::Label failedToFindBlock;
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L(failedToFindBlock);
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mov(ecx, esi); // get back the saved sh4 PC saved above
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call((void *)rdv_FailedToFindBlock);
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jmp(eax);
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//ngen_blockcheckfail:
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Xbyak::Label ngen_blockcheckfailLabel;
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L(ngen_blockcheckfailLabel);
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call((void *)rdv_BlockCheckFail);
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jmp(eax);
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unwindSize = unwinder.end(getSize() - startOffset);
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setSize(getSize() + unwindSize);
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ready();
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mainloop = (void (*)())getCode();
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ngen_FailedToFindBlock_ = (void (*)())failedToFindBlock.getAddress();
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intc_sched = (void (*)())intc_schedLabel.getAddress();
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no_update = (void (*)())no_updateLabel.getAddress();
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ngen_LinkBlock_cond_Next_stub = (void (*)())ngen_LinkBlock_cond_Next_label.getAddress();
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ngen_LinkBlock_cond_Branch_stub = (void (*)())ngen_LinkBlock_cond_Branch_label.getAddress();
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ngen_LinkBlock_Generic_stub = (void (*)())ngen_LinkBlock_Generic_label.getAddress();
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ngen_blockcheckfail = (void (*)())ngen_blockcheckfailLabel.getAddress();
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emit_Skip(getSize());
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}
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bool X86Compiler::genReadMemImmediate(const shil_opcode& op, RuntimeBlockInfo* block)
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{
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|
if (!op.rs1.is_imm())
|
|
return false;
|
|
u32 size = op.flags & 0x7f;
|
|
u32 addr = op.rs1.imm_value();
|
|
bool isram = false;
|
|
void* ptr = _vmem_read_const(addr, isram, size > 4 ? 4 : size);
|
|
|
|
if (isram)
|
|
{
|
|
// Immediate pointer to RAM: super-duper fast access
|
|
switch (size)
|
|
{
|
|
case 1:
|
|
if (regalloc.IsAllocg(op.rd))
|
|
movsx(regalloc.MapRegister(op.rd), byte[ptr]);
|
|
else
|
|
{
|
|
movsx(eax, byte[ptr]);
|
|
mov(dword[op.rd.reg_ptr()], eax);
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
if (regalloc.IsAllocg(op.rd))
|
|
movsx(regalloc.MapRegister(op.rd), word[ptr]);
|
|
else
|
|
{
|
|
movsx(eax, word[ptr]);
|
|
mov(dword[op.rd.reg_ptr()], eax);
|
|
}
|
|
break;
|
|
|
|
case 4:
|
|
if (regalloc.IsAllocg(op.rd))
|
|
mov(regalloc.MapRegister(op.rd), dword[ptr]);
|
|
else if (regalloc.IsAllocf(op.rd))
|
|
movd(regalloc.MapXRegister(op.rd), dword[ptr]);
|
|
else
|
|
{
|
|
mov(eax, dword[ptr]);
|
|
mov(dword[op.rd.reg_ptr()], eax);
|
|
}
|
|
break;
|
|
|
|
case 8:
|
|
#ifdef EXPLODE_SPANS
|
|
if (op.rd.count() == 2 && regalloc.IsAllocf(op.rd, 0) && regalloc.IsAllocf(op.rd, 1))
|
|
{
|
|
movd(regalloc.MapXRegister(op.rd, 0), dword[ptr]);
|
|
movd(regalloc.MapXRegister(op.rd, 1), dword[(u32 *)ptr + 1]);
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
movq(xmm0, qword[ptr]);
|
|
movq(qword[op.rd.reg_ptr()], xmm0);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
die("Invalid immediate size");
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// Not RAM: the returned pointer is a memory handler
|
|
if (size == 8)
|
|
{
|
|
verify(!regalloc.IsAllocAny(op.rd));
|
|
|
|
// Need to call the handler twice
|
|
mov(ecx, addr);
|
|
genCall((void (DYNACALL *)())ptr);
|
|
mov(dword[op.rd.reg_ptr()], eax);
|
|
|
|
mov(ecx, addr + 4);
|
|
genCall((void (DYNACALL *)())ptr);
|
|
mov(dword[op.rd.reg_ptr() + 1], eax);
|
|
}
|
|
else
|
|
{
|
|
mov(ecx, addr);
|
|
|
|
switch(size)
|
|
{
|
|
case 1:
|
|
genCall((void (DYNACALL *)())ptr);
|
|
movsx(eax, al);
|
|
break;
|
|
|
|
case 2:
|
|
genCall((void (DYNACALL *)())ptr);
|
|
movsx(eax, ax);
|
|
break;
|
|
|
|
case 4:
|
|
genCall((void (DYNACALL *)())ptr);
|
|
break;
|
|
|
|
default:
|
|
die("Invalid immediate size");
|
|
break;
|
|
}
|
|
host_reg_to_shil_param(op.rd, eax);
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
bool X86Compiler::genWriteMemImmediate(const shil_opcode& op, RuntimeBlockInfo* block)
|
|
{
|
|
if (!op.rs1.is_imm())
|
|
return false;
|
|
u32 size = op.flags & 0x7f;
|
|
u32 addr = op.rs1.imm_value();
|
|
bool isram = false;
|
|
void* ptr = _vmem_write_const(addr, isram, size > 4 ? 4 : size);
|
|
|
|
if (isram)
|
|
{
|
|
// Immediate pointer to RAM: super-duper fast access
|
|
switch (size)
|
|
{
|
|
case 1:
|
|
if (regalloc.IsAllocg(op.rs2))
|
|
{
|
|
Xbyak::Reg32 rs2 = regalloc.MapRegister(op.rs2);
|
|
if (rs2.getIdx() >= 4)
|
|
{
|
|
mov(eax, rs2);
|
|
mov(byte[ptr], al);
|
|
}
|
|
else
|
|
mov(byte[ptr], rs2.cvt8());
|
|
}
|
|
else if (op.rs2.is_imm())
|
|
mov(byte[ptr], (u8)op.rs2.imm_value());
|
|
else
|
|
{
|
|
mov(al, byte[op.rs2.reg_ptr()]);
|
|
mov(byte[ptr], al);
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
if (regalloc.IsAllocg(op.rs2))
|
|
mov(word[ptr], regalloc.MapRegister(op.rs2).cvt16());
|
|
else if (op.rs2.is_imm())
|
|
mov(word[ptr], (u16)op.rs2.imm_value());
|
|
else
|
|
{
|
|
mov(cx, word[op.rs2.reg_ptr()]);
|
|
mov(word[ptr], cx);
|
|
}
|
|
break;
|
|
|
|
case 4:
|
|
if (regalloc.IsAllocg(op.rs2))
|
|
mov(dword[ptr], regalloc.MapRegister(op.rs2));
|
|
else if (regalloc.IsAllocf(op.rs2))
|
|
movd(dword[ptr], regalloc.MapXRegister(op.rs2));
|
|
else if (op.rs2.is_imm())
|
|
mov(dword[ptr], op.rs2.imm_value());
|
|
else
|
|
{
|
|
mov(ecx, dword[op.rs2.reg_ptr()]);
|
|
mov(dword[ptr], ecx);
|
|
}
|
|
break;
|
|
|
|
case 8:
|
|
#ifdef EXPLODE_SPANS
|
|
if (op.rs2.count() == 2 && regalloc.IsAllocf(op.rs2, 0) && regalloc.IsAllocf(op.rs2, 1))
|
|
{
|
|
movd(dword[ptr], regalloc.MapXRegister(op.rs2, 0));
|
|
movd(dword[(u32 *)ptr + 1], regalloc.MapXRegister(op.rs2, 1));
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
movq(xmm0, qword[op.rs2.reg_ptr()]);
|
|
movq(qword[ptr], xmm0);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
die("Invalid immediate size");
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// Not RAM: the returned pointer is a memory handler
|
|
mov(ecx, addr);
|
|
shil_param_to_host_reg(op.rs2, edx);
|
|
|
|
genCall((void (DYNACALL *)())ptr);
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
void X86Compiler::checkBlock(bool smc_checks, RuntimeBlockInfo* block)
|
|
{
|
|
if (!smc_checks)
|
|
return;
|
|
|
|
mov(ecx, block->addr);
|
|
s32 sz = block->sh4_code_size;
|
|
u32 sa = block->addr;
|
|
while (sz > 0)
|
|
{
|
|
void* p = GetMemPtr(sa, 4);
|
|
if (p)
|
|
{
|
|
if (sz == 2)
|
|
cmp(word[p], (u32)*(s16*)p);
|
|
else
|
|
cmp(dword[p], *(u32*)p);
|
|
jne((const void *)ngen_blockcheckfail);
|
|
}
|
|
sz -= 4;
|
|
sa += 4;
|
|
}
|
|
}
|
|
|
|
void ngen_init()
|
|
{
|
|
}
|
|
|
|
void ngen_ResetBlocks()
|
|
{
|
|
unwinder.clear();
|
|
|
|
compiler = new X86Compiler();
|
|
|
|
try {
|
|
compiler->genMainloop();
|
|
} catch (const Xbyak::Error& e) {
|
|
ERROR_LOG(DYNAREC, "Fatal xbyak error: %s", e.what());
|
|
}
|
|
|
|
delete compiler;
|
|
compiler = nullptr;
|
|
|
|
ngen_FailedToFindBlock = ngen_FailedToFindBlock_;
|
|
}
|
|
|
|
void ngen_mainloop(void* v_cntx)
|
|
{
|
|
try {
|
|
mainloop();
|
|
} catch (const SH4ThrownException&) {
|
|
ERROR_LOG(DYNAREC, "SH4ThrownException in mainloop");
|
|
throw FlycastException("Fatal: Unhandled SH4 exception");
|
|
}
|
|
}
|
|
|
|
void ngen_Compile(RuntimeBlockInfo* block, bool smc_checks, bool, bool, bool optimise)
|
|
{
|
|
verify(emit_FreeSpace() >= 16 * 1024);
|
|
|
|
compiler = new X86Compiler();
|
|
|
|
try {
|
|
compiler->compile(block, smc_checks, optimise);
|
|
} catch (const Xbyak::Error& e) {
|
|
ERROR_LOG(DYNAREC, "Fatal xbyak error: %s", e.what());
|
|
}
|
|
|
|
delete compiler;
|
|
}
|
|
|
|
bool ngen_Rewrite(host_context_t &context, void *faultAddress)
|
|
{
|
|
u8 *rewriteAddr = *(u8 **)context.esp - 5;
|
|
X86Compiler *compiler = new X86Compiler(rewriteAddr);
|
|
bool rv = compiler->rewriteMemAccess(context);
|
|
delete compiler;
|
|
|
|
return rv;
|
|
}
|
|
|
|
void ngen_CC_Start(shil_opcode* op)
|
|
{
|
|
compiler->ngen_CC_Start(*op);
|
|
}
|
|
|
|
void ngen_CC_Param(shil_opcode* op, shil_param* par, CanonicalParamType tp)
|
|
{
|
|
compiler->ngen_CC_param(*op, *par, tp);
|
|
}
|
|
|
|
void ngen_CC_Call(shil_opcode* op, void* function)
|
|
{
|
|
compiler->ngen_CC_Call(*op, function);
|
|
}
|
|
|
|
void ngen_CC_Finish(shil_opcode* op)
|
|
{
|
|
compiler->ngen_CC_Finish(*op);
|
|
}
|
|
#endif
|