Tested: Both with and without the feature, works only for x64 CPUs for
now, but supported in both windows and linux (see vmem implementation
for it, using mem-mapped files).
Linked them both toghether since you can't really define one and
not the other (plus Linux honors one windows the other in some
cases).
More refactoring on this area to follow.
implement sh4 fpu disable exception
implement assistance/PTEA MMU registers
fix some sh4 ops with side effect in interpreter
account for delay slot op cycles
avoid any side effect when using wince tracer
extract SH4_TIMESLICE to single header file (still not used by arm and
x86 recs)
Check if FMA/AVX/SSE3 is supported before using it
fully naked main loop in win32 with proper seh directives
win32: more xmm regs to allocate and no need to save them when calling
out
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
The SH4 sets the signaling bit to 0 for qNaN: 7fbfffff instead of the
usual 7fffffff. Same games seem to rely on this.
Fixes Fur Fighters freeze and missing geometry in game.
The -ffast-math gcc option implies the -ffinite-math-only option, which
produces wrong results with Inf and NaN. Use integer math to detect the
sign of float numbers in FTRC to avoid these issues.
Also the upper cut off value for conversion was apparently wrong.
Also fixed the x86 dynarec but not tested.
Fixes wrong car color in Tokyo Xtreme Racer car selection screen.
div32 matching doesn't handle division by zero and edge cases, which
causes crashes with some games.
Setting enabled by default for Pro Pinball Trilogy.
This adds support for separate config and data dirs.
On Linux, these will be compliant XDG Basedir Specification, i.e.
XDG_CONFIG_HOME and XDG_CONFIG_DIRS (or XDG_DATA_HOME and XDG_DATA_DIRS
respectively). On all other platforms, there currently just set to the
homedir path (so no previous behaviour has been changed).
If reicast wants to read and write a data file, it just calls
get_data_path("/samplefile.txt"). If it does not need to write to
that file, it just uses get_data_path("/samplefile.txt", false). That
way, we can also use system-wide dirs (like /usr/share/reicast on
linux), that the user usually doesn't have write access to.
The same applies for config file, where you use get_config_path(args)
respectively.
Here's the original compiler warning:
../../core/hw/sh4/dyna/shil.cpp:700:24: warning: '&&' within '||'
[-Wlogical-op-parentheses]
...if (op->rd.is_reg() && op->rd._reg==reg_sr_T || op->op==shop_ifb)
~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~ ~~
../../core/hw/sh4/dyna/shil.cpp:700:24: note: place parentheses around the '&&'
expression to silence this warning
...if (op->rd.is_reg() && op->rd._reg==reg_sr_T || op->op==shop_ifb)
^
( )
../../core/hw/sh4/dyna/shil.cpp:843:25: warning: '&&' within '||'
[-Wlogical-op-parentheses]
if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:843:25: note: place parentheses around the '&&'
expression to silence this warning
if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
^
( )
../../core/hw/sh4/dyna/shil.cpp:844:25: warning: '&&' within '||'
[-Wlogical-op-parentheses]
|| op->rs2.is_reg() &&
op->rs2._reg==reg_sr_T
~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:844:25: note: place parentheses around the '&&'
expression to silence this warning
|| op->rs2.is_reg() && op->rs2._reg==reg_sr_T
^
( )
../../core/hw/sh4/dyna/shil.cpp:845:25: warning: '&&' within '||'
[-Wlogical-op-parentheses]
|| op->rs3.is_reg() && op->rs3._reg==reg_sr_T
~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:845:25: note: place parentheses around the '&&'
expression to silence this warning
|| op->rs3.is_reg() && op->rs3._reg==reg_sr_T
^
( )
This compiler warning has been fixed:
../../core/hw/sh4/dyna/decoder.cpp:1181:66: warning: '&&' within '||'
[-Wlogical-op-parentheses]
...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/decoder.cpp:1181:66: note: place parentheses around the
'&&' expression to silence this warning
...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
^
( )
This consolidates some of the work done for TARGET_NO_NVMEM and
feat/no-direct-memmap. If nvmem is disabled at compile time or alloc
fails _nvmem_enabled() will return false. Various other fixes
and cleanups all around.
Flyinghead