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flycast
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3 Commits

Author SHA1 Message Date
Flyinghead 74aae115ee sh4: implement C and WT MMU bits in cache. Use mem handlers everywhere 
o/icache use C and WT bits from mmu to override cache and copy back
settings (fixes Windows CE)
move mem handlers setup out of mmu into sh4_mem. Call in dc_resume and
detect transitions interp -> dynarec to flush caches.
fix ssa tlb miss exception wih slow mmu
 2020-06-24 15:23:47 +02:00
Flyinghead 22dcb1ec99 sh4 ocache implementation. IC and OC address/data read/write in P4 
ignore SR.RB in user mode instead of forcing it 0
add STRICT_MODE to enable ocache in interpreter
don't flush mmu table when enabling it
fix fixNan64()
 2020-06-12 17:35:14 +02:00
Flyinghead 333df13fce sh4 icache implementation. move aica out of sh4/interp. 
revert to original div1 impl
serialize rtc clock value
cmake fixes: asan and logging options, -no-pie on x64/linux
 2020-06-09 12:02:01 +02:00