implement sh4 fpu disable exception
implement assistance/PTEA MMU registers
fix some sh4 ops with side effect in interpreter
account for delay slot op cycles
avoid any side effect when using wince tracer
extract SH4_TIMESLICE to single header file (still not used by arm and
x86 recs)
- Rewrite mem ops to only modify regs after exception path
- Throw & catch logic for interpreter that raises the exception
- Re-enabled some commented mmu code
Flyinghead