Commit Graph

212 Commits

Author SHA1 Message Date
Flyinghead 9920880987 dynarec: reserve code cache space for frequently changing blocks
detect frequent SMC check failures and use a specific code cache area
for these blocks.
flush the temp area when full but keep the main code cache area
2019-04-19 11:45:05 +02:00
Flyinghead 76348b13ce wince: use cpu ratio of 2 in dynarec 2019-04-19 09:58:25 +02:00
Flyinghead d82e5e2017 don't use mmu for dma 2019-04-18 22:48:37 +02:00
Flyinghead 0f34d776f6 wince: delete sr.FD hack, restore FD block check in x64 rec
use longjmp for interpreter fallback exceptions
2019-04-18 14:15:01 +02:00
Flyinghead d68da6bdd4 wince: let fp disable exception run before compiling a block 2019-04-18 13:55:10 +02:00
Flyinghead a25918839b save fpu regs when sr.FD is set, and restore them when unset 2019-04-15 19:02:10 +02:00
Flyinghead 5d6e96463c x64 and win32 build fixes 2019-04-15 18:31:15 +02:00
Flyinghead dece3fc13e wince: use setjmp/longjmp instead of try/catch for dynarecs
WinCE fast mmu implementation
WIP arm64 dynarec
2019-04-15 18:02:34 +02:00
david miller cc9d5ec55b CMake/Master working, tested on windows with Clang && MSC (x86,x64) 2019-04-12 16:59:39 -04:00
David Miller 3d1b82854e
Merge branch 'master' into fh/win32-winresize 2019-04-12 13:03:30 -04:00
Flyinghead 1b04ef4cb1 Get rid of RTC in settings 2019-04-08 22:09:22 +02:00
flyinghead 7f0489ff28 visual studio compatibility
no modem support
no zip or 7z support so no naomi for now
hacked a .asm file as vs doesn't support inline assembly -> code dup
2019-03-30 19:26:05 +01:00
Flyinghead 505c5b6c4d dynarec: FullCheck was being ignored and FastCheck used instead
Fix crash on arm32
Fix infinite loop on x64
2019-03-30 10:06:19 +01:00
Stefanos Kornilios Mitsis Poiitidis af6993a819 dynarec: Refactor smc-option a bit 2019-03-30 07:16:44 +01:00
Flyinghead 6438a402df dynarec: add option to control smc code checks: none, fast, full 2019-03-29 19:23:37 +01:00
Flyinghead c809c6c56f Merge branch 'fh/mymaster' into fh/master-merge 2019-03-25 16:47:47 +01:00
Flyinghead ba00da2420 dynarec: don't throw exceptions if NO_MMU 2019-03-25 13:53:49 +01:00
Flyinghead cb6acab40f missing file from previous commit 2019-03-25 11:56:41 +01:00
Flyinghead ef43883fb5 dynarec: WinCE support WIP
Only for the x64 dynarec atm
Bugs remaining
2019-03-25 11:53:13 +01:00
Flyinghead 8564f497d4 sh4 interp: add IsFloatingPoint() to op desc. Add delay slot 0 hack
Add UsesFPU flag to floating point ops. Use flag instead of specific
test cases in op handlers.
Adjust thrown exception in delay slot (slot illegal exception and slot
fpu disable)
Re-add delay slot 0 hack (Looney Tunes Space Race)
2019-03-20 13:45:35 +01:00
Flyinghead d0f65b19d3 mmu: templatize mmu_full_lookup 2019-03-20 10:58:59 +01:00
Flyinghead a21eedc88a implement fpu disable exception and other interp and mmu fixes
implement sh4 fpu disable exception
implement assistance/PTEA MMU registers
fix some sh4 ops with side effect in interpreter
account for delay slot op cycles
avoid any side effect when using wince tracer
extract SH4_TIMESLICE to single header file (still not used by arm and
x86 recs)
2019-03-19 21:35:55 +01:00
Flyinghead 9e2938dff4 mmu: state change wasn't detected. WinCE syscalls tracing 2019-03-17 23:46:39 +01:00
Flyinghead 73d50486d5 mmu: dynamic switching with read/write mem function pointers 2019-03-17 22:59:18 +01:00
Flyinghead e5b18cd8a0 wince: implement pref SQ to YUV converter and 32bit vram
implement incremental YUV conversion with pref SQ
implement access to 32bit VRAM with pref SQ
init YUV converter when TA_YUV_TEX_CTRL is set
set FIFO available space to 256 through SB_TFREM reg
fake FIFO status through SB_FFST reg
2019-03-14 21:35:33 +01:00
Flyinghead 89c2fd54a9 fix function name typo 2019-03-13 20:04:14 +01:00
Flyinghead f4568ace3c backport disassembler missing piece from nulldc 2019-03-13 17:48:21 +01:00
Flyinghead e6d67baf02 sh4 sched: avoid error when jitter is high and delta becomes negative 2019-03-13 17:21:52 +01:00
Flyinghead 6305df9dab ignore fldi0/fldi1 in double precision instead of dying 2019-03-13 17:19:41 +01:00
Flyinghead 6d6492ddc1 mmu: flush tables when MMUCR.TI is written 2019-03-13 17:17:08 +01:00
Flyinghead 0d0fd212ff Implement Ch2 DMA to 32-bit VRAM
Fixes Giana's Return
2019-03-08 13:23:51 +01:00
Flyinghead 492e771272 Content browser (WIP)
Get rid of the renderer thread. It is now the main/UI thread on all
platforms. The emulator runs in a separate thread.
Content browser displayed at startup.
2019-02-25 17:52:53 +01:00
Flyinghead 35bb81b195 fix some printf format strings 2019-02-16 14:16:50 +01:00
flyinghead 3cdd39170d win32: call os_DoEvents on the emu/main thread and other fixes 2019-02-07 19:20:10 +01:00
Flyinghead 91cfd4b2f7 Reserve and allocate maximum RAM/VRAM/ARAM in all cases
Reserve enough virtual memory space for DC and Naomi
Allocate dynarec entry point tables for max possible ram
Free mem and release vmem on exit
2019-01-24 09:48:58 +01:00
Flyinghead 0cce6cc5a5 Clean up and comments. No functional change 2019-01-24 09:40:14 +01:00
Flyinghead cd4e4cbdc9 x64 dynarec: check if extension is supported by cpu. seh on win32
Check if FMA/AVX/SSE3 is supported before using it
fully naked main loop in win32 with proper seh directives
win32: more xmm regs to allocate and no need to save them when calling
out
2019-01-18 17:02:50 +01:00
flyinghead ed3f866835 win32 build fix 2019-01-16 17:42:36 +01:00
Flyinghead f852480b88 OSX: build fix 2019-01-16 14:44:40 +01:00
Flyinghead cb8e81d473 arm64: direct memory access and jit rewrite
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
2019-01-16 13:04:16 +01:00
Flyinghead c2a048e8d8 arm64: use explode_spans to allocate regs for V2 and F64 params 2019-01-15 08:47:07 +01:00
Flyinghead e241613b8f x64 dynarec: implemented swaplb, fipr, ftrv, frswap and other fixes
native implementations for swaplb, fipr, ftrv and frswap
use explode_spans to map 2V and F64 to registers
save xmm registers when calling subroutine
2019-01-14 21:15:36 +01:00
Flyinghead b465f744ba dynarec: flush fpu regs before FTRV
fixes issue with tokyo xtreme racer (x64)
might need to flush before other ops
2019-01-13 23:21:58 +01:00
Flyinghead fc05727538 dynarecs clean-up
move GetRegPtr and ngen_FailedToFindBlock to sh4/dyna
2019-01-11 23:52:20 +01:00
Flyinghead 0f026552c9 fix comments 2019-01-11 15:54:03 +01:00
Flyinghead a9a2aad8f6 arm64: use register spans allocation. Implement some opcodes natively 2019-01-09 16:35:23 +01:00
Flyinghead 67a4eb8f1f arm64 dynarec using vixl 2019-01-07 21:50:46 +01:00
Flyinghead 10d9761a65 minor fix 2018-12-12 13:49:53 +01:00
Flyinghead 5763da184c Fix bug in WriteMemBlock_nommu_ptr when size is not word-aligned
Bump max opaque polygon to 8192 (alpilot)
Minor lr backport and clean up

Fix corruption in doa2[m] and alpilot
Fix missing sound in Jambo Safari
2018-12-12 12:40:04 +01:00
Flyinghead fb92d8d8c5 less log 2018-11-09 13:23:47 +01:00
Flyinghead a3f898b7d0 Naomi: implement undocumented SH4 registers to make version h bios happy 2018-11-06 10:54:13 +01:00
Flyinghead 47be33d388 Free dynarec code blocks on exit 2018-10-29 16:10:39 +01:00
Flyinghead 8a56710841 New save state format 2018-10-29 15:11:34 +01:00
Flyinghead 22b18d97a0 Don't flush the dynarec cache when the sh4 instruction cache is flushed
Fixes Shikigami No Shiro II slowness
2018-10-28 01:29:44 +02:00
Flyinghead fb84df6665 Better logging 2018-10-20 19:38:21 +02:00
Flyinghead 4b38b9b788 less log 2018-10-16 15:35:28 +02:00
Flyinghead 82e0fc7f60 Don't crash on invalid ram write size. Report and ignore 2018-10-11 21:15:00 +02:00
Flyinghead f419786584 Fix sh4 FTRC op to use correct positive cutoff value.
Fix for interpreter, common dynarec and x86 rec.

Fixes wrong car color in Tokyo Xtreme Racer car selection screen.
2018-10-02 12:38:49 +02:00
Ender's Games ee3a474ee4 Revert "Interrupt Hack setting w/ less stigma"
This reverts commits e5c0f0e, eebf3fc, 14fc7d9
2018-09-26 09:06:07 -04:00
flyinghead c135ab0e90 Win32: fix msvc build. removed tick thread 2018-09-25 14:09:07 +02:00
flyinghead 21f47c03ec Fix dynarec x64 crash with mingw64.
Get rid of CDI warning pop up dialog
2018-09-25 12:27:37 +02:00
Flyinghead de147549c3 Save states implementation 2018-09-20 19:48:46 +02:00
Flyinghead 7ce4fccb37 Merge remote-tracking branch 'origin/master' into fh/mymaster 2018-09-20 17:28:41 +02:00
Sven daae7c8e68 add save states 2018-09-02 09:49:23 -04:00
Ender's Games 14fc7d910a Convert Interrupt Hack to name w/ less stigma 2018-08-26 23:13:25 -04:00
Ender's Games d8226c7b5d Fix: "Functions should be declared at file scope" 2018-08-22 21:14:42 -04:00
Ender's Games e5c0f0ee71 https://code.google.com/p/nulldc/source/detail?r=108
Originally ported from nullDC to libretro in commits:
2fa562db1b46c52b663b3dd4bb33a64907357458
f8eb58ac16a9e5adf662b99be5d00729264808e0
Modified for use w/ reicast per-game configuration
2018-08-22 21:14:02 -04:00
Ender's Games eb11d19687 Include header guards to prevent multiple inclusions 2018-08-21 09:28:54 -04:00
Ender's Games 8d9d40dffc Core: Changes provided by Android NDK compiler 2018-08-19 01:54:15 -04:00
Flyinghead 2fb9927688 Less console spamming 2018-08-17 18:30:54 +02:00
Ender's Games a3f585ea1c Port the dynarec safe flag from nullDC (See #84) 2018-08-16 20:00:10 -04:00
Flyinghead 2d3fd59e04 Revert f13b366e8d57c15a6a97cc0721d68ddb5268385f: the fixNaN function is
completely bogus and the correct one doesn't have any effect.
2018-07-14 09:13:56 +02:00
Flyinghead f13b366e8d Set the value for NaN according to the SH4 specs
The SH4 sets the signaling bit to 0 for qNaN: 7fbfffff instead of the
usual 7fffffff. Same games seem to rely on this.
Fixes Fur Fighters freeze and missing geometry in game.
2018-07-13 18:57:51 +02:00
Flyinghead ea35eeb728 Fix FTRC op in both interpreter and dynarec with respect to Inf and NaN
The -ffast-math gcc option implies the -ffinite-math-only option, which
produces wrong results with Inf and NaN. Use integer math to detect the
sign of float numbers in FTRC to avoid these issues.
Also the upper cut off value for conversion was apparently wrong.
Also fixed the x86 dynarec but not tested.
Fixes wrong car color in Tokyo Xtreme Racer car selection screen.
2018-07-13 12:02:32 +02:00
Flyinghead 648988e622 don't log div32 matching and some GDRom ops 2018-07-10 14:36:28 +02:00
Flyinghead 0df91770d2 Increase dynarec code cache size to 10 MB
Fixes frequent code cache invalidation due to lack of space, which kills
performance (Extreme Sports)
2018-07-06 17:19:37 +02:00
Flyinghead 315205caa9 Add setting to disable div32 matching (Pro Pinball Trilogy)
div32 matching doesn't handle division by zero and edge cases, which
causes crashes with some games.
Setting enabled by default for Pro Pinball Trilogy.
2018-07-06 09:49:39 +02:00
Nicolas HOUDELOT 5c343a219c fix typo 2018-03-05 01:57:00 +01:00
Stefanos Kornilios Mitsis Poiitidis 7c5e49a6d2 dyna: Fix f2i canonical + x86 to saturate 2016-05-14 04:15:16 +03:00
twinaphex b606593774 ftrc fix - revert back to nulldc defaults 2016-05-13 14:44:53 +02:00
Stefanos Kornilios Mitsis Poiitidis d85e4d8dff sh4/mmu: Don't use exceptions when disabled 2015-09-29 03:17:26 +02:00
Stefanos Kornilios Mitsis Poiitidis d99c803a0c sh4/mmu: Typo fixes, less log spam 2015-09-29 03:11:28 +02:00
Stefanos Kornilios Mitsis Poiitidis 4a060b5635 sh4/mmu: C++ exception based sh4 exception support. Won't run wince yet.
- Rewrite mem ops to only modify regs after exception path
- Throw & catch logic for interpreter that raises the exception
- Re-enabled some commented mmu code
2015-09-29 03:11:28 +02:00
Jan Holthuis e9beb86069 Merge pull request #798 from reicast/holzhaus/linux-use-xdg-config-home
Introduce separate config/data dirs (user & system wide)
2015-09-02 16:14:50 +02:00
Jan Holthuis 4267d51f90 stdclass: Make path getter function names more verbose 2015-09-02 15:49:00 +02:00
Jan Holthuis b6d0cddcaa stdclass: Add support for separate config/data dirs and system wide dirs
This adds support for separate config and data dirs.

On Linux, these will be compliant XDG Basedir Specification, i.e.
XDG_CONFIG_HOME and XDG_CONFIG_DIRS (or XDG_DATA_HOME and XDG_DATA_DIRS
respectively). On all other platforms, there currently just set to the
homedir path (so no previous behaviour has been changed).

If reicast wants to read and write a data file, it just calls
get_data_path("/samplefile.txt"). If it does not need to write to
that file, it just uses get_data_path("/samplefile.txt", false). That
way, we can also use system-wide dirs (like /usr/share/reicast on
linux), that the user usually doesn't have write access to.

The same applies for config file, where you use get_config_path(args)
respectively.
2015-09-02 15:48:53 +02:00
Stefanos Kornilios Mitsis Poiitidis dcd77326cc sh4/mmu: Import the old mmu implementation from nullDC.
Reicast doesn't support exceptions yet, so this isn't of much use now,
and is intended mostly as documentation. nullDC used some call stack
hooking magic to handle exceptions, which was never generic and clean
enough to be worth the effort to port to Reicast.
2015-08-27 17:05:06 +02:00
Stefanos Kornilios Mitsis Poiitidis f83130b84b Merge pull request #766 from reicast/fix/ios-and-osx
Fix ios and osx (projectfiles, nvmem)
2015-08-19 23:55:20 +02:00
TwistedUmbrella a4028154f9 Fix to prevent EXC_BAD_ACCESS on iPhone
This is inelegant and should only be temporary but resolves the issue
of CodeCache and ICache “getting lost” during initialization.
2015-08-19 15:33:18 -04:00
Stefanos Kornilios Mitsis Poiitidis 4f62b995b6 reios/naomi: First baby steps to support booting naomi roms
- Setups state, copies binary
- Binary locks up w/ a reboot loop

Naomi roms have a 512-byte header, executable length seems to be
at 368 or 3C0. The rom is copied from [0, len) to 0x0c020000.The
bios then hands over control at 0x0c021000
2015-08-19 01:29:46 +02:00
Jan Holthuis 5ab3d7b59b core/hw/sh4/dyna/shil.cpp: Fix '&&' within '||' warning
Here's the original compiler warning:
../../core/hw/sh4/dyna/shil.cpp:700:24: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
  ...if (op->rd.is_reg() && op->rd._reg==reg_sr_T ||  op->op==shop_ifb)
         ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~ ~~
../../core/hw/sh4/dyna/shil.cpp:700:24: note: place parentheses around the '&&'
      expression to silence this warning
  ...if (op->rd.is_reg() && op->rd._reg==reg_sr_T ||  op->op==shop_ifb)
                         ^
         (                                       )
../../core/hw/sh4/dyna/shil.cpp:843:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                        if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
                            ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:843:25: note: place parentheses around the '&&'
      expression to silence this warning
                        if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
                                             ^
                            (                                         )
../../core/hw/sh4/dyna/shil.cpp:844:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                                || op->rs2.is_reg() &&
op->rs2._reg==reg_sr_T
                                ~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:844:25: note: place parentheses around the '&&'
      expression to silence this warning
                                || op->rs2.is_reg() && op->rs2._reg==reg_sr_T
                                                    ^
                                   (                                         )
../../core/hw/sh4/dyna/shil.cpp:845:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                                || op->rs3.is_reg() && op->rs3._reg==reg_sr_T
                                ~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:845:25: note: place parentheses around the '&&'
      expression to silence this warning
                                || op->rs3.is_reg() && op->rs3._reg==reg_sr_T
                                                    ^
                                   (                                         )
2015-08-15 18:15:50 +02:00
Jan Holthuis 1d0ef81a43 core/hw/sh5/dyna/decoder.cpp: place parentheses around && expression
This compiler warning has been fixed:
../../core/hw/sh4/dyna/decoder.cpp:1181:66: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
  ...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
     ~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/decoder.cpp:1181:66: note: place parentheses around the
      '&&' expression to silence this warning
  ...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
                                   ^
        (                                                        )
2015-08-15 18:15:50 +02:00
Stefanos Kornilios Mitsis Poiitidis 67ecd6d9f9 vmem: Automatic fallback to slowpath if alloc fails
This consolidates some of the work done for TARGET_NO_NVMEM and
feat/no-direct-memmap. If nvmem is disabled at compile time or alloc
fails _nvmem_enabled() will return false. Various other fixes
and cleanups all around.
2015-08-12 03:09:44 +02:00
Stefanos Kornilios Mitsis Poiitidis ca83428fa5 naomi: Fix linux builds 2015-08-11 19:13:12 +02:00
Stefanos Kornilios Mitsis Poiitidis 7d0d2ba572 naomi: Initial support for TARGET_NAOMI, windows only
- Import naomi code from nullDC, modify and cleanup
- Only unprotected dimm-board support, custom lst files
- Still a compile option
- Boots naomi bios and some games, no input yet
2015-08-11 19:13:11 +02:00
Stefanos Kornilios Mitsis Poiitidis 9bc0a8ff0f shrec/bm: BM lookup table size follows RAM_SIZE 2015-08-11 19:13:11 +02:00
Stefanos Kornilios Mitsis Poiitidis 365accfde2 windows: fix TARGET_NO_NVMEM 2015-08-11 19:12:20 +02:00
Stefanos Kornilios Mitsis Poiitidis c3c2c68f21 Merge pull request #729 from reicast/wip/softrend
Basic and buggy software renderer
2015-08-11 17:43:47 +02:00
Stefanos Kornilios Mitsis Poiitidis c60fca4973 sh4: Cleanup SetFloatStatusReg a bit 2015-08-11 07:57:23 -04:00
Stefanos Kornilios Mitsis Poiitidis 26cfcd79e9 OSX: Fiddling to get the rec-cpp/noexcept path running 2015-08-11 07:57:22 -04:00