Commit Graph

72 Commits

Author SHA1 Message Date
Flyinghead 35bb81b195 fix some printf format strings 2019-02-16 14:16:50 +01:00
flyinghead 3cdd39170d win32: call os_DoEvents on the emu/main thread and other fixes 2019-02-07 19:20:10 +01:00
Flyinghead 0cce6cc5a5 Clean up and comments. No functional change 2019-01-24 09:40:14 +01:00
Flyinghead cd4e4cbdc9 x64 dynarec: check if extension is supported by cpu. seh on win32
Check if FMA/AVX/SSE3 is supported before using it
fully naked main loop in win32 with proper seh directives
win32: more xmm regs to allocate and no need to save them when calling
out
2019-01-18 17:02:50 +01:00
Flyinghead f852480b88 OSX: build fix 2019-01-16 14:44:40 +01:00
Flyinghead cb8e81d473 arm64: direct memory access and jit rewrite
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
2019-01-16 13:04:16 +01:00
Flyinghead c2a048e8d8 arm64: use explode_spans to allocate regs for V2 and F64 params 2019-01-15 08:47:07 +01:00
Flyinghead e241613b8f x64 dynarec: implemented swaplb, fipr, ftrv, frswap and other fixes
native implementations for swaplb, fipr, ftrv and frswap
use explode_spans to map 2V and F64 to registers
save xmm registers when calling subroutine
2019-01-14 21:15:36 +01:00
Flyinghead b465f744ba dynarec: flush fpu regs before FTRV
fixes issue with tokyo xtreme racer (x64)
might need to flush before other ops
2019-01-13 23:21:58 +01:00
Flyinghead fc05727538 dynarecs clean-up
move GetRegPtr and ngen_FailedToFindBlock to sh4/dyna
2019-01-11 23:52:20 +01:00
Flyinghead 0f026552c9 fix comments 2019-01-11 15:54:03 +01:00
Flyinghead 47be33d388 Free dynarec code blocks on exit 2018-10-29 16:10:39 +01:00
flyinghead c135ab0e90 Win32: fix msvc build. removed tick thread 2018-09-25 14:09:07 +02:00
flyinghead 21f47c03ec Fix dynarec x64 crash with mingw64.
Get rid of CDI warning pop up dialog
2018-09-25 12:27:37 +02:00
Flyinghead de147549c3 Save states implementation 2018-09-20 19:48:46 +02:00
Flyinghead 7ce4fccb37 Merge remote-tracking branch 'origin/master' into fh/mymaster 2018-09-20 17:28:41 +02:00
Sven daae7c8e68 add save states 2018-09-02 09:49:23 -04:00
Ender's Games 8d9d40dffc Core: Changes provided by Android NDK compiler 2018-08-19 01:54:15 -04:00
Ender's Games a3f585ea1c Port the dynarec safe flag from nullDC (See #84) 2018-08-16 20:00:10 -04:00
Flyinghead f13b366e8d Set the value for NaN according to the SH4 specs
The SH4 sets the signaling bit to 0 for qNaN: 7fbfffff instead of the
usual 7fffffff. Same games seem to rely on this.
Fixes Fur Fighters freeze and missing geometry in game.
2018-07-13 18:57:51 +02:00
Flyinghead ea35eeb728 Fix FTRC op in both interpreter and dynarec with respect to Inf and NaN
The -ffast-math gcc option implies the -ffinite-math-only option, which
produces wrong results with Inf and NaN. Use integer math to detect the
sign of float numbers in FTRC to avoid these issues.
Also the upper cut off value for conversion was apparently wrong.
Also fixed the x86 dynarec but not tested.
Fixes wrong car color in Tokyo Xtreme Racer car selection screen.
2018-07-13 12:02:32 +02:00
Flyinghead 648988e622 don't log div32 matching and some GDRom ops 2018-07-10 14:36:28 +02:00
Flyinghead 0df91770d2 Increase dynarec code cache size to 10 MB
Fixes frequent code cache invalidation due to lack of space, which kills
performance (Extreme Sports)
2018-07-06 17:19:37 +02:00
Flyinghead 315205caa9 Add setting to disable div32 matching (Pro Pinball Trilogy)
div32 matching doesn't handle division by zero and edge cases, which
causes crashes with some games.
Setting enabled by default for Pro Pinball Trilogy.
2018-07-06 09:49:39 +02:00
Nicolas HOUDELOT 5c343a219c fix typo 2018-03-05 01:57:00 +01:00
Stefanos Kornilios Mitsis Poiitidis 7c5e49a6d2 dyna: Fix f2i canonical + x86 to saturate 2016-05-14 04:15:16 +03:00
Jan Holthuis 4267d51f90 stdclass: Make path getter function names more verbose 2015-09-02 15:49:00 +02:00
Jan Holthuis b6d0cddcaa stdclass: Add support for separate config/data dirs and system wide dirs
This adds support for separate config and data dirs.

On Linux, these will be compliant XDG Basedir Specification, i.e.
XDG_CONFIG_HOME and XDG_CONFIG_DIRS (or XDG_DATA_HOME and XDG_DATA_DIRS
respectively). On all other platforms, there currently just set to the
homedir path (so no previous behaviour has been changed).

If reicast wants to read and write a data file, it just calls
get_data_path("/samplefile.txt"). If it does not need to write to
that file, it just uses get_data_path("/samplefile.txt", false). That
way, we can also use system-wide dirs (like /usr/share/reicast on
linux), that the user usually doesn't have write access to.

The same applies for config file, where you use get_config_path(args)
respectively.
2015-09-02 15:48:53 +02:00
TwistedUmbrella a4028154f9 Fix to prevent EXC_BAD_ACCESS on iPhone
This is inelegant and should only be temporary but resolves the issue
of CodeCache and ICache “getting lost” during initialization.
2015-08-19 15:33:18 -04:00
TwistedUmbrella bf75c95ae8 Update project for #755 and fix warnings 2015-08-17 07:59:39 -04:00
Jan Holthuis 5ab3d7b59b core/hw/sh4/dyna/shil.cpp: Fix '&&' within '||' warning
Here's the original compiler warning:
../../core/hw/sh4/dyna/shil.cpp:700:24: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
  ...if (op->rd.is_reg() && op->rd._reg==reg_sr_T ||  op->op==shop_ifb)
         ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~ ~~
../../core/hw/sh4/dyna/shil.cpp:700:24: note: place parentheses around the '&&'
      expression to silence this warning
  ...if (op->rd.is_reg() && op->rd._reg==reg_sr_T ||  op->op==shop_ifb)
                         ^
         (                                       )
../../core/hw/sh4/dyna/shil.cpp:843:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                        if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
                            ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:843:25: note: place parentheses around the '&&'
      expression to silence this warning
                        if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
                                             ^
                            (                                         )
../../core/hw/sh4/dyna/shil.cpp:844:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                                || op->rs2.is_reg() &&
op->rs2._reg==reg_sr_T
                                ~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:844:25: note: place parentheses around the '&&'
      expression to silence this warning
                                || op->rs2.is_reg() && op->rs2._reg==reg_sr_T
                                                    ^
                                   (                                         )
../../core/hw/sh4/dyna/shil.cpp:845:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                                || op->rs3.is_reg() && op->rs3._reg==reg_sr_T
                                ~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:845:25: note: place parentheses around the '&&'
      expression to silence this warning
                                || op->rs3.is_reg() && op->rs3._reg==reg_sr_T
                                                    ^
                                   (                                         )
2015-08-15 18:15:50 +02:00
Jan Holthuis 1d0ef81a43 core/hw/sh5/dyna/decoder.cpp: place parentheses around && expression
This compiler warning has been fixed:
../../core/hw/sh4/dyna/decoder.cpp:1181:66: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
  ...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
     ~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/decoder.cpp:1181:66: note: place parentheses around the
      '&&' expression to silence this warning
  ...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
                                   ^
        (                                                        )
2015-08-15 18:15:50 +02:00
Stefanos Kornilios Mitsis Poiitidis 67ecd6d9f9 vmem: Automatic fallback to slowpath if alloc fails
This consolidates some of the work done for TARGET_NO_NVMEM and
feat/no-direct-memmap. If nvmem is disabled at compile time or alloc
fails _nvmem_enabled() will return false. Various other fixes
and cleanups all around.
2015-08-12 03:09:44 +02:00
Stefanos Kornilios Mitsis Poiitidis ca83428fa5 naomi: Fix linux builds 2015-08-11 19:13:12 +02:00
Stefanos Kornilios Mitsis Poiitidis 9bc0a8ff0f shrec/bm: BM lookup table size follows RAM_SIZE 2015-08-11 19:13:11 +02:00
Stefanos Kornilios Mitsis Poiitidis c3c2c68f21 Merge pull request #729 from reicast/wip/softrend
Basic and buggy software renderer
2015-08-11 17:43:47 +02:00
Stefanos Kornilios Mitsis Poiitidis 26cfcd79e9 OSX: Fiddling to get the rec-cpp/noexcept path running 2015-08-11 07:57:22 -04:00
Stefanos Kornilios Mitsis Poiitidis e3845465f0 win64/jit: Generate unwind table for the jit code cache
This required moving the SH4_TCB outside the exe, as new tables that belong on the executable are ignored.
This isn't perfect, but there's a large area to scan for available address space so it shouldn't be a problem
2015-08-11 00:26:02 -04:00
Stefanos Kornilios Mitsis Poiitidis 0343feffa6 Merge pull request #714 from reicast/wip/nacl-and-emscripten
NaCL & Emscripten targets

- CPU_GENERIC
- TARGET_NO_THREADS
- TARGET_NO_NIXPROF
- TARGET_NO_EXCEPTIONS
- TARGET_NO_NVMEM
- TARGET_BOUNDED_EXECUTION
- TARGET_NO_COREIO_HTTP
2015-08-03 11:28:29 +02:00
Stefanos Kornilios Mitsis Poiitidis 61394d7a44 shil: Disable external assembly implementations
Using external function pointers is broken after the rec-cpp structural changes,
and relatively low priority so disabled for now.

Fixes builds on arm, non-android (see #720)
2015-08-03 10:41:34 +02:00
Stefanos Kornilios Mitsis Poiitidis ac6bdddae3 Merge pull request #694 from randomstuff/cleanup
Minor Cleanup
2015-08-03 00:09:11 +02:00
Gabriel Corona 8c68f4a06b Fix a 'permissive' warning 2015-07-31 20:37:39 +02:00
Stefanos Kornilios Mitsis Poiitidis d8ccc9d2e7 emscripten: More rec-cpp progress
It almost builds now, except emscripten randomly gives up and crashes. No one likes my code these days...
2015-07-29 06:45:02 +02:00
Stefanos Kornilios Mitsis Poiitidis 17a4af378c nacl: Post-merge cleanups 2015-07-29 04:58:41 +02:00
Stefanos Kornilios Mitsis Poiitidis b9bbb5c0c8 nacl: Work towards rec-cpp 2015-07-29 04:26:50 +02:00
Stefanos Kornilios Mitsis Poiitidis a82f9704d6 shrec: Limit max blocksize to 511 shops 2015-07-29 02:29:16 +02:00
~skmp 5b67e3f090 rec-cpp: SH4_TCB doesn't need to be in .text if not executable 2015-07-29 02:28:39 +02:00
Stefanos Kornilios Mitsis Poiitidis fb55e7f6f8 sh4/canonical: Provide impls for sync_sr and sync_fpscr
This shouldn't be a requirement as directly using shil_cf_ext should work,
but for some reason if I don't msvc optimizes the functions out.
2015-07-25 20:36:06 +02:00
Stefanos Kornilios Mitsis Poiitidis b1f7015a98 rec/cpp: Mostly fully direct specialized dispatchers
- Nest shil implementations to shilop_##name::form::impl for easier template matching
- Add more direct handlers
- Add prints if a direct handler isn't found
- Remove multiple indirect handlers, leave them for fallback
2015-07-25 14:36:04 +02:00
Stefanos Kornilios Mitsis Poiitidis 39e369411c shil/canonical: Fix decls, comment 2015-07-25 14:23:45 +02:00