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3,409 Commits 6 Branches 12 Tags 146 MiB
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116 Commits

Author SHA1 Message Date
Flyinghead 8d8e694e23 swap setpeq args in ssa if first is imm 2019-06-18 13:25:43 +02:00
Flyinghead 7120512205 wince: use exceptions in dyna/decoder.cpp and catch them in driver.cpp 2019-06-13 18:36:08 +02:00
Flyinghead e0949fb9aa Fix div matching: support 64-bit div and correct handling of negative 
Some games do 64-bit / 32-bit division (Pro Pinball Trilogy)
DIV0s/1 use and output 1's complement numbers
The final reminder fixup wasn't correct for negative dividend
 2019-06-13 18:27:21 +02:00
Flyinghead c49694599c rec-arm: use ssa regalloc 
add `subc a,a` expression to simplify
 2019-06-12 17:31:37 +02:00
Flyinghead e537d92bcc ssa: don't simplify FPU ops because of Inf of NaN 2019-06-12 08:52:42 +02:00
Flyinghead ff745ee4fe fix xtrct canonical implementation 2019-06-10 19:17:24 +02:00
Flyinghead 3dd16e80d2 arm64 and x64 recs use ssa regalloc 2019-06-10 13:57:10 +02:00
Flyinghead 623d70d710 ssa register allocator and more ssa stuff 2019-06-09 19:41:42 +02:00
Flyinghead bd30752b86 Use auto& to avoid copy when iterating. Inline mmu_Read/WriteMemNoEx 2019-06-08 13:04:35 +02:00
Flyinghead 0890150dda dynarec: ssa missing changes 2019-06-04 21:27:45 +02:00
Flyinghead 692556ca5d dynarec: ssa initial commit 2019-06-04 21:20:34 +02:00
Flyinghead 51cf6cf271 regalloc: handle mem ops differently in wince mode 
Flush all current writeback spans before the op
Flush instead of killing spans in case the mem access throws an
exception
Some optimizations
 2019-05-28 19:37:24 +02:00
Flyinghead c6e92028f2 regalloc: cleanup. no functional change 2019-05-27 22:44:51 +02:00
Flyinghead 5b2cef3fdd dynarec: add negc and xtrct op codes 
native implementation of negc and xtrct for x64 and arm64
rec-arm64: pass exception pc in w27 instead of sh4 context
inline mmu_intruction_translation() and clean up
 2019-05-26 13:30:05 +02:00
Flyinghead 2c91ca96fc rec-arm64: fix transitions to/from mmu 
exit mainloop() before regenerating it
make sure dynarec cache is cleared between runs
when deserializing, clear dynarec cache after setting mmu state
 2019-05-25 18:03:18 +02:00
Flyinghead e3d95f2258 wince: unify _vmem and vmem32. Use 4GB virtual space on 64-bit arch 
On 64-bit architectures, _vmem first tries to allocate 4GB then falls
back to 512 MB.
The same virtual space is now used by _vmem and vmem32 (mmu)
 2019-05-23 11:40:33 +02:00
Flyinghead 5b7d07315b wince: clean up unused stuff 2019-05-22 15:15:53 +02:00
Flyinghead c2c0215e1b Merge remote-tracking branch 'origin/master' into fh/wince-dynarec 2019-05-22 14:13:00 +02:00
Flyinghead fb76efb08d Standard functions for virtual mem alloc/protect/map/... 2019-05-22 11:41:12 +02:00
flyinghead 66cbc0acf6 wince: dynarec boost 1.2 -> 1.5 2019-05-15 15:26:08 +02:00
Flyinghead 2434d0183e wince: better sh4 instr cycle counting. Don't hash blocks if mmu on 
Use actual instr latency cycles, including fp instr
Decrease the WinCE boost ratio to 1.2
Don't hash blocks when mmu on
 2019-05-14 12:38:56 +02:00
David Guillen Fandos 65e2218792 Fix ARM64 rewrites with NO_RWX_PAGES 
Tested on nvidia jetson and Android, so far works great.
 2019-05-13 00:23:18 +02:00
David Guillen Fandos 3b760f9869 Add FEAT_NO_RWX_PAGES and implement it for x64 CPU (Win and Linux) 
Tested: Both with and without the feature, works only for x64 CPUs for
now, but supported in both windows and linux (see vmem implementation
for it, using mem-mapped files).
 2019-05-12 22:02:57 +02:00
David Guillen Fandos 1a2b1c8672 Remove traces of memory manager from Jit driver. 
Still stuff to be removed in the Naomi file handler and the ARM
AREC, which need to get ported to the new vmem interface.
 2019-05-12 19:47:11 +02:00
David Guillen Fandos be1ecbaa8b Fix TARGET_NO_NVMEM and deprecate TARGET_NO_EXCEPTIONS 
Linked them both toghether since you can't really define one and
not the other (plus Linux honors one windows the other in some
cases).
More refactoring on this area to follow.
 2019-05-10 18:57:28 +02:00
Flyinghead 810b8a59da wince: 32-bit virtual mem space 
use fast mem read/write for x64 and arm64 dynarecs
 2019-04-29 18:23:00 +02:00
Flyinghead 6b78e1f879 fix dynarec regression 2019-04-28 20:41:39 +02:00
Flyinghead 553f6054ce NO_MMU build fixes 2019-04-19 11:56:11 +02:00
Flyinghead 9920880987 dynarec: reserve code cache space for frequently changing blocks 
detect frequent SMC check failures and use a specific code cache area
for these blocks.
flush the temp area when full but keep the main code cache area
 2019-04-19 11:45:05 +02:00
Flyinghead 76348b13ce wince: use cpu ratio of 2 in dynarec 2019-04-19 09:58:25 +02:00
Flyinghead d68da6bdd4 wince: let fp disable exception run before compiling a block 2019-04-18 13:55:10 +02:00
Flyinghead dece3fc13e wince: use setjmp/longjmp instead of try/catch for dynarecs 
WinCE fast mmu implementation
WIP arm64 dynarec
 2019-04-15 18:02:34 +02:00
david miller cc9d5ec55b CMake/Master working, tested on windows with Clang && MSC (x86,x64) 2019-04-12 16:59:39 -04:00
David Miller 3d1b82854e
Merge branch 'master' into fh/win32-winresize 2019-04-12 13:03:30 -04:00
flyinghead 7f0489ff28 visual studio compatibility 
no modem support
no zip or 7z support so no naomi for now
hacked a .asm file as vs doesn't support inline assembly -> code dup
 2019-03-30 19:26:05 +01:00
Flyinghead 505c5b6c4d dynarec: FullCheck was being ignored and FastCheck used instead 
Fix crash on arm32
Fix infinite loop on x64
 2019-03-30 10:06:19 +01:00
Stefanos Kornilios Mitsis Poiitidis af6993a819 dynarec: Refactor smc-option a bit 2019-03-30 07:16:44 +01:00
Flyinghead 6438a402df dynarec: add option to control smc code checks: none, fast, full 2019-03-29 19:23:37 +01:00
Flyinghead c809c6c56f Merge branch 'fh/mymaster' into fh/master-merge 2019-03-25 16:47:47 +01:00
Flyinghead ba00da2420 dynarec: don't throw exceptions if NO_MMU 2019-03-25 13:53:49 +01:00
Flyinghead ef43883fb5 dynarec: WinCE support WIP 
Only for the x64 dynarec atm
Bugs remaining
 2019-03-25 11:53:13 +01:00
Flyinghead a21eedc88a implement fpu disable exception and other interp and mmu fixes 
implement sh4 fpu disable exception
implement assistance/PTEA MMU registers
fix some sh4 ops with side effect in interpreter
account for delay slot op cycles
avoid any side effect when using wince tracer
extract SH4_TIMESLICE to single header file (still not used by arm and
x86 recs)
 2019-03-19 21:35:55 +01:00
Flyinghead 89c2fd54a9 fix function name typo 2019-03-13 20:04:14 +01:00
Flyinghead 35bb81b195 fix some printf format strings 2019-02-16 14:16:50 +01:00
flyinghead 3cdd39170d win32: call os_DoEvents on the emu/main thread and other fixes 2019-02-07 19:20:10 +01:00
Flyinghead 0cce6cc5a5 Clean up and comments. No functional change 2019-01-24 09:40:14 +01:00
Flyinghead cd4e4cbdc9 x64 dynarec: check if extension is supported by cpu. seh on win32 
Check if FMA/AVX/SSE3 is supported before using it
fully naked main loop in win32 with proper seh directives
win32: more xmm regs to allocate and no need to save them when calling
out
 2019-01-18 17:02:50 +01:00
Flyinghead f852480b88 OSX: build fix 2019-01-16 14:44:40 +01:00
Flyinghead cb8e81d473 arm64: direct memory access and jit rewrite 
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
 2019-01-16 13:04:16 +01:00
Flyinghead c2a048e8d8 arm64: use explode_spans to allocate regs for V2 and F64 params 2019-01-15 08:47:07 +01:00