Eliminate duplicate code for immediate memory read/write in all dynarecs
Simplify PREF to use do_sqw_nommu even for simple SQ remap
Check for address errors before mmu translation
Get rid of unneeded template params in mmu translation funcs
* cmake: use c++17
* Use std::size
* Use std::make_unique
* Use std::clamp
* Use structured binding
* Use [[fallthrough]]
* Use enable_if_t/is_enum_v/is_integral_v/is_same_v
* Use if constexpr
* Use try_emplace
* Use auto for iterators
* Use inline variables
New serialize framework. Refactor serialization into modules.
Maple dma xfer must not be executed immediately. Delay until interrupt
is raised.
Fixes Geist Force freeze at start.
on-chip ram area isn't translated in both user and supervisor modes
vmem: return 0 for non-mapped region reads
Fixes dolphin blue crash/freeze. Issue #62
Fixes Resident Evil - Code Veronica X (Chris) floor 1F crash
Fix per-game settings (Issue #115)
Automatic load/save state (Issue #173)
Reload Naomi/AW BIOS after per-game settings are loaded to allow
per-game BIOS region. (Issue #96)
Restrict Soul Reaver widescreen cheat to the EU version (Issue #188)
Disable UI elements for overridden settings
Clean up/simplify legacy Naomi ROM loading
save AW cart state
save sq_remap used for mini-mmu with store queues
allow loading lr aw savestate. upgrade to v11
aica: saturate EG register
savestate: save current TA data
texcache: fix race condition when deleting a texture
handle 1x1 YUV tex as 565
o/icache use C and WT bits from mmu to override cache and copy back
settings (fixes Windows CE)
move mem handlers setup out of mmu into sh4_mem. Call in dc_resume and
detect transitions interp -> dynarec to flush caches.
fix ssa tlb miss exception wih slow mmu
ignore SR.RB in user mode instead of forcing it 0
add STRICT_MODE to enable ocache in interpreter
don't flush mmu table when enabling it
fix fixNan64()
native implementation of negc and xtrct for x64 and arm64
rec-arm64: pass exception pc in w27 instead of sh4 context
inline mmu_intruction_translation() and clean up
implement sh4 fpu disable exception
implement assistance/PTEA MMU registers
fix some sh4 ops with side effect in interpreter
account for delay slot op cycles
avoid any side effect when using wince tracer
extract SH4_TIMESLICE to single header file (still not used by arm and
x86 recs)
- Rewrite mem ops to only modify regs after exception path
- Throw & catch logic for interpreter that raises the exception
- Re-enabled some commented mmu code
Flyinghead