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holly: use new logging

This commit is contained in:
Flyinghead 2019-06-30 23:02:26 +02:00
parent 58e1c68eb8
commit fcc6fd784c
3 changed files with 19 additions and 18 deletions
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12
core/hw/aica/sgc_if.cpp
View File

@ -501,7 +501,7 @@ struct ChannelEx
{
if (AEG.state!=EG_Release)
{
key_printf("[%p] KEY_OFF -> Release\n", this);
key_printf("[%p] KEY_OFF -> Release", this);
SetAegState(EG_Release);
//switch to release state
}
@ -862,7 +862,7 @@ void StreamStep(ChannelEx* ch)
if ((ch->AEG.state==EG_Attack) && (CA>=ch->loop.LSA))
{
step_printf("[%p]LPSLNK : Switching to EG_Decay1 %X\n", ch, ch->AEG.GetValue());
step_printf("[%p]LPSLNK : Switching to EG_Decay1 %X", ch, ch->AEG.GetValue());
ch->SetAegState(EG_Decay1);
}
}
@ -963,7 +963,7 @@ void AegStep(ChannelEx* ch)
ch->AEG.SetValue(0);
if (!ch->ccd->LPSLNK)
{
aeg_printf("[%p]AEG_step : Switching to EG_Decay1 %d\n", ch, ch->AEG.GetValue());
aeg_printf("[%p]AEG_step : Switching to EG_Decay1 %d", ch, ch->AEG.GetValue());
ch->SetAegState(EG_Decay1);
}
}
@ -975,7 +975,7 @@ void AegStep(ChannelEx* ch)
ch->AEG.val+=ch->AEG.Decay1Rate;
if (((u32)ch->AEG.GetValue())>=ch->AEG.Decay2Value)
{
aeg_printf("[%p]AEG_step : Switching to EG_Decay2 @ %x\n", ch, ch->AEG.GetValue());
aeg_printf("[%p]AEG_step : Switching to EG_Decay2 @ %x", ch, ch->AEG.GetValue());
ch->SetAegState(EG_Decay2);
}
}
@ -986,7 +986,7 @@ void AegStep(ChannelEx* ch)
ch->AEG.val+=ch->AEG.Decay2Rate;
if (ch->AEG.GetValue()>=0x3FF)
{
aeg_printf("[%p]AEG_step : Switching to EG_Release @ %x\n", ch, ch->AEG.GetValue());
aeg_printf("[%p]AEG_step : Switching to EG_Release @ %x", ch, ch->AEG.GetValue());
ch->AEG.SetValue(0x3FF);
ch->SetAegState(EG_Release);
}
@ -998,7 +998,7 @@ void AegStep(ChannelEx* ch)
if (ch->AEG.GetValue()>=0x3FF)
{
aeg_printf("[%p]AEG_step : EG_Release End @ %x\n", ch, ch->AEG.GetValue());
aeg_printf("[%p]AEG_step : EG_Release End @ %x", ch, ch->AEG.GetValue());
ch->AEG.SetValue(0x3FF); // TODO: mnn, should we do anything about it running wild ?
ch->disable(); // TODO: Is this ok here? It's a speed optimisation (since the channel is muted)
}

12
core/hw/holly/sb.cpp
View File

@ -35,7 +35,7 @@ u32 sb_ReadMem(u32 addr,u32 sz)
#ifdef TRACE
if (offset & 3/*(size-1)*/) //4 is min align size
{
EMUERROR("Unaligned System Bus register read");
INFO_LOG(HOLLY, "Unaligned System Bus register read");
}
#endif
@ -59,7 +59,7 @@ u32 sb_ReadMem(u32 addr,u32 sz)
//printf("SB: %08X\n",addr);
if ((sb_regs[offset].flags & REG_WO) || sb_regs[offset].readFunctionAddr == NULL)
{
EMUERROR("sb_ReadMem write-only reg %08x %d\n", addr, sz);
INFO_LOG(HOLLY, "sb_ReadMem write-only reg %08x %d", addr, sz);
return 0;
}
return sb_regs[offset].readFunctionAddr(addr);
@ -69,7 +69,7 @@ u32 sb_ReadMem(u32 addr,u32 sz)
else
{
if (!(sb_regs[offset].flags& REG_NOT_IMPL))
EMUERROR("ERROR [wrong size read on register]");
INFO_LOG(HOLLY, "ERROR [wrong size read on register]");
}
#endif
// if ((sb_regs[offset].flags& REG_NOT_IMPL))
@ -83,7 +83,7 @@ void sb_WriteMem(u32 addr,u32 data,u32 sz)
#ifdef TRACE
if (offset & 3/*(size-1)*/) //4 is min align size
{
EMUERROR("Unaligned System bus register write");
INFO_LOG(HOLLY, "Unaligned System bus register write");
}
#endif
offset>>=2;
@ -128,10 +128,10 @@ offset>>=2;
else
{
if (!(sb_regs[offset].flags& REG_NOT_IMPL))
EMUERROR4("ERROR :wrong size write on register ; offset=%x , data=%x,sz=%d",offset,data,sz);
INFO_LOG(HOLLY, "ERROR: wrong size write on register; offset=%x, data=%x, sz=%d", offset, data, sz);
}
if ((sb_regs[offset].flags& REG_NOT_IMPL))
EMUERROR3("Write to System Control Regs , not implemented , addr=%x,data=%x",addr,data);
INFO_LOG(HOLLY, "Write to System Control Regs, not implemented, addr=%x, data=%x", addr, data);
#endif
}

13
core/hw/holly/sb_mem.cpp
View File

@ -56,10 +56,11 @@ bool LoadRomFiles(const string& root)
{
if (NVR_OPTIONAL)
{
printf("flash/nvmem is missing, will create new file...\n");
INFO_LOG(FLASHROM, "flash/nvmem is missing, will create new file...");
}
else
{
ERROR_LOG(FLASHROM, "Unable to find flash/nvmem in %s. Exiting...", root.c_str());
msgboxf("Unable to find flash/nvmem in \n%s\nExiting...", MBX_ICONERROR, root.c_str());
return false;
}
@ -86,7 +87,7 @@ bool LoadRomFiles(const string& root)
syscfg.lang = settings.dreamcast.language;
if (sys_nvmem.WriteBlock(FLASH_PT_USER, FLASH_USER_SYSCFG, &syscfg) != 1)
printf("Failed to save time and language to flash RAM\n");
WARN_LOG(FLASHROM, "Failed to save time and language to flash RAM");
#endif
@ -111,7 +112,7 @@ void SaveRomFiles(const string& root)
bool LoadHle(const string& root) {
if (!sys_nvmem.Load(root, ROM_PREFIX, "%nvmem.bin;%flash_wb.bin;%flash.bin;%flash.bin.bin", "nvram")) {
printf("No nvmem loaded\n");
INFO_LOG(FLASHROM, "No nvmem loaded");
}
return reios_init(sys_rom.data, sys_nvmem.data);
@ -123,7 +124,7 @@ void WriteFlash(u32 addr,u32 data,u32 sz) { sys_nvmem.Write(addr,data,sz); }
#if (DC_PLATFORM == DC_PLATFORM_DREAMCAST) || (DC_PLATFORM == DC_PLATFORM_DEV_UNIT) || (DC_PLATFORM == DC_PLATFORM_NAOMI) || (DC_PLATFORM == DC_PLATFORM_NAOMI2)
u32 ReadBios(u32 addr,u32 sz) { return sys_rom.Read(addr,sz); }
void WriteBios(u32 addr,u32 data,u32 sz) { EMUERROR4("Write to [Boot ROM] is not possible, addr=%x,data=%x,size=%d",addr,data,sz); }
void WriteBios(u32 addr,u32 data,u32 sz) { INFO_LOG(MEMORY, "Write to [Boot ROM] is not possible, addr=%x, data=%x, size=%d", addr, data, sz); }
#elif (DC_PLATFORM == DC_PLATFORM_ATOMISWAVE)
u32 ReadBios(u32 addr,u32 sz)
@ -135,7 +136,7 @@ void WriteBios(u32 addr,u32 data,u32 sz) { EMUERROR4("Write to [Boot ROM] is not
{
if (sz != 1)
{
EMUERROR("Invalid access size @%08x data %x sz %d\n", addr, data, sz);
INFO_LOG(MEMORY, "Invalid access size @%08x data %x sz %d", addr, data, sz);
return;
}
sys_rom.Write(addr, data, sz);
@ -192,7 +193,7 @@ T DYNACALL ReadMem_area0(u32 addr)
{
if ( /*&& (addr>= 0x00400000)*/ (addr<= 0x005F67FF)) // :Unassigned
{
EMUERROR2("Read from area0_32 not implemented [Unassigned], addr=%x",addr);
INFO_LOG(MEMORY, "Read from area0_32 not implemented [Unassigned], addr=%x", addr);
}
else if ((addr>= 0x005F7000) && (addr<= 0x005F70FF)) // GD-ROM
{