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proper hard reset of sh4 mm registers 

more clean up
This commit is contained in:
Flyinghead 2019-09-01 23:10:04 +02:00
parent aadc9c3bfc
commit ee1ee56824
18 changed files with 133 additions and 206 deletions
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2
core/hw/aica/aica.cpp
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@ -200,7 +200,7 @@ s32 libAICA_Init()
sgc_Init();
return rv_ok;
return 0;
}
void libAICA_Reset(bool hard)

4
core/hw/aica/aica_if.cpp
View File

@ -342,8 +342,6 @@ void aica_sb_Init()
//NRM
//6
sb_rio_register(SB_ADST_addr,RIO_WF,0,&Write_SB_ADST);
//sb_regs[((SB_ADST_addr-SB_BASE)>>2)].flags=REG_32BIT_READWRITE | REG_READ_DATA;
//sb_regs[((SB_ADST_addr-SB_BASE)>>2)].writeFunction=Write_SB_ADST;
//I really need to implement G2 dma (and rest dmas actually) properly
//THIS IS NOT AICA, its G2-EXT (BBA)
@ -352,8 +350,6 @@ void aica_sb_Init()
sb_rio_register(SB_E2ST_addr,RIO_WF,0,&Write_SB_E2ST);
sb_rio_register(SB_DDST_addr,RIO_WF,0,&Write_SB_DDST);
//sb_regs[((SB_E1ST_addr-SB_BASE)>>2)].flags=REG_32BIT_READWRITE | REG_READ_DATA;
//sb_regs[((SB_E1ST_addr-SB_BASE)>>2)].writeFunction=Write_SB_E1ST;
dma_sched_id = sh4_sched_register(0, &dma_end_sched);
}

79
core/hw/arm7/arm7.h
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@ -8,5 +8,84 @@ void arm_SetEnabled(bool enabled);
#define arm_sh4_bias (2)
enum
{
RN_CPSR = 16,
RN_SPSR = 17,
R13_IRQ = 18,
R14_IRQ = 19,
SPSR_IRQ = 20,
R13_USR = 26,
R14_USR = 27,
R13_SVC = 28,
R14_SVC = 29,
SPSR_SVC = 30,
R13_ABT = 31,
R14_ABT = 32,
SPSR_ABT = 33,
R13_UND = 34,
R14_UND = 35,
SPSR_UND = 36,
R8_FIQ = 37,
R9_FIQ = 38,
R10_FIQ = 39,
R11_FIQ = 40,
R12_FIQ = 41,
R13_FIQ = 42,
R14_FIQ = 43,
SPSR_FIQ = 44,
RN_PSR_FLAGS = 45,
R15_ARM_NEXT = 46,
INTR_PEND = 47,
CYCL_CNT = 48,
RN_ARM_REG_COUNT,
};
typedef union
{
struct
{
u8 B0;
u8 B1;
u8 B2;
u8 B3;
} B;
struct
{
u16 W0;
u16 W1;
} W;
union
{
struct
{
u32 _pad0 : 28;
u32 V : 1; //Bit 28
u32 C : 1; //Bit 29
u32 Z : 1; //Bit 30
u32 N : 1; //Bit 31
};
struct
{
u32 _pad1 : 28;
u32 NZCV : 4; //Bits [31:28]
};
} FLG;
struct
{
u32 M : 5; //mode, PSR[4:0]
u32 _pad0 : 1; //not used / zero
u32 F : 1; //FIQ disable, PSR[6]
u32 I : 1; //IRQ disable, PSR[7]
u32 _pad1 : 20; //not used / zero
u32 NZCV : 4; //Bits [31:28]
} PSR;
u32 I;
} reg_pair;

2
core/hw/arm7/vbaARM.cpp
View File

@ -11,7 +11,7 @@ s32 libARM_Init()
{
arm_Init();
return rv_ok;
return 0;
}
//called when plugin is unloaded by emu, only if dcInit is called (eg, not called to enumerate plugins)

5
core/hw/holly/sb.cpp
View File

@ -613,10 +613,7 @@ void sb_Reset(bool hard)
if (hard)
{
for (u32 i = 0; i < sb_regs.Size; i++)
{
if (!(sb_regs[i].flags & (REG_RO|REG_WO|REG_RF)))
sb_regs[i].data32 = 0;
}
sb_regs[i].reset();
}
SB_ISTNRM = 0;
SB_FFST_rc = 0;

11
core/hw/maple/maple_if.cpp
View File

@ -241,18 +241,7 @@ void maple_Init()
{
sb_rio_register(SB_MDST_addr,RIO_WF,0,&maple_SB_MDST_Write);
sb_rio_register(SB_MDEN_addr,RIO_WF,0,&maple_SB_MDEN_Write);
/*
sb_regs[(SB_MDST_addr-SB_BASE)>>2].flags=REG_32BIT_READWRITE | REG_READ_DATA;
sb_regs[(SB_MDST_addr-SB_BASE)>>2].writeFunction=maple_SB_MDST_Write;
*/
sb_rio_register(SB_MSHTCL_addr,RIO_WF,0,&maple_SB_MSHTCL_Write);
/*
sb_regs[(SB_MSHTCL_addr-SB_BASE)>>2].flags=REG_32BIT_READWRITE;
sb_regs[(SB_MSHTCL_addr-SB_BASE)>>2].writeFunction=maple_SB_MSHTCL_Write;
*/
maple_schid=sh4_sched_register(0,&maple_schd);
}

4
core/hw/pvr/drkPvr.cpp
View File

@ -36,10 +36,10 @@ s32 libPvr_Init()
if (!spg_Init())
{
//failed
return rv_error;
return -1;
}
return rv_ok;
return 0;
}
//called when exiting from sh4 thread , from the new thread context (for any thread specific de init) :P

4
core/hw/pvr/drkPvr.h
View File

@ -9,8 +9,6 @@
#include <stdio.h>
#include <string.h>
#define fverify verify
#include "helper_classes.h"
extern int render_end_schid;
extern int render_end_schid;

2
core/hw/sh4/sh4_mem.cpp
View File

@ -204,7 +204,7 @@ void mem_Reset(bool hard)
//Reset registers
sh4_area0_Reset(hard);
sh4_mmr_reset();
sh4_mmr_reset(hard);
MMU_reset();
}

28
core/hw/sh4/sh4_mmr.cpp
View File

@ -824,8 +824,34 @@ void sh4_mmr_init()
ubc_init();
}
void sh4_mmr_reset()
void sh4_mmr_reset(bool hard)
{
if (hard)
{
for (int i = 0; i < 30; i++)
{
if (i < CCN.Size)
CCN[i].reset();
if (i < UBC.Size)
UBC[i].reset();
if (i < BSC.Size)
BSC[i].reset();
if (i < DMAC.Size)
DMAC[i].reset();
if (i < CPG.Size)
CPG[i].reset();
if (i < RTC.Size)
RTC[i].reset();
if (i < INTC.Size)
INTC[i].reset();
if (i < TMU.Size)
TMU[i].reset();
if (i < SCI.Size)
SCI[i].reset();
if (i < SCIF.Size)
SCIF[i].reset();
}
}
OnChipRAM.Zero();
//Reset register values
bsc_reset();

2
core/hw/sh4/sh4_mmr.h
View File

@ -35,7 +35,7 @@ void DYNACALL WriteMem_sq_32(u32 address,u32 data);*/
//Init/Res/Term
void sh4_mmr_init();
void sh4_mmr_reset();
void sh4_mmr_reset(bool hard);
void sh4_mmr_term();
void sh4_rio_reg(Array<RegisterStruct>& arr, u32 addr, RegIO flags, u32 sz, RegReadAddrFP* rp=0, RegWriteAddrFP* wp=0);

2
core/imgread/ImgReader.cpp
View File

@ -81,7 +81,7 @@ s32 libGDR_Init()
{
libCore_gdrom_disc_change();
settings.imgread.PatchRegion = true;
return rv_ok;
return 0;
}
//called when exiting from sh4 thread , from the new thread context (for any thread specific init) :P

4
core/log/ConsoleListenerDroid.cpp
View File

@ -8,6 +8,10 @@
#include "types.h"
#include "ConsoleListener.h"
#ifndef LOG_TAG
#define LOG_TAG "flycast"
#endif
ConsoleListener::ConsoleListener()
{
}

2
core/nullDC.cpp
View File

@ -109,7 +109,7 @@ s32 plugins_Init()
if (s32 rv = libARM_Init())
return rv;
return rv_ok;
return 0;
}
void plugins_Term()

2
core/oslib/audiobackend_directsound.cpp
View File

@ -4,6 +4,8 @@
#include <initguid.h>
#include <dsound.h>
#define verifyc(x) verify(!FAILED(x))
void* SoundThread(void* param);
#define V2_BUFFERSZ (16*1024)

1
core/serialize.cpp
View File

@ -4,6 +4,7 @@
#include "hw/aica/dsp.h"
#include "hw/aica/aica.h"
#include "hw/aica/sgc_if.h"
#include "hw/arm7/arm7.h"
#include "hw/holly/sb_mem.h"
#include "hw/flashrom/flashrom.h"
#include "hw/mem/_vmem.h"

184
core/types.h
View File

@ -16,7 +16,6 @@
#if HOST_CPU == CPU_X86
#ifdef _MSC_VER
#define DYNACALL __fastcall
#else
@ -45,11 +44,7 @@
//unused parameters
#pragma warning( disable : 4100)
#endif
#ifdef _MSC_VER
//SHUT UP M$ COMPILER !@#!@$#
#ifdef _CRT_SECURE_CPP_OVERLOAD_STANDARD_NAMES
#undef _CRT_SECURE_CPP_OVERLOAD_STANDARD_NAMES
@ -103,17 +98,12 @@ typedef u64 unat;
typedef char wchar;
#define EXPORT extern "C" __declspec(dllexport)
#ifndef CDECL
#define CDECL __cdecl
#endif
//intc function pointer and enums
enum HollyInterruptType
{
@ -204,26 +194,6 @@ struct vram_block
void* userdata;
};
enum ndc_error_codes
{
rv_ok = 0, //no error
rv_cli_finish=69, //clean exit after -help or -version , should we just use rv_ok?
rv_error=-2, //error
rv_serror=-1, //silent error , it has been reported to the user
};
//Simple struct to store window rect ;)
//Top is 0,0 & numbers are in pixels.
//Only client size
struct NDC_WINDOW_RECT
{
u32 width;
u32 height;
};
////////////////////////////////////////////////////////////////////////////////////////////////////////////
//******************************************************
@ -259,11 +229,6 @@ enum DiskArea
DoubleDensity
};
enum DriveEvent
{
DiskChange=1 //disk ejected/changed
};
//******************************************************
//************************ AICA ************************
//******************************************************
@ -348,90 +313,6 @@ bool dc_unserialize(void **data, unsigned int *total_size);
#define REICAST_SA(v_arr,num) rc_serialize((v_arr), sizeof((v_arr)[0])*(num), data, total_size)
#define REICAST_USA(v_arr,num) rc_unserialize((v_arr), sizeof((v_arr)[0])*(num), data, total_size)
enum
{
RN_CPSR = 16,
RN_SPSR = 17,
R13_IRQ = 18,
R14_IRQ = 19,
SPSR_IRQ = 20,
R13_USR = 26,
R14_USR = 27,
R13_SVC = 28,
R14_SVC = 29,
SPSR_SVC = 30,
R13_ABT = 31,
R14_ABT = 32,
SPSR_ABT = 33,
R13_UND = 34,
R14_UND = 35,
SPSR_UND = 36,
R8_FIQ = 37,
R9_FIQ = 38,
R10_FIQ = 39,
R11_FIQ = 40,
R12_FIQ = 41,
R13_FIQ = 42,
R14_FIQ = 43,
SPSR_FIQ = 44,
RN_PSR_FLAGS = 45,
R15_ARM_NEXT = 46,
INTR_PEND = 47,
CYCL_CNT = 48,
RN_ARM_REG_COUNT,
};
typedef union
{
struct
{
u8 B0;
u8 B1;
u8 B2;
u8 B3;
} B;
struct
{
u16 W0;
u16 W1;
} W;
union
{
struct
{
u32 _pad0 : 28;
u32 V : 1; //Bit 28
u32 C : 1; //Bit 29
u32 Z : 1; //Bit 30
u32 N : 1; //Bit 31
};
struct
{
u32 _pad1 : 28;
u32 NZCV : 4; //Bits [31:28]
};
} FLG;
struct
{
u32 M : 5; //mode, PSR[4:0]
u32 _pad0 : 1; //not used / zero
u32 F : 1; //FIQ disable, PSR[6]
u32 I : 1; //IRQ disable, PSR[7]
u32 _pad1 : 20; //not used / zero
u32 NZCV : 4; //Bits [31:28]
} PSR;
u32 I;
} reg_pair;
#if COMPILER_VC_OR_CLANG_WIN32
#pragma warning( disable : 4127 4996 /*4244*/)
@ -447,15 +328,10 @@ typedef union
#define die(reason) { dbgbreak; }
#endif
#define fverify verify
//will be removed sometime soon
//This shit needs to be moved to proper headers
typedef u32 RegReadFP();
typedef u32 RegReadAddrFP(u32 addr);
typedef void RegWriteFP(u32 data);
typedef void RegWriteAddrFP(u32 addr, u32 data);
/*
@ -503,17 +379,18 @@ struct RegisterStruct
u16 data16; //stores data of reg variable [if used] 16b
u8 data8; //stores data of reg variable [if used] 8b
RegReadFP* readFunction; //stored pointer to reg read function
RegReadAddrFP* readFunctionAddr;
RegReadAddrFP* readFunctionAddr; //stored pointer to reg read function
};
union
{
RegWriteFP* writeFunction; //stored pointer to reg write function
RegWriteAddrFP* writeFunctionAddr;
};
RegWriteAddrFP* writeFunctionAddr; //stored pointer to reg write function
u32 flags; //Access flags !
void reset()
{
if (!(flags & (REG_RO | REG_RF)))
data32 = 0;
}
};
enum SmcCheckEnum {
@ -690,45 +567,12 @@ void InitSettings();
void LoadSettings(bool game_specific);
void SaveSettings();
u32 GetRTC_now();
extern u32 patchRB;
inline bool is_s8(u32 v) { return (s8)v==(s32)v; }
inline bool is_u8(u32 v) { return (u8)v==(s32)v; }
inline bool is_s16(u32 v) { return (s16)v==(s32)v; }
inline bool is_u16(u32 v) { return (u16)v==(u32)v; }
#define verifyc(x) verify(!FAILED(x))
static inline void do_nada(...) { }
#ifdef __ANDROID__
#include <android/log.h>
#ifdef printf
#undef printf
#endif
#ifdef puts
#undef puts
#endif
#define LOG_TAG "flycast"
#define LOGI(...) __android_log_print(ANDROID_LOG_INFO,LOG_TAG,__VA_ARGS__)
#define LOGW(...) __android_log_print(ANDROID_LOG_WARN,LOG_TAG,__VA_ARGS__)
#define LOGE(...) __android_log_print(ANDROID_LOG_ERROR,LOG_TAG,__VA_ARGS__)
#define LOGD(...) __android_log_print(ANDROID_LOG_DEBUG,LOG_TAG,__VA_ARGS__)
#ifdef STRIP_TEXT
#define puts do_nada
#define printf do_nada
#else
#define puts LOGI
#define printf LOGI
#endif
#define putinf LOGI
#endif
#include "hw/sh4/sh4_if.h"
//more to come
@ -745,11 +589,6 @@ s32 libPvr_Init();
void libPvr_Reset(bool Manual);
void libPvr_Term();
//void DYNACALL libPvr_TaSQ(u32* data); //size is 32 byte transfer counts
u32 libPvr_ReadReg(u32 addr,u32 size);
void libPvr_WriteReg(u32 addr,u32 data,u32 size);
void libPvr_LockedBlockWrite(vram_block* block,u32 addr); //set to 0 if not used
void* libPvr_GetRenderTarget();
@ -757,15 +596,12 @@ void* libPvr_GetRenderSurface();
//AICA
s32 libAICA_Init();
void libAICA_Reset(bool Manual);
void libAICA_Reset(bool hard);
void libAICA_Term();
u32 libAICA_ReadReg(u32 addr,u32 size);
void libAICA_WriteReg(u32 addr,u32 data,u32 size);
u32 libAICA_ReadMem_aica_ram(u32 addr,u32 size);
void libAICA_WriteMem_aica_ram(u32 addr,u32 data,u32 size);
void libAICA_Update(u32 cycles); //called every ~1800 cycles, set to 0 if not used
@ -829,7 +665,7 @@ struct OnLoad
};
#ifndef ARRAY_SIZE
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#endif
class ReicastException

1
shell/android-studio/reicast/src/main/jni/src/Android.cpp
View File

@ -196,7 +196,6 @@ void os_SetupInput()
void os_SetWindowText(char const *Text)
{
putinf("%s",Text);
}
JNIEXPORT jstring JNICALL Java_com_reicast_emulator_emu_JNIdc_initEnvironment(JNIEnv *env, jobject obj, jobject emulator, jstring homeDirectory)