Aica: fix ARM and x86 dynarecs for unaligned branch op

Fixes sound issue in Spikers Battle
Tentative implementation of x86 rec asm functions on linux
clean up
This commit is contained in:
Flyinghead 2018-10-20 13:59:12 +02:00
parent 431b3e4324
commit e31a1ddf71
3 changed files with 89 additions and 50 deletions

View File

@ -82,6 +82,8 @@ void CPUUpdateFlags();
void CPUSoftwareInterrupt(int comment);
void CPUUndefinedException();
#if FEAT_AREC == DYNAREC_NONE
void arm_Run_(u32 CycleCount)
{
if (!Arm7Enabled)
@ -100,8 +102,7 @@ void arm_Run_(u32 CycleCount)
}
}
void CPUInterrupt();
#endif
void armt_init();
//void CreateTables();
@ -410,22 +411,6 @@ void arm_SetEnabled(bool enabled)
//Emulate a single arm op, passed in opcode
//DYNACALL for ECX passing
u32 DYNACALL arm_single_op(u32 opcode)
{
u32 clockTicks=0;
#define NO_OPCODE_READ
//u32 static_opcode=((opcd_hash&0xFFF0)<<16) | ((opcd_hash&0x000F)<<4);
//u32 static_opcode=((opcd_hash)<<28);
#include "arm-new.h"
return clockTicks;
}
void update_armintc()
{
reg[INTR_PEND].I=e68k_out && armFiqEnable;
@ -441,9 +426,30 @@ void arm_Run(u32 CycleCount) {
libAICA_TimeStep();
}
}
#else
#else // FEAT_AREC != DYNAREC_NONE
#if HOST_OS == OS_LINUX || HOST_OS == OS_DARWIN
#include <sys/mman.h>
#endif
extern "C" void CompileCode();
//Emulate a single arm op, passed in opcode
//DYNACALL for ECX passing
u32 DYNACALL arm_single_op(u32 opcode)
{
u32 clockTicks=0;
#define NO_OPCODE_READ
//u32 static_opcode=((opcd_hash&0xFFF0)<<16) | ((opcd_hash&0x000F)<<4);
//u32 static_opcode=((opcd_hash)<<28);
#include "arm-new.h"
return clockTicks;
}
/*
ARM
@ -1381,16 +1387,37 @@ void armv_prof(OpType opt,u32 op,u32 flags)
naked void DYNACALL arm_compilecode()
{
#if HOST_OS == OS_LINUX
__asm ( "call CompileCode \n\t"
"mov 0, %%eax \n\t"
"jmp arm_dispatch"
:
:
: "eax"
);
#else
__asm
{
call CompileCode;
mov eax,0;
jmp arm_dispatch;
}
#endif
}
naked void DYNACALL arm_mainloop(u32 cycl, void* regs, void* entrypoints)
{
#if HOST_OS == OS_LINUX
__asm ( "push %%esi \n\t"
"mov %%ecx, %%esi \n\t"
"add %0, %%esi \n\t"
"mov 0, %%eax \n\t"
"jmp arm_dispatch"
:
: "im" (reg[CYCL_CNT * 4].I)
//: "esi", "eax"
);
#else
__asm
{
push esi
@ -1401,10 +1428,33 @@ naked void DYNACALL arm_mainloop(u32 cycl, void* regs, void* entrypoints)
mov eax,0;
jmp arm_dispatch
}
#endif
}
naked void arm_dispatch()
{
#if HOST_OS == OS_LINUX
arm_disp:
__asm goto ( "mov %0, %%eax \n\t"
"and 0x1FFFFC, %%eax \n\t"
"cmp %1, 0 \n\t"
"jne arm_dofiq \n\t"
//FIXME "jmp [%2 + %%eax]"
:
: "im" (reg[R15_ARM_NEXT * 4].I),
"irm" (reg[INTR_PEND * 4].I),
"im" (EntryPoints)
: // "eax"
: arm_dofiq
);
arm_dofiq:
__asm goto ("call CPUFiq \n\t"
"jmp arm_disp"
: : :
: arm_disp
);
#else
__asm
{
arm_disp:
@ -1418,10 +1468,21 @@ arm_dofiq:
call CPUFiq
jmp arm_disp
}
#endif
}
naked void arm_exit()
{
#if HOST_OS == OS_LINUX
arm_exit:
__asm ( "mov %0, %%esi \n\t"
"pop %%esi \n\t"
"ret \n\t"
:
: "irm" (reg[CYCL_CNT * 4].I)
: // "esi"
);
#else
__asm
{
arm_exit:
@ -1429,6 +1490,7 @@ naked void arm_exit()
pop esi
ret
}
#endif
}
#elif (HOST_CPU == CPU_ARM)
@ -1709,13 +1771,18 @@ extern "C" void CompileCode()
verify(op_flags&OP_SETS_PC);
LoadReg(r0,opcd&0xF);
#if HOST_CPU==CPU_X86
x86e->Emit(op_and32, &virt_arm_reg(0), 0xfffffffc);
#else
BIC(r0, r0, 3);
#endif
if (cc!=CC_AL)
{
LoadFlags();
armv_imm_to_reg(R15_ARM_NEXT,pc+4);
LoadFlags();
}
LoadReg(r0,opcd&0xF);
StoreReg(r0,R15_ARM_NEXT,cc);
}
break;
@ -2052,7 +2119,7 @@ void *armGetEmitPtr()
return icPtr;
}
#endif
#endif // WINDOWS - X86
void armt_init()

View File

@ -1,28 +0,0 @@
//{{NO_DEPENDENCIES}}
// Microsoft Visual C++ generated include file.
// Used by sdlAICA.rc
//
#define IDD_SETTINGS 101
#define IDD_DIALOG1 102
#define IDD_DEBUGGER 102
#define IDC_RADIO1 1002
#define IDC_RADIO2 1003
#define IDC_RADIO3 1004
#define IDC_RADIO4 1005
#define IDC_RADIO5 1006
#define IDC_HWMIX 1007
#define IDC_GFOCUS 1009
#define IDC_FSYNC 1010
#define IDC_RADIO6 1016
#define IDC_RADIO7 1018
// Next default values for new objects
//
#ifdef APSTUDIO_INVOKED
#ifndef APSTUDIO_READONLY_SYMBOLS
#define _APS_NEXT_RESOURCE_VALUE 103
#define _APS_NEXT_COMMAND_VALUE 40001
#define _APS_NEXT_CONTROL_VALUE 1011
#define _APS_NEXT_SYMED_VALUE 101
#endif
#endif