gdrom: allow 0-len transfer
fixes Pro Pinball Trilogy hang during intro
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0d81c9fb0b
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@ -1047,17 +1047,18 @@ static int getGDROMTicks()
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{
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{
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if (SB_GDST & 1)
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if (SB_GDST & 1)
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{
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{
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if (SB_GDLEN - SB_GDLEND > 10240)
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u32 len = SB_GDLEN == 0 ? 0x02000000 : SB_GDLEN;
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if (len - SB_GDLEND > 10240)
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return 1000000; // Large transfers: GD-ROM transfer rate 1.8 MB/s
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return 1000000; // Large transfers: GD-ROM transfer rate 1.8 MB/s
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else
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else
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return std::min((u32)10240, SB_GDLEN - SB_GDLEND) * 2; // Small transfers: Max G1 bus rate: 50 MHz x 16 bits
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return std::min((u32)10240, len - SB_GDLEND) * 2; // Small transfers: Max G1 bus rate: 50 MHz x 16 bits
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}
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}
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else
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else
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return 0;
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return 0;
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}
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}
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//is this needed ?
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//is this needed ?
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int GDRomschd(int i, int c, int j)
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static int GDRomschd(int i, int c, int j)
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{
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{
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if (SecNumber.Status == GD_SEEK)
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if (SecNumber.Status == GD_SEEK)
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{
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{
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@ -1072,11 +1073,8 @@ int GDRomschd(int i, int c, int j)
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if(!(SB_GDST&1) || !(SB_GDEN &1) || (read_buff.cache_size==0 && read_params.remaining_sectors==0))
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if(!(SB_GDST&1) || !(SB_GDEN &1) || (read_buff.cache_size==0 && read_params.remaining_sectors==0))
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return 0;
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return 0;
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//TODO : Fix dmaor
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u32 src = SB_GDSTARD;
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u32 dmaor = DMAC_DMAOR.full;
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u32 len = (SB_GDLEN == 0 ? 0x02000000 : SB_GDLEN) - SB_GDLEND;
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u32 src = SB_GDSTARD,
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len = SB_GDLEN-SB_GDLEND ;
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if(SB_GDLEN & 0x1F)
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if(SB_GDLEN & 0x1F)
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{
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{
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@ -1091,9 +1089,9 @@ int GDRomschd(int i, int c, int j)
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len = std::min(len, (u32)10240);
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len = std::min(len, (u32)10240);
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// do we need to do this for GDROM DMA?
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// do we need to do this for GDROM DMA?
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if(0x8201 != (dmaor &DMAOR_MASK))
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if (0x8201 != (DMAC_DMAOR.full & DMAOR_MASK))
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{
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{
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INFO_LOG(GDROM, "GDROM: DMAOR has invalid settings (%X)", dmaor);
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INFO_LOG(GDROM, "GDROM: DMAOR has invalid settings (%X)", DMAC_DMAOR.full);
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//return;
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//return;
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}
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}
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@ -1130,17 +1128,12 @@ int GDRomschd(int i, int c, int j)
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WARN_LOG(GDROM, "GDROM: SB_GDDIR %X (TO AICA WAVE MEM?)", src);
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WARN_LOG(GDROM, "GDROM: SB_GDDIR %X (TO AICA WAVE MEM?)", src);
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}
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}
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//SB_GDLEN = 0x00000000; //13/5/2k7 -> according to docs these regs are not updated by hardware
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SB_GDLEND = (SB_GDLEND + len_backup) & 0x01ffffe0;
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//SB_GDSTAR = (src + len_backup);
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SB_GDSTARD += len_backup;
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SB_GDLEND+= len_backup;
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if (SB_GDLEND == SB_GDLEN)
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SB_GDSTARD+= len_backup;//(src + len_backup)&0x1FFFFFFF;
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if (SB_GDLEND==SB_GDLEN)
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{
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{
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//printf("Streamed GDMA end - %d bytes transferred\n",SB_GDLEND);
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SB_GDST = 0;
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SB_GDST=0;//done
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// The DMA end interrupt flag
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asic_RaiseInterrupt(holly_GDROM_DMA);
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asic_RaiseInterrupt(holly_GDROM_DMA);
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}
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}
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//Read ALL sectors
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//Read ALL sectors
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