GD: Implement ATA_IDENTIFY as per qemu

core/hw/gdrom/gdromv3.cpp

@@ -431,6 +431,31 @@ void gd_process_ata_cmd()
 		gd_set_state(gds_waitcmd);
 		break;
 
+    case ATA_IDENTIFY:
+        printf_ata("ATA_IDENTIFY\n");
+
+        // Set Signature
+        DriveSel &= 0xf0;
+
+        SecCount.full = 1;
+        SecNumber.full = 1;
+        ByteCount.low = 0x14;
+        ByteCount.hi = 0xeb;
+
+        // where did this come from?
+        //GDStatus.DRQ = 0;
+
+        // ABORT command
+        Error.full = 0x4;
+
+        GDStatus.full = 0;
+        GDStatus.DRDY = 1;
+        GDStatus.CHECK = 1;
+
+        asic_RaiseInterrupt(holly_GDROM_CMD);
+        gd_set_state(gds_waitcmd);
+        break;
+
 	default:
 		ERROR_LOG(GDROM, "Unknown ATA command %x", ata_cmd.command);
 		break;
@@ -867,11 +892,13 @@ void WriteMem_gdrom(u32 Addr, u32 data, u32 sz)
 {
 	switch(Addr)
 	{
+	//ATA_IOPORT_WR_CYLINDER_LOW
 	case GD_BYCTLLO:
 		printf_rm("GDROM: Write to GD_BYCTLLO = %X, Size:%X",data,sz);
 		ByteCount.low =(u8) data;
 		break;
 
+	//ATA_IOPORT_WR_CYLINDER_HIGH
 	case GD_BYCTLHI: 
 		printf_rm("GDROM: Write to GD_BYCTLHI = %X, Size:%X",data,sz);
 		ByteCount.hi =(u8) data;
@@ -909,6 +936,7 @@ void WriteMem_gdrom(u32 Addr, u32 data, u32 sz)
 		INFO_LOG(GDROM, "GDROM: Write GD_DEVCTRL (Not implemented on Dreamcast)");
 		break;
 
+	//ATA_IOPORT_WR_DEVICE_HEAD
 	case GD_DRVSEL: 
 		if (data != 0) {
 			INFO_LOG(GDROM, "GDROM: Write to GD_DRVSEL, !=0. Value is: %02X", data);

core/hw/gdrom/gdromv3.h

@@ -291,6 +291,7 @@ extern const u16 reply_71[];
 #define ATA_EXEC_DIAG    0x90
 #define ATA_SPI_PACKET   0xA0
 #define ATA_IDENTIFY_DEV 0xA1
+#define ATA_IDENTIFY     0xEC
 #define ATA_SET_FEATURES 0xEF