maple: msb selection, implement/fake reset, kill and allreq commands
overrun and illegal address ints in strict mode
This commit is contained in:
Flyinghead
parent
5cfed1e482
commit
8192eea387
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@ -87,8 +87,6 @@ enum MapleDeviceRV
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MDRS_JVSReply = 0x87, // JVS I/O
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};
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#define SWAP32(a) ((((a) & 0xff) << 24) | (((a) & 0xff00) << 8) | (((a) >> 8) & 0xff00) | (((a) >> 24) & 0xff))
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//fill in the info
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void maple_device::Setup(u32 prt)
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{
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@ -242,6 +240,7 @@ struct maple_sega_controller: maple_base
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switch (cmd)
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{
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case MDC_DeviceRequest:
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case MDC_AllStatusReq:
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//caps
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//4
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w32(MFID_0_Input);
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@ -270,7 +269,7 @@ struct maple_sega_controller: maple_base
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//2
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w16(0x01F4); // 50 mA
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return MDRS_DeviceStatus;
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return cmd == MDC_DeviceRequest ? MDRS_DeviceStatus : MDRS_DeviceStatusAll;
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//controller condition
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case MDCF_GetCondition:
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@ -307,8 +306,14 @@ struct maple_sega_controller: maple_base
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return MDRS_DataTransfer;
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case MDC_DeviceReset:
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return MDRS_DeviceReply;
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case MDC_DeviceKill:
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return MDRS_DeviceReply;
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default:
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//printf("maple_sega_controller UNKOWN MAPLE COMMAND %d\n",cmd);
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INFO_LOG(MAPLE, "maple_sega_controller: Unknown maple command %d", cmd);
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return MDRE_UnknownCmd;
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}
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}
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@ -542,6 +547,7 @@ struct maple_sega_vmu: maple_base
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switch (cmd)
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{
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case MDC_DeviceRequest:
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case MDC_AllStatusReq:
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//caps
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//4
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w32(MFID_1_Storage | MFID_2_LCD | MFID_3_Clock);
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@ -567,7 +573,7 @@ struct maple_sega_vmu: maple_base
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//2
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w16(0x0082); // 13 mA
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return MDRS_DeviceStatus;
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return cmd == MDC_DeviceRequest ? MDRS_DeviceStatus : MDRS_DeviceStatusAll;
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//in[0] is function used
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//out[0] is function used
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@ -829,6 +835,11 @@ struct maple_sega_vmu: maple_base
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}
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}
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case MDC_DeviceReset:
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return MDRS_DeviceReply;
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case MDC_DeviceKill:
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return MDRS_DeviceReply;
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default:
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DEBUG_LOG(MAPLE, "Unknown MAPLE COMMAND %d", cmd);
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@ -870,6 +881,7 @@ struct maple_microphone: maple_base
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switch (cmd)
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{
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case MDC_DeviceRequest:
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case MDC_AllStatusReq:
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DEBUG_LOG(MAPLE, "maple_microphone::dma MDC_DeviceRequest");
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//this was copied from the controller case with just the id and name replaced!
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@ -901,7 +913,7 @@ struct maple_microphone: maple_base
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//2
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w16(0x01F4); // 50 mA
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return MDRS_DeviceStatus;
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return cmd == MDC_DeviceRequest ? MDRS_DeviceStatus : MDRS_DeviceStatusAll;
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case MDCF_GetCondition:
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{
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@ -1026,6 +1038,9 @@ struct maple_microphone: maple_base
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}
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}
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case MDC_DeviceKill:
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return MDRS_DeviceReply;
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default:
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INFO_LOG(MAPLE, "maple_microphone::dma UNHANDLED MAPLE COMMAND %d", cmd);
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return MDRE_UnknownCmd;
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@ -1063,6 +1078,7 @@ struct maple_sega_purupuru : maple_base
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switch (cmd)
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{
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case MDC_DeviceRequest:
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case MDC_AllStatusReq:
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//caps
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//4
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w32(MFID_8_Vibration);
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@ -1091,7 +1107,7 @@ struct maple_sega_purupuru : maple_base
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//2
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w16(0x0640); // 160 mA
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return MDRS_DeviceStatus;
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return cmd == MDC_DeviceRequest ? MDRS_DeviceStatus : MDRS_DeviceStatusAll;
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//get last vibration
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case MDCF_GetCondition:
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@ -1161,6 +1177,12 @@ struct maple_sega_purupuru : maple_base
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return MDRS_DeviceReply;
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case MDC_DeviceReset:
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return MDRS_DeviceReply;
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case MDC_DeviceKill:
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return MDRS_DeviceReply;
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default:
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INFO_LOG(MAPLE, "UNKOWN MAPLE COMMAND %d", cmd);
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return MDRE_UnknownCmd;
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@ -1184,6 +1206,7 @@ struct maple_keyboard : maple_base
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switch (cmd)
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{
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case MDC_DeviceRequest:
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case MDC_AllStatusReq:
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//caps
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//4
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w32(MFID_6_Keyboard);
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@ -1215,7 +1238,7 @@ struct maple_keyboard : maple_base
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// Maximum current consumption (2)
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w16(0x01F5); // 50.1 mA
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return MDRS_DeviceStatus;
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return cmd == MDC_DeviceRequest ? MDRS_DeviceStatus : MDRS_DeviceStatusAll;
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case MDCF_GetCondition:
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w32(MFID_6_Keyboard);
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@ -1232,6 +1255,12 @@ struct maple_keyboard : maple_base
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return MDRS_DataTransfer;
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case MDC_DeviceReset:
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return MDRS_DeviceReply;
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case MDC_DeviceKill:
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return MDRS_DeviceReply;
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default:
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INFO_LOG(MAPLE, "Keyboard: unknown MAPLE COMMAND %d", cmd);
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return MDRE_UnknownCmd;
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@ -1278,6 +1307,7 @@ struct maple_mouse : maple_base
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switch (cmd)
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{
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case MDC_DeviceRequest:
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case MDC_AllStatusReq:
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//caps
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//4
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w32(MFID_9_Mouse);
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@ -1309,7 +1339,7 @@ struct maple_mouse : maple_base
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// Maximum current consumption (2)
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w16(0x0120); // 28.8 mA
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return MDRS_DeviceStatus;
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return cmd == MDC_DeviceRequest ? MDRS_DeviceStatus : MDRS_DeviceStatusAll;
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case MDCF_GetCondition:
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w32(MFID_9_Mouse);
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@ -1339,6 +1369,12 @@ struct maple_mouse : maple_base
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return MDRS_DataTransfer;
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case MDC_DeviceReset:
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return MDRS_DeviceReply;
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case MDC_DeviceKill:
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return MDRS_DeviceReply;
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default:
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INFO_LOG(MAPLE, "Mouse: unknown MAPLE COMMAND %d", cmd);
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return MDRE_UnknownCmd;
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@ -1362,6 +1398,7 @@ struct maple_lightgun : maple_base
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switch (cmd)
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{
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case MDC_DeviceRequest:
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case MDC_AllStatusReq:
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//caps
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//4
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w32(MFID_7_LightGun | MFID_0_Input);
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@ -1393,7 +1430,7 @@ struct maple_lightgun : maple_base
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// Maximum current consumption (2)
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w16(0x0120); // 28.8 mA
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return MDRS_DeviceStatus;
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return cmd == MDC_DeviceRequest ? MDRS_DeviceStatus : MDRS_DeviceStatusAll;
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case MDCF_GetCondition:
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{
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@ -1416,9 +1453,14 @@ struct maple_lightgun : maple_base
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//4
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w32(0x80808080);
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}
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return MDRS_DataTransfer;
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case MDC_DeviceReset:
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return MDRS_DeviceReply;
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case MDC_DeviceKill:
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return MDRS_DeviceReply;
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default:
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INFO_LOG(MAPLE, "Light gun: unknown MAPLE COMMAND %d", cmd);
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return MDRE_UnknownCmd;
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@ -2519,15 +2561,21 @@ struct maple_naomi_jamma : maple_sega_controller
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w8(0x00);
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w8(0x20);
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w8(0x00);
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break;
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case MDC_AllStatusReq:
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w8(MDRS_DeviceStatusAll);
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w8(0x00);
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w8(0x20);
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w8(0x00);
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break;
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case MDC_DeviceReset:
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case MDC_DeviceKill:
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w8(MDRS_DeviceReply);
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w8(0x00);
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w8(0x20);
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w8(0x00);
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break;
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case MDCF_GetCondition:
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@ -143,3 +143,5 @@ extern s32 mo_y_abs;
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extern f32 mo_x_delta;
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extern f32 mo_y_delta;
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extern f32 mo_wheel_delta;
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#define SWAP32(a) ((((a) & 0xff) << 24) | (((a) & 0xff00) << 8) | (((a) >> 8) & 0xff00) | (((a) >> 24) & 0xff))
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@ -8,7 +8,7 @@ u32 maple_GetPort(u32 addr)
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if ((1<<i)&addr)
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return i;
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}
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return 0;
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return 5;
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}
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u32 maple_GetAttachedDevices(u32 bus)
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{
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@ -66,12 +66,14 @@ void maple_vblank()
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if (settings.platform.system == DC_PLATFORM_DREAMCAST)
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maple_handle_reconnect();
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}
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void maple_SB_MSHTCL_Write(u32 addr, u32 data)
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static void maple_SB_MSHTCL_Write(u32 addr, u32 data)
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{
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if (data&1)
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maple_ddt_pending_reset=false;
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}
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void maple_SB_MDST_Write(u32 addr, u32 data)
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static void maple_SB_MDST_Write(u32 addr, u32 data)
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{
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if (data & 0x1)
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{
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@ -83,7 +85,7 @@ void maple_SB_MDST_Write(u32 addr, u32 data)
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}
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}
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void maple_SB_MDEN_Write(u32 addr, u32 data)
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static void maple_SB_MDEN_Write(u32 addr, u32 data)
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{
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SB_MDEN=data&1;
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@ -93,6 +95,26 @@ void maple_SB_MDEN_Write(u32 addr, u32 data)
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}
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}
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static bool check_mdapro(u32 addr)
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{
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u32 bottom = std::max(0x0C000000u, ((((SB_MDAPRO >> 8) & 0x7f) << 20) | 0x08000000));
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u32 top = std::min(0x0FFFFFE0u, (((SB_MDAPRO & 0x7f) << 20) | 0x080fffff));
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if (((addr >> 29) & 7) == 7
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|| (addr & 0x0fffffff) < bottom
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|| (addr & 0x0fffffff) > top)
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{
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INFO_LOG(MAPLE, "MAPLE ERROR : Invalid address: %08x. SB_MDAPRO: %x %x", addr, (SB_MDAPRO >> 8) & 0x7f, SB_MDAPRO & 0x7f);
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return false;
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}
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return true;
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}
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static void maple_SB_MDSTAR_Write(u32 addr, u32 data)
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{
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SB_MDSTAR = data;
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if (!check_mdapro(data))
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asic_RaiseInterrupt(holly_MAPLE_ILLADDR);
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}
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bool IsOnSh4Ram(u32 addr)
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{
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@ -114,6 +136,15 @@ static void maple_DoDma()
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DEBUG_LOG(MAPLE, "Maple: DoMapleDma SB_MDSTAR=%x", SB_MDSTAR);
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u32 addr = SB_MDSTAR;
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#ifdef STRICT_MODE
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if (!check_mdapro(addr))
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{
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asic_RaiseInterrupt(holly_MAPLE_ILLADDR);
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SB_MDST = 0;
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return;
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}
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#endif
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const bool swap_msb = (SB_MMSEL == 0);
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u32 xfer_count=0;
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bool last = false;
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while (last != true)
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@ -132,14 +163,22 @@ static void maple_DoDma()
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{
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case MP_Start:
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{
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#ifdef STRICT_MODE
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if (!check_mdapro(header_2) || !check_mdapro(addr + 8 + plen * sizeof(u32) - 1))
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{
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asic_RaiseInterrupt(holly_MAPLE_OVERRUN);
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SB_MDST = 0;
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return;
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}
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#else
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if (!IsOnSh4Ram(header_2))
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{
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INFO_LOG(MAPLE, "MAPLE ERROR : DESTINATION NOT ON SH4 RAM 0x%X", header_2);
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header_2&=0xFFFFFF;
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header_2|=(3<<26);
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}
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#endif
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u32* p_out=(u32*)GetMemPtr(header_2,4);
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u32 outlen=0;
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u32* p_data =(u32*) GetMemPtr(addr + 8,(plen)*sizeof(u32));
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if (p_data == NULL)
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@ -148,30 +187,55 @@ static void maple_DoDma()
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SB_MDST=0;
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return;
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}
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const u32 frame_header = swap_msb ? SWAP32(p_data[0]) : p_data[0];
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//Command code
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u32 command=p_data[0] &0xFF;
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u32 command = frame_header & 0xFF;
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//Recipient address
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u32 reci=(p_data[0] >> 8) & 0xFF;//0-5;
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u32 reci = (frame_header >> 8) & 0xFF;//0-5;
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//Sender address
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//u32 send = (frame_header >> 16) & 0xFF;
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//Number of additional words in frame
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u32 inlen = (frame_header >> 24) & 0xFF;
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u32 port=maple_GetPort(reci);
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u32 bus=maple_GetBusId(reci);
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//Sender address
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u32 send=(p_data[0] >> 16) & 0xFF;
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//Number of additional words in frame
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u32 inlen=(p_data[0]>>24) & 0xFF;
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u32 resp=0;
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inlen*=4;
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if (MapleDevices[bus][5] && MapleDevices[bus][port])
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{
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u32 outlen = MapleDevices[bus][port]->RawDma(&p_data[0], inlen + 4, &p_out[0]);
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if (swap_msb)
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{
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static u32 maple_in_buf[1024 / 4];
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static u32 maple_out_buf[1024 / 4];
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maple_in_buf[0] = frame_header;
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for (u32 i = 1; i < inlen; i++)
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maple_in_buf[i] = SWAP32(p_data[i]);
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p_data = maple_in_buf;
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p_out = maple_out_buf;
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}
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u32 outlen = MapleDevices[bus][port]->RawDma(&p_data[0], inlen * 4 + 4, &p_out[0]);
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xfer_count += outlen;
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#ifdef STRICT_MODE
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if (!check_mdapro(header_2 + outlen - 1))
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{
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// TODO: This isn't correct (with SB_MMSEL=1) since the interrupt
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// should be raised before the memory is written to
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asic_RaiseInterrupt(holly_MAPLE_OVERRUN);
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SB_MDST = 0;
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return;
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}
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#endif
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if (swap_msb)
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{
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u32 *final_out = (u32 *)GetMemPtr(header_2, outlen);
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for (u32 i = 0; i < outlen / 4; i++)
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final_out[i] = SWAP32(p_out[i]);
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}
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}
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else
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{
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if (port != 5 && command != 1)
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INFO_LOG(MAPLE, "MAPLE: Unknown device bus %d port %d cmd %d", bus, port, command);
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outlen=4;
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INFO_LOG(MAPLE, "MAPLE: Unknown device bus %d port %d cmd %d reci %d", bus, port, command, reci);
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p_out[0]=0xFFFFFFFF;
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}
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@ -234,6 +298,9 @@ void maple_Init()
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sb_rio_register(SB_MDST_addr,RIO_WF,0,&maple_SB_MDST_Write);
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sb_rio_register(SB_MDEN_addr,RIO_WF,0,&maple_SB_MDEN_Write);
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sb_rio_register(SB_MSHTCL_addr,RIO_WF,0,&maple_SB_MSHTCL_Write);
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#ifdef STRICT_MODE
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sb_rio_register(SB_MDSTAR_addr, RIO_WF, 0, &maple_SB_MDSTAR_Write);
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#endif
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maple_schid=sh4_sched_register(0,&maple_schd);
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}
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18
core/types.h
18
core/types.h
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@ -109,22 +109,22 @@ enum HollyInterruptID
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//bit 0 = RENDER : ISP out of Cache(Buffer over flow)
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//bit 1 = RENDER : Hazard Processing of Strip Buffer
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holly_PRIM_NOMEM = holly_err | 0x02, //bit 2 = TA : ISP/TSP Parameter Overflow
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holly_MATR_NOMEM = holly_err | 0x03 //bit 3 = TA : Object List Pointer Overflow
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holly_MATR_NOMEM = holly_err | 0x03, //bit 3 = TA : Object List Pointer Overflow
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//bit 4 = TA : Illegal Parameter
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//bit 5 = TA : FIFO Overflow
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//bit 6 = PVRIF : Illegal Address set
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//bit 7 = PVRIF : DMA over run
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//bit 8 = MAPLE : Illegal Address set
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//bit 9 = MAPLE : DMA over run
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//bit 10 = MAPLE : Write FIFO over flow
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//bit 11 = MAPLE : Illegal command
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holly_MAPLE_ILLADDR = holly_err | 0x08, //bit 8 = MAPLE : Illegal Address set
|
||||
holly_MAPLE_OVERRUN = holly_err | 0x09, //bit 9 = MAPLE : DMA over run
|
||||
holly_MAPLE_FIFO = holly_err | 0x0a, //bit 10 = MAPLE : Write FIFO overflow
|
||||
holly_MAPLE_ILLCMD = holly_err | 0x0b, //bit 11 = MAPLE : Illegal command
|
||||
//bit 12 = G1 : Illegal Address set
|
||||
//bit 13 = G1 : GD-DMA over run
|
||||
//bit 14 = G1 : ROM/FLASH access at GD-DMA
|
||||
//bit 15 = G2 : AICA-DMA Illegal Address set
|
||||
//bit 16 = G2 : Ext-DMA1 Illegal Address set
|
||||
//bit 17 = G2 : Ext-DMA2 Illegal Address set
|
||||
//bit 18 = G2 : Dev-DMA Illegal Address set
|
||||
holly_AICA_ILLADDR = holly_err | 0x0f, //bit 15 = G2 : AICA-DMA Illegal Address set
|
||||
holly_EXT1_ILLADDR = holly_err | 0x10, //bit 16 = G2 : Ext-DMA1 Illegal Address set
|
||||
holly_EXT2_ILLADDR = holly_err | 0x11, //bit 17 = G2 : Ext-DMA2 Illegal Address set
|
||||
holly_DEV_ILLADDR = holly_err | 0x12, //bit 18 = G2 : Dev-DMA Illegal Address set
|
||||
//bit 19 = G2 : AICA-DMA over run
|
||||
//bit 20 = G2 : Ext-DMA1 over run
|
||||
//bit 21 = G2 : Ext-DMA2 over run
|
||||
|
|
|
|||
Loading…
Reference in New Issue