From 6115a918b2edaab7fc0d4930a8f1e6fc387783fc Mon Sep 17 00:00:00 2001 From: Flyinghead Date: Thu, 14 Mar 2024 13:21:10 +0100 Subject: [PATCH] arm dynarec: apply mask to mem write8 and write16 value operand Compilers do not cast the operand, which results in u8 handlers being called with an u32 value. --- core/rec-ARM/rec_arm.cpp | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/core/rec-ARM/rec_arm.cpp b/core/rec-ARM/rec_arm.cpp index c8eb112aa..9a194df19 100644 --- a/core/rec-ARM/rec_arm.cpp +++ b/core/rec-ARM/rec_arm.cpp @@ -1136,7 +1136,11 @@ bool Arm32Assembler::writeMemImmediate(RuntimeBlockInfo* block, shil_opcode* op, if (optp == SZ_64F) die("SZ_64F not supported"); Mov(r0, op->rs1._imm); - if (optp == SZ_32F) + if (optp == SZ_8) + Uxtb(r1, rs2); + else if (optp == SZ_16) + Uxth(r1, rs2); + else if (optp == SZ_32F) Vmov(r1, rs2f); else if (!rs2.Is(r1)) Mov(r1, rs2); @@ -2472,12 +2476,17 @@ void Arm32Assembler::genMainLoop() continue; const void *v; - if (i == 0) + if (i == 0 && s != 3 && s != 4) { v = fn; + } else { v = GetCursorAddress(); Mov(r0, Register(i)); + if (s == 3) + Uxtb(r1, r1); + else if (s == 4) + Uxth(r1, r1); jump(fn); }