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sh4: promote opcode 0 as regular NOP

This commit is contained in:
Flyinghead 2020-11-21 20:06:59 +01:00
parent b0f8d947ad
commit 525c2dc88c
3 changed files with 39 additions and 50 deletions
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74
core/hw/sh4/dyna/decoder.cpp
View File

@ -867,6 +867,7 @@ static bool dec_generic(u32 op)
default:
die("DM_MUL: Failed to classify opcode");
return false;
}
Emit(op,rd,rs1,rs2,0,shil_param(),rd2);
@ -1013,57 +1014,50 @@ bool dec_DecodeBlock(RuntimeBlockInfo* rbi,u32 max_cycles)
{
u32 op = IReadMem16(state.cpu.rpc);
if (op==0 && state.cpu.is_delayslot)
blk->guest_opcodes++;
if (!mmu_enabled())
{
INFO_LOG(DYNAREC, "Delayslot 0 hack!");
if (op>=0xF000)
blk->guest_cycles+=0;
else
blk->guest_cycles+=CPU_RATIO;
}
else
{
blk->guest_opcodes++;
if (!mmu_enabled())
blk->guest_cycles += std::max((int)OpDesc[op]->LatencyCycles, 1);
}
if (OpDesc[op]->IsFloatingPoint())
{
if (sr.FD == 1)
{
if (op>=0xF000)
blk->guest_cycles+=0;
else
blk->guest_cycles+=CPU_RATIO;
}
else
{
blk->guest_cycles += std::max((int)OpDesc[op]->LatencyCycles, 1);
}
if (OpDesc[op]->IsFloatingPoint())
{
if (sr.FD == 1)
{
// We need to know FPSCR to compile the block, so let the exception handler run first
// as it may change the fp registers
Do_Exception(next_pc, 0x800, 0x100);
return false;
}
blk->has_fpu_op = true;
// We need to know FPSCR to compile the block, so let the exception handler run first
// as it may change the fp registers
Do_Exception(next_pc, 0x800, 0x100);
return false;
}
blk->has_fpu_op = true;
}
verify(!(state.cpu.is_delayslot && OpDesc[op]->SetPC()));
if (state.ngen.OnlyDynamicEnds || !OpDesc[op]->rec_oph)
verify(!(state.cpu.is_delayslot && OpDesc[op]->SetPC()));
if (state.ngen.OnlyDynamicEnds || !OpDesc[op]->rec_oph)
{
if (state.ngen.InterpreterFallback || !dec_generic(op))
{
if (state.ngen.InterpreterFallback || !dec_generic(op))
dec_fallback(op);
if (OpDesc[op]->SetPC())
{
dec_fallback(op);
if (OpDesc[op]->SetPC())
{
dec_DynamicSet(reg_nextpc);
dec_End(0xFFFFFFFF,BET_DynamicJump,false);
}
if (OpDesc[op]->SetFPSCR() && !state.cpu.is_delayslot)
{
dec_End(state.cpu.rpc+2,BET_StaticJump,false);
}
dec_DynamicSet(reg_nextpc);
dec_End(0xFFFFFFFF,BET_DynamicJump,false);
}
if (OpDesc[op]->SetFPSCR() && !state.cpu.is_delayslot)
{
dec_End(state.cpu.rpc+2,BET_StaticJump,false);
}
}
else
{
OpDesc[op]->rec_oph(op);
}
}
else
{
OpDesc[op]->rec_oph(op);
}
state.cpu.rpc+=2;
}

12
core/hw/sh4/interpr/sh4_interpreter.cpp
View File

@ -146,13 +146,11 @@ void ExecuteDelayslot()
#endif
u32 op = ReadNexOp();
if (op != 0) // Looney Tunes: Space Race hack
ExecuteOpcode(op);
ExecuteOpcode(op);
#if !defined(NO_MMU)
}
catch (SH4ThrownException& ex) {
AdjustDelaySlotException(ex);
//printf("Delay slot exception\n");
throw ex;
}
#endif
@ -175,12 +173,8 @@ void ExecuteDelayslot_RTE()
// every SH4_TIMESLICE cycles
int UpdateSystem()
{
//this is an optimisation (mostly for ARM)
//makes scheduling easier !
//update_fp* tmu=pUpdateTMU;
Sh4cntx.sh4_sched_next-=SH4_TIMESLICE;
if (Sh4cntx.sh4_sched_next<0)
Sh4cntx.sh4_sched_next -= SH4_TIMESLICE;
if (Sh4cntx.sh4_sched_next < 0)
sh4_sched_tick(SH4_TIMESLICE);
return Sh4cntx.interrupt_pend;

3
core/hw/sh4/sh4_opcode_list.cpp
View File

@ -143,7 +143,7 @@ sh4_opcodelistentry opcodes[]=
{0 ,i0000_0000_0001_1001 ,Mask_none ,0x0019 ,Normal ,"div0u" ,1,1,EX,fix_none ,dec_Fill(DM_DIV0,PRM_RN,PRM_RM,shop_or,1)},//div0u
{0 ,i0000_nnnn_0010_1001 ,Mask_n ,0x0029 ,Normal ,"movt <REG_N>" ,1,1,EX,fix_none ,dec_Fill(DM_UnaryOp,PRM_RN,PRM_SR_T,shop_mov32)}, //movt <REG_N>
{dec_i0000_0000_0000_1001 ,i0000_0000_0000_1001 ,Mask_none ,0x0009 ,Normal ,"nop" ,1,0,MT,fix_none} ,//nop
{dec_i0000_0000_0000_1001 ,i0000_0000_0000_1001 ,Mask_none ,0x0000 ,Normal ,"nop0" ,1,0,MT,fix_none} ,//nop0 Looney Tunes: Space Race, Samba de Amigo 2000
{dec_i0000_0000_0010_1011 ,i0000_0000_0010_1011 ,Mask_none ,0x002B ,Branch_dir_d ,"rte" ,5,5,CO,fix_none}, //rte
@ -441,6 +441,7 @@ void BuildOpcodeTables()
break;
default:
die("Error");
return;
}
for (u32 i=0;i<count;i++)
{