No more fast-math on x86/x64. Yet another FTRC fix
Don't compile with -ffast-math Fix FTRC to return 0x80000000 for NaN -> fixes Arcade Racing Legend sound problems and disappearing cars Remove unsupported GCW0 platform Remove unused android makefiles
This commit is contained in:
Flyinghead
parent
77bb6eade5
commit
5227259048
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@ -69,8 +69,7 @@ set_target_properties(${PROJECT_NAME} PROPERTIES CXX_EXTENSIONS OFF)
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if(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
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target_compile_options(${PROJECT_NAME} PRIVATE
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$<$<COMPILE_LANGUAGE:CXX>:-fno-rtti>
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-fno-strict-aliasing
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-ffast-math)
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-fno-strict-aliasing)
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elseif(MSVC)
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target_compile_options(${PROJECT_NAME} PRIVATE /GR- /GS-)
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endif()
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26
core/core.mk
26
core/core.mk
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@ -53,10 +53,6 @@ else
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RZDCY_MODULES += rend/norend/
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endif
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ifdef FOR_ANDROID
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RZDCY_MODULES += android/ deps/libandroid/ linux/
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endif
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ifdef USE_SDL
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RZDCY_MODULES += sdl/
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endif
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@ -84,33 +80,13 @@ RZDCY_CFLAGS += \
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-frename-registers -fsingle-precision-constant -ffast-math \
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-ftree-vectorize -fomit-frame-pointer
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RZDCY_CFLAGS += -march=armv7-a -mtune=cortex-a8 -mfpu=neon
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else
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ifdef FOR_ANDROID
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RZDCY_CFLAGS += \
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$(CFLAGS) -c -O3 \
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-D_ANDROID -DNDEBUG \
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-frename-registers -fsingle-precision-constant -ffast-math \
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-ftree-vectorize -fomit-frame-pointer
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ifndef NOT_ARM
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RZDCY_CFLAGS += -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16
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else
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ifdef ISARM64
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RZDCY_CFLAGS += -march=armv8-a
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endif
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endif
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endif
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endif
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ifdef USE_VULKAN
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ifdef FOR_WINDOWS
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RZDCY_CFLAGS += -DVK_USE_PLATFORM_WIN32_KHR
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else
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ifdef FOR_ANDROID
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RZDCY_CFLAGS += -DVK_USE_PLATFORM_ANDROID_KHR
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else
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RZDCY_CFLAGS += -DVK_USE_PLATFORM_XLIB_KHR
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endif
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RZDCY_CFLAGS += -DVK_USE_PLATFORM_XLIB_KHR
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endif
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RZDCY_CFLAGS += -D USE_VULKAN
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endif
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@ -715,7 +715,7 @@ u32,f1,(f32 f1),
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s32 res = (s32)f1;
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// Fix result sign for Intel CPUs
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if (res == 0x80000000 && *(s32 *)&f1 > 0)
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if ((u32)res == 0x80000000 && f1 == f1 && *(s32 *)&f1 > 0)
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res = 0x7fffffff;
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return res;
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@ -903,13 +903,12 @@ shil_canonical
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(
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f32,f1,(float* fn, float* fm),
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// multiplications are done with 28 bits of precision (53 - 25) and the final sum at 30 bits
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double idp = reduce_precision<25>((double)fn[0] * fm[0]);
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idp += reduce_precision<25>((double)fn[1] * fm[1]);
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idp += reduce_precision<25>((double)fn[2] * fm[2]);
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idp += reduce_precision<25>((double)fn[3] * fm[3]);
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double idp = (double)fn[0] * fm[0];
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idp += (double)fn[1] * fm[1];
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idp += (double)fn[2] * fm[2];
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idp += (double)fn[3] * fm[3];
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return (float)fixNaN64(idp);
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return fixNaN((float)idp);
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)
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#else
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shil_canonical
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@ -944,30 +943,30 @@ shil_canonical
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(
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void,f1,(float* fd,float* fn, float* fm),
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double v1 = reduce_precision<25>((double)fm[0] * fn[0]) +
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reduce_precision<25>((double)fm[4] * fn[1]) +
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reduce_precision<25>((double)fm[8] * fn[2]) +
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reduce_precision<25>((double)fm[12] * fn[3]);
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double v1 = (double)fm[0] * fn[0] +
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(double)fm[4] * fn[1] +
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(double)fm[8] * fn[2] +
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(double)fm[12] * fn[3];
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double v2 = reduce_precision<25>((double)fm[1] * fn[0]) +
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reduce_precision<25>((double)fm[5] * fn[1]) +
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reduce_precision<25>((double)fm[9] * fn[2]) +
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reduce_precision<25>((double)fm[13] * fn[3]);
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double v2 = (double)fm[1] * fn[0] +
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(double)fm[5] * fn[1] +
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(double)fm[9] * fn[2] +
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(double)fm[13] * fn[3];
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double v3 = reduce_precision<25>((double)fm[2] * fn[0]) +
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reduce_precision<25>((double)fm[6] * fn[1]) +
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reduce_precision<25>((double)fm[10] * fn[2]) +
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reduce_precision<25>((double)fm[14] * fn[3]);
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double v3 = (double)fm[2] * fn[0] +
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(double)fm[6] * fn[1] +
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(double)fm[10] * fn[2] +
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(double)fm[14] * fn[3];
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double v4 = reduce_precision<25>((double)fm[3] * fn[0]) +
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reduce_precision<25>((double)fm[7] * fn[1]) +
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reduce_precision<25>((double)fm[11] * fn[2]) +
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reduce_precision<25>((double)fm[15] * fn[3]);
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double v4 = (double)fm[3] * fn[0] +
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(double)fm[7] * fn[1] +
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(double)fm[11] * fn[2] +
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(double)fm[15] * fn[3];
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fd[0] = (float)fixNaN64(v1);
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fd[1] = (float)fixNaN64(v2);
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fd[2] = (float)fixNaN64(v3);
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fd[3] = (float)fixNaN64(v4);
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fd[0] = fixNaN((float)v1);
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fd[1] = fixNaN((float)v2);
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fd[2] = fixNaN((float)v3);
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fd[3] = fixNaN((float)v4);
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)
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#else
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shil_canonical
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@ -19,7 +19,7 @@
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#define pi (3.14159265f)
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void iNimp(const char*str);
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static void iNimp(const char *str);
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#define IS_DENORMAL(f) (((*(f))&0x7f800000) == 0)
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@ -168,14 +168,14 @@ sh4op(i1111_nnnn_mmmm_0100)
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u32 n = GetN(op);
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u32 m = GetM(op);
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sr.T = !!(fr[m] == fr[n]);
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sr.T = fr[m] == fr[n];
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}
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else
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{
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u32 n = (op >> 9) & 0x07;
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u32 m = (op >> 5) & 0x07;
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sr.T = !!(GetDR(m) == GetDR(n));
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sr.T = GetDR(m) == GetDR(n);
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}
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}
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//fcmp/gt <FREG_M>,<FREG_N>
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@ -339,7 +339,6 @@ sh4op(i1111_nnnn_mmmm_1011)
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{
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if (fpscr.SZ == 0)
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{
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//iNimp("fmov.s <FREG_M>,@-<REG_N>");
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u32 n = GetN(op);
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u32 m = GetM(op);
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@ -505,12 +504,12 @@ sh4op(i1111_nnmm_1110_1101)
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{
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#if HOST_CPU == CPU_X86 || HOST_CPU == CPU_X64
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// multiplications are done with 28 bits of precision (53 - 25) and the final sum at 30 bits
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double idp = reduce_precision<25>((double)fr[n + 0] * fr[m + 0]);
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idp += reduce_precision<25>((double)fr[n + 1] * fr[m + 1]);
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idp += reduce_precision<25>((double)fr[n + 2] * fr[m + 2]);
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idp += reduce_precision<25>((double)fr[n + 3] * fr[m + 3]);
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double idp = (double)fr[n + 0] * fr[m + 0];
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idp += (double)fr[n + 1] * fr[m + 1];
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idp += (double)fr[n + 2] * fr[m + 2];
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idp += (double)fr[n + 3] * fr[m + 3];
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fr[n + 3] = (float)fixNaN64(idp);
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fr[n + 3] = fixNaN((float)idp);
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#else
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float rv = fr[n + 0] * fr[m + 0];
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rv += fr[n + 1] * fr[m + 1];
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@ -604,7 +603,6 @@ sh4op(i1111_1011_1111_1101)
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//fschg
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sh4op(i1111_0011_1111_1101)
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{
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//iNimp("fschg");
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fpscr.SZ = 1 - fpscr.SZ;
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}
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@ -634,10 +632,12 @@ sh4op(i1111_nnnn_0011_1101)
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if (fpscr.PR == 0)
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{
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u32 n = GetN(op);
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fpul = (u32)(s32)std::min(fr[n], 2147483520.0f); // IEEE 754: 0x4effffff
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fpul = (u32)(s32)fr[n];
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if ((s32)fpul > 0x7fffff80)
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fpul = 0x7fffffff;
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// Intel CPUs convert out of range float numbers to 0x80000000. Manually set the correct sign
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if (fpul == 0x80000000)
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else if (fpul == 0x80000000 && fr[n] == fr[n])
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{
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if (*(int *)&fr[n] > 0) // Using integer math to avoid issues with Inf and NaN
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fpul--;
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@ -649,8 +649,9 @@ sh4op(i1111_nnnn_0011_1101)
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f64 f = GetDR(n);
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fpul = (u32)(s32)f;
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// TODO saturate
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// Intel CPUs convert out of range float numbers to 0x80000000. Manually set the correct sign
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if (fpul == 0x80000000)
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if (fpul == 0x80000000 && f == f)
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{
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if (*(s64 *)&f > 0) // Using integer math to avoid issues with Inf and NaN
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fpul--;
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@ -662,7 +663,6 @@ sh4op(i1111_nnnn_0011_1101)
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//fmac <FREG_0>,<FREG_M>,<FREG_N>
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sh4op(i1111_nnnn_mmmm_1110)
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{
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//iNimp("fmac <FREG_0>,<FREG_M>,<FREG_N>");
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if (fpscr.PR==0)
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{
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u32 n = GetN(op);
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@ -681,15 +681,11 @@ sh4op(i1111_nnnn_mmmm_1110)
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//ftrv xmtrx,<FV_N>
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sh4op(i1111_nn01_1111_1101)
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{
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//iNimp("ftrv xmtrx,<FV_N>");
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/*
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XF[0] XF[4] XF[8] XF[12] FR[n] FR[n]
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XF[1] XF[5] XF[9] XF[13] * FR[n+1] -> FR[n+1]
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XF[2] XF[6] XF[10] XF[14] FR[n+2] FR[n+2]
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XF[3] XF[7] XF[11] XF[15] FR[n+3] FR[n+3]
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gota love linear algebra !
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*/
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u32 n=GetN(op)&0xC;
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@ -697,30 +693,30 @@ sh4op(i1111_nn01_1111_1101)
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if (fpscr.PR==0)
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{
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#if HOST_CPU == CPU_X86 || HOST_CPU == CPU_X64
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double v1 = reduce_precision<25>((double)xf[0] * fr[n + 0]) +
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reduce_precision<25>((double)xf[4] * fr[n + 1]) +
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reduce_precision<25>((double)xf[8] * fr[n + 2]) +
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reduce_precision<25>((double)xf[12] * fr[n + 3]);
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double v1 = (double)xf[0] * fr[n + 0] +
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(double)xf[4] * fr[n + 1] +
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(double)xf[8] * fr[n + 2] +
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(double)xf[12] * fr[n + 3];
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double v2 = reduce_precision<25>((double)xf[1] * fr[n + 0]) +
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reduce_precision<25>((double)xf[5] * fr[n + 1]) +
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reduce_precision<25>((double)xf[9] * fr[n + 2]) +
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reduce_precision<25>((double)xf[13] * fr[n + 3]);
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double v2 = (double)xf[1] * fr[n + 0] +
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(double)xf[5] * fr[n + 1] +
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(double)xf[9] * fr[n + 2] +
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(double)xf[13] * fr[n + 3];
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double v3 = reduce_precision<25>((double)xf[2] * fr[n + 0]) +
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reduce_precision<25>((double)xf[6] * fr[n + 1]) +
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reduce_precision<25>((double)xf[10] * fr[n + 2]) +
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reduce_precision<25>((double)xf[14] * fr[n + 3]);
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double v3 = (double)xf[2] * fr[n + 0] +
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(double)xf[6] * fr[n + 1] +
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(double)xf[10] * fr[n + 2] +
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(double)xf[14] * fr[n + 3];
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double v4 = reduce_precision<25>((double)xf[3] * fr[n + 0]) +
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reduce_precision<25>((double)xf[7] * fr[n + 1]) +
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reduce_precision<25>((double)xf[11] * fr[n + 2]) +
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reduce_precision<25>((double)xf[15] * fr[n + 3]);
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double v4 = (double)xf[3] * fr[n + 0] +
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(double)xf[7] * fr[n + 1] +
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(double)xf[11] * fr[n + 2] +
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(double)xf[15] * fr[n + 3];
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fr[n + 0] = (float)fixNaN64(v1);
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fr[n + 1] = (float)fixNaN64(v2);
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fr[n + 2] = (float)fixNaN64(v3);
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fr[n + 3] = (float)fixNaN64(v4);
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fr[n + 0] = fixNaN((float)v1);
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fr[n + 1] = fixNaN((float)v2);
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fr[n + 2] = fixNaN((float)v3);
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fr[n + 3] = fixNaN((float)v4);
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#else
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float v1, v2, v3, v4;
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@ -761,9 +757,7 @@ sh4op(i1111_nn01_1111_1101)
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}
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}
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void iNimp(const char*str)
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static void iNimp(const char *str)
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{
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WARN_LOG(INTERPRETER, "Unimplemented sh4 FPU instruction: %s", str);
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//Sh4_int_Stop();
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}
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@ -123,13 +123,12 @@ void Sh4_int_Reset(bool hard)
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old_sr.status=sr.status;
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UpdateSR();
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fpscr.full = 0x0004001;
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fpscr.full = 0x00040001;
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old_fpscr=fpscr;
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UpdateFPSCR();
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icache.Reset(hard);
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ocache.Reset(hard);
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//Any more registers have default value ?
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INFO_LOG(INTERPRETER, "Sh4 Reset");
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}
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}
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@ -160,13 +160,3 @@ static INLINE f64 fixNaN64(f64 f)
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#endif
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return f;
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}
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// Reduces the precision of the argument f by a given number of bits
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// double have 53 bits of precision so the returned result will have a precision of 53 - bits
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// Note: with -ffast-math c -(c - f) is simplified to ... f, which makes this function a nop
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template<int bits>
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static INLINE double reduce_precision(double f)
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{
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double c = (double)((1ull << bits) + 1) * f;
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return c - (c - f);
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}
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@ -37,7 +37,7 @@ class EvdevGamepadDevice : public GamepadDevice
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{
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public:
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EvdevGamepadDevice(int maple_port, const char *devnode, int fd, const char *mapping_file = NULL)
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: GamepadDevice(maple_port, "evdev"), _fd(fd), _rumble_effect_id(-1), _devnode(devnode)
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: GamepadDevice(maple_port, "evdev"), _fd(fd), _devnode(devnode), _rumble_effect_id(-1)
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{
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fcntl(fd, F_SETFL, O_NONBLOCK);
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char buf[256] = "Unknown";
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@ -56,8 +56,6 @@ public:
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{
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#if defined(TARGET_PANDORA)
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mapping_file = "controller_pandora.cfg";
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#elif defined(TARGET_GCW0)
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mapping_file = "controller_gcwz.cfg";
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#else
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if (_name == "Microsoft X-Box 360 pad"
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|| _name == "Xbox 360 Wireless Receiver"
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@ -609,17 +609,22 @@ protected:
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case shop_cvt_f2i_t:
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{
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Xbyak::Reg32 rd = mapRegister(op.rd);
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cvttss2si(rd, mapXRegister(op.rs1));
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mov(eax, 0x7fffffff);
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cmp(rd, 0x7fffff80); // 2147483520.0f
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cmovge(rd, eax);
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cmp(rd, 0x80000000); // indefinite integer
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Xbyak::Label done;
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jne(done, T_SHORT);
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movd(ecx, mapXRegister(op.rs1));
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cmp(ecx, 0);
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cmovge(rd, eax); // restore the correct sign
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L(done);
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Xbyak::Label done;
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cvttss2si(edx, mapXRegister(op.rs1));
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mov(rd, 0x7fffffff);
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cmp(edx, 0x7fffff80);
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jg(done, T_SHORT);
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mov(rd, edx);
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cmp(rd, 0x80000000); // indefinite integer
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jne(done, T_SHORT);
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xor_(eax, eax);
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||||
static u32 zero;
|
||||
ucomiss(mapXRegister(op.rs1), dword[&zero]);
|
||||
setb(al);
|
||||
add(eax, 0x7fffffff);
|
||||
mov(rd, eax);
|
||||
L(done);
|
||||
}
|
||||
break;
|
||||
case shop_cvt_i2f_n:
|
||||
|
|
|
|||
|
|
@ -1,112 +0,0 @@
|
|||
# Copyright (C) 2009 The Android Open Source Project
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
#
|
||||
|
||||
LOCAL_PATH:= $(call my-dir)/..
|
||||
|
||||
include $(CLEAR_VARS)
|
||||
|
||||
FOR_ANDROID := 1
|
||||
USE_GLES := 1
|
||||
CHD5_LZMA := 1
|
||||
CHD5_FLAC := 1
|
||||
USE_VULKAN = 1
|
||||
|
||||
ifneq ($(TARGET_ARCH_ABI),armeabi-v7a)
|
||||
NOT_ARM := 1
|
||||
else
|
||||
NOT_ARM :=
|
||||
endif
|
||||
|
||||
ifeq ($(TARGET_ARCH_ABI),arm64-v8a)
|
||||
# CPP_REC := 1
|
||||
ARM64_REC := 1
|
||||
ISARM64 := 1
|
||||
else
|
||||
# CPP_REC :=
|
||||
ARM64_REC :=
|
||||
ISARM64 :=
|
||||
endif
|
||||
|
||||
ifeq ($(TARGET_ARCH_ABI),x86)
|
||||
X86_REC := 1
|
||||
else
|
||||
X86_REC :=
|
||||
endif
|
||||
|
||||
ifeq ($(TARGET_ARCH_ABI),mips)
|
||||
ISMIPS := 1
|
||||
NO_REC := 1
|
||||
else
|
||||
ISMIPS :=
|
||||
NO_REC :=
|
||||
endif
|
||||
|
||||
$(info $$TARGET_ARCH_ABI is [${TARGET_ARCH_ABI}])
|
||||
|
||||
include $(LOCAL_PATH)/../../../../../core/core.mk
|
||||
|
||||
LOCAL_SRC_FILES := $(RZDCY_FILES)
|
||||
LOCAL_SRC_FILES += $(wildcard $(LOCAL_PATH)/jni/src/Android.cpp)
|
||||
LOCAL_SRC_FILES += $(wildcard $(LOCAL_PATH)/jni/src/utils.cpp)
|
||||
LOCAL_CFLAGS := $(RZDCY_CFLAGS) -fPIC -fvisibility=hidden -ffunction-sections -fdata-sections -DVK_USE_PLATFORM_ANDROID_KHR #-DDEBUGFAST
|
||||
LOCAL_CPPFLAGS := $(RZDCY_CXXFLAGS) -fPIC -fvisibility=hidden -fvisibility-inlines-hidden -ffunction-sections -fdata-sections -fexceptions
|
||||
|
||||
# 7-Zip/LZMA settings (CHDv5)
|
||||
ifdef CHD5_LZMA
|
||||
LOCAL_CFLAGS += -D_7ZIP_ST -DCHD5_LZMA
|
||||
endif
|
||||
|
||||
# FLAC settings (CHDv5)
|
||||
ifdef CHD5_FLAC
|
||||
LOCAL_CFLAGS += -DCHD5_FLAC
|
||||
endif
|
||||
|
||||
LOCAL_CFLAGS += -DGLES3
|
||||
LOCAL_CPPFLAGS += -std=c++11 -fopenmp
|
||||
LOCAL_LDFLAGS += -fopenmp
|
||||
|
||||
ifeq ($(call ndk-major-at-least,21),true)
|
||||
LOCAL_LDFLAGS += -static-openmp
|
||||
endif
|
||||
|
||||
ifeq ($(TARGET_ARCH_ABI),x86)
|
||||
LOCAL_CFLAGS+= -DTARGET_NO_AREC -DTARGET_NO_OPENMP
|
||||
endif
|
||||
|
||||
LOCAL_CPP_FEATURES :=
|
||||
# LOCAL_SHARED_LIBRARIES:= libcutils libutils
|
||||
LOCAL_PRELINK_MODULE := false
|
||||
|
||||
LOCAL_MODULE := flycast
|
||||
LOCAL_DISABLE_FORMAT_STRING_CHECKS=true
|
||||
LOCAL_ASFLAGS := -fPIC -fvisibility=hidden
|
||||
LOCAL_LDLIBS := -llog -lEGL -lz -landroid
|
||||
#-Wl,-Map,./res/raw/syms.mp3
|
||||
LOCAL_ARM_MODE := arm
|
||||
|
||||
ifeq ($(TARGET_ARCH_ABI),mips)
|
||||
LOCAL_LDFLAGS += -Wl,--gc-sections
|
||||
else
|
||||
ifeq ($(TARGET_ARCH_ABI),arm64-v8a)
|
||||
LOCAL_LDFLAGS += -Wl,--gc-sections
|
||||
else
|
||||
LOCAL_LDFLAGS += -Wl,--gc-sections,--icf=safe
|
||||
LOCAL_LDLIBS += -Wl,--no-warn-shared-textrel
|
||||
endif
|
||||
endif
|
||||
|
||||
$(LOCAL_SRC_FILES): $(VERSION_HEADER)
|
||||
|
||||
include $(BUILD_SHARED_LIBRARY)
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
APP_ABI := armeabi-v7a arm64-v8a
|
||||
APP_STL := c++_static
|
||||
|
|
@ -98,8 +98,6 @@ ifeq (,$(platform))
|
|||
else
|
||||
platform = armv7h
|
||||
endif
|
||||
else ifneq (,$(findstring mips,$(ARCH)))
|
||||
platform = gcwz
|
||||
else
|
||||
$(warning Unsupported CPU architecture, using lincpp)
|
||||
platform = lincpp
|
||||
|
|
@ -260,16 +258,6 @@ else ifneq (,$(findstring rockchip,$(platform)))
|
|||
FOR_LINUX := 1
|
||||
ISARM64 := 1
|
||||
|
||||
# GCW Zero
|
||||
else ifneq (,$(findstring gcwz,$(platform)))
|
||||
NOT_ARM := 1
|
||||
NO_REC := 1
|
||||
CC_PREFIX ?= /opt/gcw0-toolchain/usr/bin/mipsel-gcw0-linux-uclibc-
|
||||
CFLAGS += -D TARGET_GCW0 -D TARGET_NO_REC -fsingle-precision-constant
|
||||
LIBS += -L./gcwz/enta_viv -lglapi
|
||||
GCWZ_PKG = reicast-gcwz.opk
|
||||
GCWZ_PKG_FILES = gcwz/default.gcw0.desktop gcwz/icon-32.png
|
||||
|
||||
# Vero4K
|
||||
else ifneq (,$(findstring vero4k,$(platform)))
|
||||
MFLAGS += -marm -march=armv8-a+crc -mtune=cortex-a53 -mfloat-abi=hard -funsafe-math-optimizations -funroll-loops
|
||||
|
|
@ -321,7 +309,7 @@ LDFLAGS += -g -Wl,-Map,$(notdir $@).map,--gc-sections -Wl,-O3 -Wl,--sort-common
|
|||
|
||||
CFLAGS += $(RZDCY_CFLAGS) -g -O3 -D NDEBUG -c -fopenmp #-D NO_REND
|
||||
CFLAGS += -frename-registers -fno-strict-aliasing
|
||||
CFLAGS += -ffast-math -ftree-vectorize -Wall -Wno-unused-result
|
||||
CFLAGS += -ftree-vectorize -Wall -Wno-unused-result
|
||||
|
||||
CXXFLAGS += $(RZDCY_CFLAGS) -fno-rtti -fno-operator-names -D_GLIBCXX_USE_CXX11_ABI=0 -std=gnu++11
|
||||
|
||||
|
|
@ -537,9 +525,6 @@ DEPS:=$(patsubst $(RZDCY_SRC_DIR)/%,$(DEPDIR)/%,$(DEPS))
|
|||
POSTCOMPILE = mv -f $(DEPDIR)/$*.Td $(DEPDIR)/$*.d
|
||||
|
||||
all: $(CPPFILES) $(EXECUTABLE) $(EXECUTABLE_STRIPPED)
|
||||
ifneq (,$(findstring gcwz,$(platform)))
|
||||
mksquashfs $(EXECUTABLE_STRIPPED) $(GCWZ_PKG_FILES) $(GCWZ_PKG) -all-root
|
||||
endif
|
||||
|
||||
$(EXECUTABLE): $(OBJECTS)
|
||||
$(CXX) $(MFLAGS) $(EXTRAFLAGS) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $@
|
||||
|
|
@ -579,7 +564,6 @@ install: $(EXECUTABLE)
|
|||
mkdir -p $(DESTDIR)$(MENUENTRY_DIR) 2>/dev/null || true
|
||||
mkdir -p $(DESTDIR)$(ICON_DIR) 2>/dev/null || true
|
||||
install -m755 $(EXECUTABLE) $(DESTDIR)$(PREFIX)/bin/$(EXECUTABLE_NAME)
|
||||
install -m644 mappings/controller_gcwz.cfg $(DESTDIR)$(PREFIX)/share/reicast/mappings
|
||||
install -m644 mappings/controller_generic.cfg $(DESTDIR)$(PREFIX)/share/reicast/mappings
|
||||
install -m644 mappings/controller_pandora.cfg $(DESTDIR)$(PREFIX)/share/reicast/mappings
|
||||
install -m644 mappings/controller_xboxdrv.cfg $(DESTDIR)$(PREFIX)/share/reicast/mappings
|
||||
|
|
@ -591,7 +575,6 @@ install: $(EXECUTABLE)
|
|||
|
||||
uninstall:
|
||||
rm -f $(DESTDIR)$(PREFIX)/bin/$(EXECUTABLE_NAME)
|
||||
rm -f $(DESTDIR)$(PREFIX)/share/reicast/mappings/controller_gcwz.cfg
|
||||
rm -f $(DESTDIR)$(PREFIX)/share/reicast/mappings/controller_generic.cfg
|
||||
rm -f $(DESTDIR)$(PREFIX)/share/reicast/mappings/controller_pandora.cfg
|
||||
rm -f $(DESTDIR)$(PREFIX)/share/reicast/mappings/controller_xboxdrv.cfg
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
[Desktop Entry]
|
||||
Name=reicast
|
||||
Comment=A Sega Dreamcast emulator
|
||||
Exec=nosym-reicast.elf
|
||||
Terminal=false
|
||||
Type=Application
|
||||
StartupNotify=true
|
||||
Icon=icon-32
|
||||
Categories=emulators;
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
Before Width: | Height: | Size: 453 B |
|
|
@ -1,16 +0,0 @@
|
|||
[emulator]
|
||||
mapping_name = GCW Zero
|
||||
btn_escape = 0x01
|
||||
|
||||
[dreamcast]
|
||||
btn_a = 0x1D
|
||||
btn_b = 0x38
|
||||
btn_c = 0x0F
|
||||
btn_d = 0x0E
|
||||
btn_x = 0x2A
|
||||
btn_y = 0x39
|
||||
btn_start = 0x1C
|
||||
btn_dpad1_left = 0x69
|
||||
btn_dpad1_right = 0x6A
|
||||
btn_dpad1_up = 0x67
|
||||
btn_dpad1_down = 0x6C
|
||||
Loading…
Reference in New Issue