Merge pull request #1412 from reicast/fh/aica-int-timing
AICA/DMA: Make the transfers take some time, add fallback option. Fixes sfa3 and bomberman online
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4ceac65b0d
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@ -9,6 +9,7 @@
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#include "hw/holly/sb.h"
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#include "types.h"
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#include "hw/holly/holly_intc.h"
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#include "hw/sh4/sh4_sched.h"
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#include <time.h>
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@ -16,6 +17,8 @@ VArray2 aica_ram;
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u32 VREG;//video reg =P
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u32 ARMRST;//arm reset reg
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u32 rtc_EN=0;
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int dma_sched_id;
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u32 GetRTC_now()
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{
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@ -178,6 +181,28 @@ void aica_Term()
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}
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int dma_end_sched(int tag, int cycl, int jitt)
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{
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u32 len=SB_ADLEN & 0x7FFFFFFF;
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if (SB_ADLEN & 0x80000000)
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SB_ADEN=1;//
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else
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SB_ADEN=0;//
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SB_ADSTAR+=len;
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SB_ADSTAG+=len;
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SB_ADST = 0x00000000;//dma done
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SB_ADLEN = 0x00000000;
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// indicate that dma is not happening, or has been paused
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SB_ADSUSP |= 0x10;
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asic_RaiseInterrupt(holly_SPU_DMA);
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return 0;
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}
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void Write_SB_ADST(u32 addr, u32 data)
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{
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//0x005F7800 SB_ADSTAG RW AICA:G2-DMA G2 start address
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@ -214,18 +239,24 @@ void Write_SB_ADST(u32 addr, u32 data)
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WriteMem32_nommu(dst+i,data);
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}
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*/
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if (SB_ADLEN & 0x80000000)
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SB_ADEN=1;//
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// idicate that dma is in progress
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SB_ADSUSP &= ~0x10;
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if (!settings.aica.OldSyncronousDma)
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{
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// Schedule the end of DMA transfer interrupt
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int cycles = len * (SH4_MAIN_CLOCK / 2 / 25000000); // 16 bits @ 25 MHz
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if (cycles < 4096)
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dma_end_sched(0, 0, 0);
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else
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sh4_sched_request(dma_sched_id, cycles);
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}
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else
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SB_ADEN=0;//
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SB_ADSTAR+=len;
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SB_ADSTAG+=len;
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SB_ADST = 0x00000000;//dma done
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SB_ADLEN = 0x00000000;
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asic_RaiseInterrupt(holly_SPU_DMA);
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{
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dma_end_sched(0, 0, 0);
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}
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}
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}
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}
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@ -299,6 +330,7 @@ void aica_sb_Init()
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//sb_regs[((SB_E1ST_addr-SB_BASE)>>2)].flags=REG_32BIT_READWRITE | REG_READ_DATA;
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//sb_regs[((SB_E1ST_addr-SB_BASE)>>2)].writeFunction=Write_SB_E1ST;
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dma_sched_id = sh4_sched_register(0, &dma_end_sched);
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}
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void aica_sb_Reset(bool Manual)
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@ -307,4 +339,4 @@ void aica_sb_Reset(bool Manual)
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void aica_sb_Term()
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{
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}
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}
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@ -297,6 +297,7 @@ void LoadSettings()
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settings.aica.LimitFPS = cfgLoadInt("config", "aica.LimitFPS", 1);
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settings.aica.NoBatch = cfgLoadInt("config", "aica.NoBatch", 0);
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settings.aica.NoSound = cfgLoadInt("config", "aica.NoSound", 0);
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settings.aica.OldSyncronousDma = cfgLoadBool("config", "aica.OldSyncronousDma", false);
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settings.rend.UseMipmaps = cfgLoadInt("config", "rend.UseMipmaps", 1);
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settings.rend.WideScreen = cfgLoadInt("config", "rend.WideScreen", 0);
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settings.rend.Clipping = cfgLoadInt("config", "rend.Clipping", 1);
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@ -654,6 +654,7 @@ struct settings_t
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u32 DSPEnabled; //0 -> no, 1 -> yes
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u32 NoBatch;
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u32 NoSound; //0 ->sound, 1 -> no sound
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bool OldSyncronousDma; // 0 -> sync dma (old behavior), 1 -> async dma (fixes some games, partial implementation)
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} aica;
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#if USE_OMX
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