diff --git a/core/linux/posix_vmem.cpp b/core/linux/posix_vmem.cpp
index 7840043a5..376c6f47e 100644
--- a/core/linux/posix_vmem.cpp
+++ b/core/linux/posix_vmem.cpp
@@ -291,6 +291,8 @@ bool vmem_platform_prepare_jit_block(void *code_area, unsigned size, void **code
 
 #if HOST_CPU == CPU_ARM64
 
+#include <libkern/OSCacheControl.h>
+
 // Code borrowed from Dolphin https://github.com/dolphin-emu/dolphin
 static void Arm64_CacheFlush(void* start, void* end) {
 	if (start == end)
@@ -298,7 +300,7 @@ static void Arm64_CacheFlush(void* start, void* end) {
 
 #if defined(__APPLE__)
 	// Header file says this is equivalent to: sys_icache_invalidate(start, end - start);
-	sys_cache_control(kCacheFunctionPrepareForExecution, start, end - start);
+	sys_cache_control(kCacheFunctionPrepareForExecution, start, (uintptr_t)end - (uintptr_t)start);
 #else
 	// Don't rely on GCC's __clear_cache implementation, as it caches
 	// icache/dcache cache line sizes, that can vary between cores on
diff --git a/core/nullDC.cpp b/core/nullDC.cpp
old mode 100755
new mode 100644
diff --git a/core/rec-ARM64/rec_arm64.cpp b/core/rec-ARM64/rec_arm64.cpp
index 083ef35c0..00cd059dd 100644
--- a/core/rec-ARM64/rec_arm64.cpp
+++ b/core/rec-ARM64/rec_arm64.cpp
@@ -19,7 +19,7 @@
 
 #include "types.h"
 
-#if FEAT_SHREC == DYNAREC_JIT
+#if FEAT_SHREC == DYNAREC_JIT && HOST_CPU == CPU_ARM64
 
 #include <unistd.h>
 #include <map>