diff --git a/core/hw/pvr/pvr_mem.cpp b/core/hw/pvr/pvr_mem.cpp
index 95709bfe9..f36c16c0d 100644
--- a/core/hw/pvr/pvr_mem.cpp
+++ b/core/hw/pvr/pvr_mem.cpp
@@ -195,11 +195,11 @@ u8 DYNACALL pvr_read_area1_8(u32 addr)
 
 u16 DYNACALL pvr_read_area1_16(u32 addr)
 {
-	return *(u16*)&vram[pvr_map32(addr) & VRAM_MASK];
+	return *(u16*)&vram[pvr_map32(addr)];
 }
 u32 DYNACALL pvr_read_area1_32(u32 addr)
 {
-	return *(u32*)&vram[pvr_map32(addr) & VRAM_MASK];
+	return *(u32*)&vram[pvr_map32(addr)];
 }
 
 //write
@@ -216,7 +216,7 @@ void DYNACALL pvr_write_area1_16(u32 addr,u16 data)
     {
         fb_dirty = true;
     }
-	*(u16*)&vram[pvr_map32(addr) & VRAM_MASK]=data;
+	*(u16*)&vram[pvr_map32(addr)]=data;
 }
 void DYNACALL pvr_write_area1_32(u32 addr,u32 data)
 {
@@ -227,7 +227,7 @@ void DYNACALL pvr_write_area1_32(u32 addr,u32 data)
     {
         fb_dirty = true;
     }
-	*(u32*)&vram[pvr_map32(addr) & VRAM_MASK] = data;
+	*(u32*)&vram[pvr_map32(addr)] = data;
 }
 
 void TAWrite(u32 address,u32* data,u32 count)
@@ -296,28 +296,27 @@ void pvr_Reset(bool Manual)
 u32 pvr_map32(u32 offset32)
 {
 	//64b wide bus is achieved by interleaving the banks every 32 bits
-	//so bank is Address<<3
-	//bits <4 are <<1 to create space for bank num
-	//bank 0 is mapped at 400000 (32b offset) and after
-	const u32 bank_bit=VRAM_MASK-(VRAM_MASK/2);
-	const u32 static_bits=(VRAM_MASK-(bank_bit*2)+1)|3;
-	const u32 moved_bits=VRAM_MASK-static_bits-bank_bit;
-	u32 bank=(offset32&bank_bit)/bank_bit*4;//bank will be used as upper offset too
-	u32 lv=offset32&static_bits; //these will survive
-	offset32&=moved_bits;
-	offset32<<=1;
-	//       |inbank offset    |       bank id        | lower 2 bits (not changed)
-	u32 rv=  offset32 + bank                  + lv;
+	const u32 bank_bit = VRAM_BANK_BIT;
+	const u32 static_bits = (VRAM_MASK - (VRAM_BANK_BIT * 2 - 1)) | 3;
+	const u32 offset_bits = (VRAM_BANK_BIT - 1) & ~3;
 
+	u32 bank = (offset32 & VRAM_BANK_BIT) / VRAM_BANK_BIT;
+
+	u32 rv = offset32 & static_bits;
+
+	rv |= (offset32 & offset_bits) * 2;
+
+	rv |= bank * 4;
+	
 	return rv;
 }
 
 
 f32 vrf(u32 addr)
 {
-	return *(f32*)&vram[pvr_map32(addr) & VRAM_MASK];
+	return *(f32*)&vram[pvr_map32(addr)];
 }
 u32 vri(u32 addr)
 {
-	return *(u32*)&vram[pvr_map32(addr) & VRAM_MASK];
+	return *(u32*)&vram[pvr_map32(addr)];
 }